Statistical Analysis of Historical SEL Test Data to Provide A Priori Risk Estimates for Use of Unhardened CMOS Parts
SEL is a serious obstacle to use of state-of-the-art microelectronics, and a priori prediction of SEL susceptibility has proven elusive. We develop SEL risk-assessment tools based on analysis of large archives of SEL test data for unhardened CMOS parts. Results include a flexible method for bounding SEL rates even with minimal test data.
Single-event effects↗