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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

The BiDFET Device and Its Impact on Converters

The matrix converter topology for direct ac-to-ac conversion offers elimination of the bulky and unreliable D.C. link capacitors used in the popular Voltage-Source Inverter (VSI) with a front-end rectifier. The resulting more compact and higher efficiency implementation is a desirable solution for a wide variety of applications, such as photovoltaic energy generation, motor drives, and energy storage systems. The development of matrix converters has been hampered by the lack of availability of commercial bidirectional power switches with the ability to block high voltages in the first and third quadrants, carry on state current in both quadrants with low voltage drop, exhibit large forward-biased safe-operating-area (FBSOA), and low switching power losses. Consequently, many implementations have been tried in the past using discrete devices, as listed in Table I. Two implementations utilize commonly available asymmetric blocking IGBTs, while two cases make use of SiC power MOSFETs. They generally have a large parts count (4-6 individual switches) that occupies significant space in the converter where multiple bi-directional switches are required. They also have a high on-state voltage drop that degrades efficiency. As a result, one implementation utilizes symmetric blocking IGBT to achieve a low parts count (2), but its switching losses are unacceptably high.

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DOE OSTI2023

Ramp Generator for Electron Scanner in SNS Beam Profile Measurements System

A new fast high voltage Ramp Generator to deflect an electron beam in the Electron Scanner is required at the Spallation Neutron Source (SNS) in the Oak Ridge National Laboratory. The Electron Scanner is used for non-destructively measuring the transverse profiles of the proton beam in the accumulator ring of the SNS [1]. The existing deflector is obsolete and needs to be replaced. A new Ramp Generator is proposed based on fast high voltage MOSFET power switches. Two configurations have been considered. One is bipolar, with two opposite polarity power supplies and one switch module or two single switches, and the other is unipolar, with one power supply and two switch modules. Schematics and performance of both options are described, and results of the prototype testing are presented in the paper.

Peplov, Vladimir↗
DOE OSTI2020

( Invited ) Ruggedness of SiC and GaN Power Transistors in Switching Based Tests

Currently, a spectrum of reliability tests are being performed by both device manufacturers and end users. Many of these qualification tests are operated within the device safe-operating-area (SOA), however, the devices often undergo dynamic events in many converter applications that can exceed the SOA boundaries. This paper presents our recent work on quantifying the out-of-SOA robustness of GaN power high-electron-mobility transistors (HEMTs) and SiC power MOSFETs by switching based tests. The unclamped inductive switching stresses are applied to p-gate GaN HEMTs to evaluate their surge-energy and overvoltage robustness. The continuous, hard-switching, turn-off stresses are applied to SiC MOSFETs to evaluate their overvoltage switching robustness. As a result, both experiments demonstrate the robustness of SiC and GaN devices under out-of-SOA switching events, and the physics of degradation and failure are understood.

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NASA NTRS1983

Portable I/V-Curve Tester

Electronic load circuit for displaying current/voltage characteristic curves of power sources uses low-cost low-power CMOS operational amplifiers to control load current flowing through power MOSFET Q2 and main load transistor Q3. Thermal cutoff device turns off transistor Q3 in case of overload. To maximize battery life, battery is connected via "push-to-read" momentary-contact pushbutton switch.

Cole, S. W.↗
NASA NTRS1982

Electronic Load Tests High-Voltage Solar Arrays

Adjustable electronic load in solar-cell-array test instrument uses ten power MOSFET's and eight resistors. Two gate-control voltages adjusting load are derived from single, manually-operated, ganged potentiometer control. Third adjustable resistor adjusts relative turn-on points of two groups of transistors.

Miller, E. L.↗
NASA NTRS1991

Development of a ninety string solar array simulator

A power source was developed to support testing for the Space Station Freedom Power Management and Distribution (PMAD) DC Testbed. The intent was to simulate as closely as possible the steady-state and transient responses of a solar array. Several breadboards and one thermal prototype were built and tested. Responses were successfully verified and improved upon during successive breadboards. The completed 90-string simulator consists of four power MOSFETs, four 25 watt source resistors, and four 250 watt drain source bypass resistors per string, in addition to the control circuitry.

Vasek, Thomas E.↗
NASA NTRS1991

Development of a ninety string solar array simulator

A power source was developed to support testing for the Space Station Freedom Power Management and Distribution (PMAD) DC Testbed. The intent was to simulate as closely as possible the steady-state and transient responses of a solar array. Several breadboards and one thermal prototype were built and tested. Responses were successfully verified and improved upon during successive breadboards. The completed 90-string simulator consists of four power MOSFETs, four 25-watt source resistors, and four 250-watt drain source bypass resistors per string, in addition to the control circuitry.

Vasek, Thomas E.↗
NASA NTRS2001

Observations on ion track structure in semiconductors : a phenomenological study

An ion track structure model at the nanometer scale is presented. The model is based on electrostatic principles and is supported by observed experimental results conducted on power MOSFETs. The model predicts the existence of a transient induced electric field following the passage of an energetic heavy ion. There are two segments to the field (a radial and an axial component). It is the interaction of this transient electric field with the local environment that can trigger a catastrophic failure.

SEGR↗
NASA NTRS1991

Passively forced current sharing among transistors

This application concerns a simple passive circuit that improves current balance in paralleled power MOSFETs that are not precisely matched and that are operated in their active region from a common gate drive. A nonlinear circuit consisting of diodes and resistors generates a differential gate potential required to correct for unbalance while maintaining low losses over a range of current.

Niedra, Janis M.↗
NASA NTRS2007

Assessment of SOI Devices and Circuits at Extreme Temperatures

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Elbuluk, Malik↗
NASA NTRS2013

Destructive Single-Event Failures in Diodes

In this summary, we have shown that diodes are susceptible to destructive single-event effects, and that these failures occur along the guard ring. By determining the last passing voltages, a safe operating area can be derived. By derating off of those values, rather than by the rated voltage, like what is currently done with power MOSFETs, we can work to ensure the safety of future missions. However, there are still open questions about these failures. Are they limited to a single manufacturer, a small number, or all of them? Is there a threshold rated voltage that must be exceeded to see these failures? With future work, we hope to answer these questions. In the full paper, laser results will also be presented to verify that failures only occur along the guard ring.

Casey, Megan C.↗
NASA NTRS2012

Single Event Rates for Devices Sensitive to Particle Energy

Single event rates (SER) can include contributions from low-energy particles such that the linear energy transfer (LET) is not constant. Previous work found that the environmental description that is most relevant to the low-energy contribution to the rate is a "stopping rate per unit volume" even when the physical mechanisms for a single-event effect do not require an ion to stop in some device region. Stopping rate tables are presented for four heavy-ion environments that are commonly used to assess device suitability for space applications. A conservative rate estimate utilizing limited test data is derived, and the example of SEGR rate in a power MOSFET is presented.

conservative rate↗
NASA NTRS2017

Silicon Carbide Power Devices and Integrated Circuits

An overview of the NASA NEPP Program Silicon Carbide Power Device subtask is given, including the current task roadmap, partnerships, and future plans. Included are the Agency-wide efforts to promote development of single-event effect hardened SiC power devices for space applications.

single-event gate rupture (SEGR)↗
DOE OSTI2024

Solid state protective smart plug device

A wireless-controlled smart plug device and methods of use and operation, using a solid state switch to provide electrical power from an outlet to a load, and provide protection against overload, short circuit, ground, arc, or voltage surge faults. The switch includes a bidirectional semiconductor switch with two back-to-back connected transistors, such as silicon power MOSFETs, silicon insulated-gate bipolar transistors (IGBTs), silicon carbide (SiC) transistors, or gallium nitride (GaN) transistors, each configured to control the current flow from the electrical receptacle to the external electrical load.

Shen, Zheng↗
NASA NTRS2010

Re-Verification of the IRHN57133SE and IRHN57250SE for Single Event Gate Rupture and Single Event Burnout

The vertical metal oxide semiconductor field-effect transistor (MOSFET) is a widely used power transistor onboard a spacecraft. The MOSFET is typically employed in power supplies and high current switching applications. Due to the inherent high electric fields in the device, power MOSFETs are sensitive to heavy ion irradiation and can fail catastrophically as a result of single event gate rupture (SEGR) or single event burnout (SEB). Manufacturers have designed radiation-hardened power MOSFETs for space applications. These radiation hardened devices are not immune to SEGR or SEB but, rather, can exhibit them at a much more damaging ion than their non-radiation hardened counterparts. See [1] through [5] for more information.This effort was to investigate the SEGR and SEB responses of two power MOSFETs from IR(the IRHN57133SE and the IRHN57250SE) that have recently been produced on a new fabrication line. These tests will serve as a limited verification of these parts, but it is acknowledged that further testing on the respective parts may be needed for some mission profiles.

Single Event Gate Rupture (SEGR)↗
NASA NTRS2018

Cryogenic Parametric Characterization of Gallium Nitride Switches

This report presents the parametric characterization results of four GaN field-effect transistor (FET) devices from three manufacturers, one of which is a cascode device, and compares those results to a Si power metal-oxide-semiconductor fieldeffect transistor (MOSFET) and a SiC power MOSFET. The devices were first characterized at ambient temperature, then at cryogenic temperatures down to -196 C (LN2 temperature), and finally at ambient temperature again in the event that the device parameters were permanently affected by the cryogenic temperatures. In general, the results indicate that the GaN devices show significant improvement overall at cryogenic temperatures in the parameters characterized, such as onresistance and leakage currents, compared to the Si and SiC devices. The results show that the SiC device tested should not be used at cryogenic temperatures due to the significant increase in on-resistance. The results also show that the GaN and Si parameters characterized were either not affected by the cryogenic temperatures or changed by no more than +/-20 percent post LN2 submersion. The device that exhibited the most parametric change post LN2 submersion was the SiC power MOSFET in its leakage currents.

Gonzalez, Marcelo C.↗
DOE OSTI2021

A Study of Integrated Signal and Power Transfer for Compact Isolated SiC MOSFET Gate-Drivers

This work discusses a novel set of alternate implementations of isolated gate driver circuits for power electronic transistors. The proposed topologies for the driver have been designed specifically for SiC power MOSFET. Three different solutions are discussed, all of them providing the required gate turn-on and turn-off command signal with galvanic isolation, but also supplying power to the secondary side of the driver by means of magnetic transformers. The resulting solutions, all of them implemented with simple circuitry, enable the integration of the driver into the power cell, allowing for theoretical higher power density values in the final system. The principle of operation of the different solutions is discussed, and then the main relevant implementation details are presented. After that, the operation of the circuits is demonstrated experimentally, by testing a set of prototypes of these drivers. This provides a comprehensive design example that assesses the feasibility of the proposed solutions. Finally, the main results of the performance of the three gate drivers, on an SiC MOSFET-based prototype are presented and compared.

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