Obtaining particular normal forms of Boolean functions which do not give conflicts in circuit realizations
Boolean functions with conflict-free relay transitions in circuit realizations
RELAY↗
SEARCH · Search NASA
Results for “Realization”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Realization of Boolean functions and variables on contactless logic switches by the method of redefinition
Realization of Boolean functions and variables on contactless logic switches by method of redefinition
RELAY↗
Improvements to be realized through the use of block-coded communication systems.
Improvements to be realized through use of single channel black coded communication system
DATA TRANSMISSION↗
Detection and continuous estimation - The fundamental role of the optimum realizable linear filter.
Optimum realizable linear filter role in some communication problems, considering detection and continuous estimation
COMMUNICATION THEORY↗
Structure theory for the realization of finite state automata Progress report, 1 Nov. 1966 - 30 Apr. 1967
Structure theory for realization of finite state automata
STRUCTURE↗
A transistor-circuit realization of the inductance.
Transistor circuit realization of inductance with three transistors and one power supply
INDUCTANCE↗
The minimal realization of a nonanticipative impulse response matrix.
Minimum realization of linear time-varying nonanticipative system characterized by its impulse response matrix
MATRIX ANALYSIS↗
Digital filter design technique and the realization of transfer and immittance functions by using digital elements
Digital filter design technique and realization of transfer and immittance functions by using digital elements
Yu, C.-P.↗
Structure theory for the realization of finite state automata Final report, 1 Nov. 1966 - 31 Oct. 1968
Feedback and inessential errors in sequential machines, realization of sequential machines, and logic hazards in threshold gate networks
Coates, C. L.↗
Realization of optimum interleavers
Optimum symbol sequence interleavers realization taking into account storage capacity and encoding delay
Ramsey, J. L.↗
A hybrid realization for sampled-data controllers
Sampled data compensators hybrid realization for discrete controllers, selecting canonical representation with minimum number of delay elements
Carroll, C. C.↗
Realization theory of rational transfer matrices
Realization theory of rational transfer matrices presented as fundamental algebraic objects in theory of finite, constant linear systems
Wonham, W. M.↗
Special-purpose computer organization for double-precision realization of digital filters
Stored-programmed special purpose computer for double precision arithmetic realization of digital filters, discussing design, implementation and testing
Carroll, C. C.↗
On minimal partial realizations of a linear input/output map
Minimal partial realizations of linear input/output map, discussing significance in regard to adaptive dynamics identification procedures
Kalman, R. E.↗
DAA realizations of attitude algorithms
The attitude algorithms applied to strapdown inertial platforms are discussed. A review of six attitude transformation algorithms and the realizations of these algorithms by digital differential analyzers are presented. The number of digital differential analyzers for each algorithm is either smaller than or equal to that obtained by others.
Hung, J. C.↗
DDA realizations of attitude algorithms.
Digital differential analyzer (DDA) realization of the direction cosine, Euler angle, and quaternion algorithms. It is shown that, for any one of the three attitude algorithms, 27 DDAs are needed. This number is considerably smaller than those obtained by others for the cases of Euler angle and quaternion algorithms.
Yeh, Y.↗
Digital filter realizations using a special-purpose stored-program computer.
A special-purpose computer is organized to realize a second-order digital filter in a choice of 11 programming forms. Instructions for the forms are stored in a fast-access READ-ONLY memory. Also, a hard-wired multiplier is employed in the Arithmetic Unit to decrease computation time. The multiplier is organized into uniform functional blocks that are suitable for large-scale integration (LSI). A computer-aided design (CAD) program may be used to select the best filter programming form for a given filter transfer function D(z). The CAD program also aids in the location of the binary point in the data registers of the computer.
White, R.↗
New hardware realizations of nonrecursive digital filters.
Analysis of the bit-level operations involved in the convolution realizing a nonrecursive digital filter leads to hardware designs of digital filters based on the operation of counting. Two distinct designs are outlined: the first one is capable of very high speed but is rather expensive; the second is quite slow but has the advantages of low cost and high flexibility. The basic designs considered utilize fixed-point representation for the data and filter coefficients. Variants allowing floating-point representation of the coefficients are also described.
Zohar, S.↗