The State of NEPP NASA Electronic Parts & Packaging Program
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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Paper reviews the research on packaging high temperature integrated circuits to operate at 300 C.
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A tool for use in lifting a pin-supported, electronic package mounted in juxtaposition with the surface of an electronic circuit board is described. The tool is configured to be received beneath a pin-supported package and is characterized by a manually operable linkage, including an elongated, rigid link is supported for axial reciprocation and a pivotal link pinned to the body and supported for oscillation induced in response to axial motion imparted to the rigid link. A lifting plate is pivotally coupled to the distal end of the pivotal link so that oscillatory motion imparted to the pivotal link serves to move the plate vertically for elevating the plate into lifting engagement with the electronic package positioned thereabove.
Wire-connected electronic packaging module system providing change capability, design flexibility, arrangement freedom and volumetric efficiency
The scientific devices designed for each of the Outer Planets Program Focuses will likely be groundbreaking not only with respect to their scientific role but also regarding the electronics required to perform such investigations. In the past, the performance of packaged electronics was limited by the components themselves, with minimal influence of the packaging technology. The rapid development of integrated circuit technology, however, has drastically increased the importance of packaging technology in the ultimate performance of devices. If not carefully considered in the overall design, the packaging may become the limiting factor in the operation of the system. Although industry is responsible for several significant accomplishments in the field of electronics packaging, deep space/outer planet missions must take into account additional requirements such as extremely low temperatures, high radiation levels, hermetic sealing, and severe size and weight limitations. Therefore, the present investigation has been designed to meet the needs of NASA's sensor intensive outer planets program by combining (using flip chip technology) an array of devices (including analog, digital, power volt-age, passives, and MEMS) into a miniaturized heterogeneous system and utilizing optical buses to enable autonomy. Additional information is contained in the original extended abstract.
NASA Electronic Parts and Packaging (NEPP) Program and NASA Electronic Parts Assurance Group (NEPAG) are NASAs point-of-contacts for reliability and radiation tolerance of EEE parts and their packages. This presentation includes an FY18 program overview.
This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies.
This report summarizes the status of electronic manufacturing and packaging technology in Japan in comparison to that in the United States, and its impact on competition in electronic manufacturing in general. In addition to electronic manufacturing technologies, the report covers technology and manufacturing infrastructure, electronics manufacturing and assembly, quality assurance and reliability in the Japanese electronics industry, and successful product realization strategies. The panel found that Japan leads the United States in almost every electronics packaging technology. Japan clearly has achieved a strategic advantage in electronics production and process technologies. Panel members believe that Japanese competitors could be leading U.S. firms by as much as a decade in some electronics process technologies. Japan has established this marked competitive advantage in electronics as a consequence of developing low-cost, high-volume consumer products. Japan's infrastructure, and the remarkable cohesiveness of vision and purpose in government and industry, are key factors in the success of Japan's electronics industry. Although Japan will continue to dominate consumer electronics in the foreseeable future, opportunities exist for the United States and other industrial countries to capture an increasingly large part of the market. The JTEC panel has identified no insurmountable barriers that would prevent the United States from regaining a significant share of the consumer electronics market; in fact, there is ample evidence that the United States needs to aggressively pursue high-volume, low-cost electronic assembly, because it is a critical path leading to high-performance electronic systems.
Electronic packaging techniques and design criteria for preventing corona discharges in high-voltage circuitry
The project goal was to research, design and fabricate high-power-density, high-performance SiC power electronic modules for motor drive inverters in electric vehicles (EVs) to enable the subsequent motor drive to achieve a power density of 100 kW/l. EVs use electric motors instead of internal combustion engines as the prime mover, and their core components are semiconductor-based power electronic modules. Efficient power electronic modules play a vital role in power conversion systems. The performance of power modules directly affects the energy efficiency and overall performance of electric vehicles. Therefore, it is particularly important to develop power modules with high power density and high electrical performance that will perform reliably under EV environmental conditions. To achieve these goals, advanced electronic packaging technologies are required. This report describes a 5-year effort to integrate key aspects surrounding the basic power devices into the module itself to increase power density. These include sensing and sensing readout circuits, gate driver circuits, and two-sided cooling solutions.
Dielectric strength of rigid urethane foam for electronic packaging in space application
Sunblazer spacecraft mechanical, thermal, and orientation design, electronic packaging, and vibration, shock, and acceleration testing
For high reliability applications, visual inspection has been the key technique for most conventional electronic package assemblies. Now, the use of x-ray technique has become an additional inspection requirement for quality control and detection of unique defects due to manufacturing of advanced electronic array packages such as ball grid array (BGAs) and chip scale packages (CSPs).
Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.
This Perspective builds upon insights from the National Institute of Standards and Technology (NIST)-organized workshop, “Materials and Metrology Needs for Advanced Semiconductor Packaging Strategies,” held at the 35th annual Electronics Packaging Symposium in Binghamton, NY, on September 5, 2024. It outlines critical challenges and opportunities related to polymer-based “soft” materials in advanced semiconductor packaging, with emphasis on polymer science, measurement science (metrology), and the strategic development of Research-Grade Test Materials (RGTMs). These efforts, led by the NIST CHIPS team, aim to advance the fundamental understanding of structure-property-processing relationships, promote standardized guidelines and innovative methods for material characterization, and accelerate the development, qualification, and adoption of next-generation packaging materials. The Perspective also distills key insights from the panel discussion with industry experts, emphasizing the need for close collaboration among materials scientists, process engineers, and metrology experts to enable a holistic strategy, further highlighting the importance of cross-sector partnerships among industry, academia, and government to address pressing challenges in packaging materials and processes.