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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS1971

Evaluation of methods for determining hardware projected life

An investigation of existing methods of predicting hardware life is summarized by reviewing programs having long life requirements, current research efforts on long life problems, and technical papers reporting work on life predicting techniques. The results indicate that there are no accurate quantitative means to predict hardware life for system level hardware. The effectiveness of test programs and the cause of hardware failures is considered.

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NASA NTRS1974

Simulation verification techniques study: Simulation self test hardware design and techniques report

The final results are presented of the hardware verification task. The basic objectives of the various subtasks are reviewed along with the ground rules under which the overall task was conducted and which impacted the approach taken in deriving techniques for hardware self test. The results of the first subtask and the definition of simulation hardware are presented. The hardware definition is based primarily on a brief review of the simulator configurations anticipated for the shuttle training program. The results of the survey of current self test techniques are presented. The data sources that were considered in the search for current techniques are reviewed, and results of the survey are presented in terms of the specific types of tests that are of interest for training simulator applications. Specifically, these types of tests are readiness tests, fault isolation tests and incipient fault detection techniques. The most applicable techniques were structured into software flows that are then referenced in discussions of techniques for specific subsystems.

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NASA NTRS1984

Transient vibration test criteria for spacecraft hardware

Transient vibration test criteria, developed for spacecraft hardware, provide a test rationale to verify the capability of the hardware to withstand the low and mid frequency transient vibration environments induced by launch vehicle events. A test method, consisting of a series of discrete frequency, limited cycle, modulated sine wave pulses, was developed to avoid the slow swept sine drawbacks, yet provide a repeatable test that would excite all frequencies. The shape of the waveform is that of the classic response of the mass of a one degree of freedom system when it is base-excited by an exponentially decayed sine wave transient. Criteria were developed to define pulse amplitudes, shapes, and center frequencies from spacecraft loads analyses. Test tolerance criteria were also developed and specified. The transient vibration test criteria were implemented on spacecraft flight hardware and provided a more realistic test simulation (i.e., less conservative) for qualification of spacecraft hardware without risk of undertest.

Kern, D. L.↗
NASA NTRS1986

Management of SSME hardware life utilization

Statistical and probabilistic reliability methodologies were developed for the determination of hardware life limits for the Space Shuttle Main Engine (SSME). Both methodologies require that a mathematical reliability model of the engine (system) performance be developed as a function of the reliabilities of the components and parts. The system reliability model should be developed from the Failute Modes and Effects Analysis/Critical Items List. The statistical reliability methodology establishes hardware life limits directly from the failure distributions of the components and parts obtained from statistically-designed testing. The probabilistic reliability methodology establishes hardware life limits from a decision analysis methodology which incorporates the component/part reliabilities obtained from a probabilistic structural analysis, a calibrated maintenance program, inspection techniques, and fabrication procedures. Probilistic structural analysis is recommended as a tool to prioritize upgrading of the components and parts. The Weibull probability distribution is presently being investigated by NASA/MSFC to characterize the failure distribution of the SSME hardware from a limited data base of failures.

Pauschke, J. M.↗
NASA NTRS1988

Hardware for studying the demixing of aqueous polymer two-phase systems in low gravity

The gravity-free demixing behavior of aqueous polymer two-phase systems (APTPS) has been studied on Earth, and onboard KC-135 aircraft and the Space Shuttle. Results suggest a good correlation between the demixing behavior of isopycnic systems on Earth and the low g behavior of systems exhibiting phase density differences. The short term (20 s) behavior of APTPS onboard KC-135 aircraft has been shown to mimic their initial demixing behavior in space. It appears that the few minutes of low g provided by parabolic rocket flight will be sufficient to study all but the later stages of demixing of APTPS. We are therefore turning our attention toward the design and use of hardware for studying the demixing of APTPS onboard sounding rockets. This seminar will discuss the evolution of hardware and research from hand-held KC-135 and Shuttle hardware through to automated hardware designed for utilization of KC-135, sounding rocket, and Space Shuttle Mid-deck Locker flight opportunities.

Vanalstine, J. M.↗
NASA NTRS1990

Parallel asynchronous hardware implementation of image processing algorithms

Research is being carried out on hardware for a new approach to focal plane processing. The hardware involves silicon injection mode devices. These devices provide a natural basis for parallel asynchronous focal plane image preprocessing. The simplicity and novel properties of the devices would permit an independent analog processing channel to be dedicated to every pixel. A laminar architecture built from arrays of the devices would form a two-dimensional (2-D) array processor with a 2-D array of inputs located directly behind a focal plane detector array. A 2-D image data stream would propagate in neuron-like asynchronous pulse-coded form through the laminar processor. No multiplexing, digitization, or serial processing would occur in the preprocessing state. High performance is expected, based on pulse coding of input currents down to one picoampere with noise referred to input of about 10 femtoamperes. Linear pulse coding has been observed for input currents ranging up to seven orders of magnitude. Low power requirements suggest utility in space and in conjunction with very large arrays. Very low dark current and multispectral capability are possible because of hardware compatibility with the cryogenic environment of high performance detector arrays. The aforementioned hardware development effort is aimed at systems which would integrate image acquisition and image processing.

Coon, Darryl D.↗
NASA NTRS1991

Getting expert systems off the ground: Lessons learned from integrating model-based diagnostics with prototype flight hardware

As an initial attempt to introduce expert system technology into an onboard environment, a model based diagnostic system using the TRW MARPLE software tool was integrated with prototype flight hardware and its corresponding control software. Because this experiment was designed primarily to test the effectiveness of the model based reasoning technique used, the expert system ran on a separate hardware platform, and interactions between the control software and the model based diagnostics were limited. While this project met its objective of showing that model based reasoning can effectively isolate failures in flight hardware, it also identified the need for an integrated development path for expert system and control software for onboard applications. In developing expert systems that are ready for flight, artificial intelligence techniques must be evaluated to determine whether they offer a real advantage onboard, identify which diagnostic functions should be performed by the expert systems and which are better left to the procedural software, and work closely with both the hardware and the software developers from the beginning of a project to produce a well designed and thoroughly integrated application.

Stephan, Amy↗
NASA NTRS1992

Real-time demonstration hardware for enhanced DPCM video compression algorithm

The lack of available wideband digital links as well as the complexity of implementation of bandwidth efficient digital video CODECs (encoder/decoder) has worked to keep the cost of digital television transmission too high to compete with analog methods. Terrestrial and satellite video service providers, however, are now recognizing the potential gains that digital video compression offers and are proposing to incorporate compression systems to increase the number of available program channels. NASA is similarly recognizing the benefits of and trend toward digital video compression techniques for transmission of high quality video from space and therefore, has developed a digital television bandwidth compression algorithm to process standard National Television Systems Committee (NTSC) composite color television signals. The algorithm is based on differential pulse code modulation (DPCM), but additionally utilizes a non-adaptive predictor, non-uniform quantizer and multilevel Huffman coder to reduce the data rate substantially below that achievable with straight DPCM. The non-adaptive predictor and multilevel Huffman coder combine to set this technique apart from other DPCM encoding algorithms. All processing is done on a intra-field basis to prevent motion degradation and minimize hardware complexity. Computer simulations have shown the algorithm will produce broadcast quality reconstructed video at an average transmission rate of 1.8 bits/pixel. Hardware implementation of the DPCM circuit, non-adaptive predictor and non-uniform quantizer has been completed, providing realtime demonstration of the image quality at full video rates. Video sampling/reconstruction circuits have also been constructed to accomplish the analog video processing necessary for the real-time demonstration. Performance results for the completed hardware compare favorably with simulation results. Hardware implementation of the multilevel Huffman encoder/decoder is currently under development along with implementation of a buffer control algorithm to accommodate the variable data rate output of the multilevel Huffman encoder. A video CODEC of this type could be used to compress NTSC color television signals where high quality reconstruction is desirable (e.g., Space Station video transmission, transmission direct-to-the-home via direct broadcast satellite systems or cable television distribution to system headends and direct-to-the-home).

Bizon, Thomas P.↗
NASA NTRS1993

Postflight hardware evaluation (RSRM-29, STS-54)

This document is the final report for the Clearfield disassembly evaluation and a continuation of the KSC postflight assessment for the RSRM-29 flight set. All observed hardware conditions were documented on PFOR's and are included in Appendices A, B, and C. Appendices D and E contain the measurements and safety factor data for the nozzle and insulation components. This report, along with the KSC Ten-Day Postflight Hardware Evaluation Report (TWR-64221), represents a summary of the RSRM-29 hardware evaluation. Disassembly evaluation photograph numbers are logged in TWA-1990. The RSRM-29 flight set disassembly evaluations described in this document were performed at the RSRM Refurbishment Facility in Clearfield, Utah. The final factory joint demate occurred on September 9, 1993. Detailed evaluations were performed in accordance with the Clearfield PEEP, TWR-50051, Revision A. All observations were compared against limits that are also defined in the PEEP. These limits outline the criteria for categorizing the observations as acceptable, reportable, or critical. Hardware conditions that were unexpected and/or determined to be reportable or critical were evaluated by the applicable CPT and tracked through the PFAR system.

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NASA NTRS1992

Postflight hardware evaluation 360T021 (RSRM-21, STS-45), revision A

The Final Postflight Hardware Evaluation Report 360T021 (RSRM-21, STS-45) is included. All observed hardware conditions were documented on Postflight Observation Reports (PFOR's) and included in Appendices A through E. This report, along with the KSC Ten-Day Postflight Hardware Evaluation Report represents a summary of the 360T021 hardware evaluation.

Maccauly, Linda E.↗
NASA NTRS1994

Hardware and software reliability estimation using simulations

The simulation technique is used to explore the validation of both hardware and software. It was concluded that simulation is a viable means for validating both hardware and software and associating a reliability number with each. This is useful in determining the overall probability of system failure of an embedded processor unit, and improving both the code and the hardware where necessary to meet reliability requirements. The methodologies were proved using some simple programs, and simple hardware models.

Swern, Frederic L.↗
NASA NTRS1993

Summary of materials and hardware performance on LDEF

A wide variety of materials and experiment support hardware were flown on the Long Duration Exposure Facility (LDEF). Postflight testing has determined the effects of the almost 6 years of low-earth orbit (LEO) exposure on this hardware. An overview of the results are presented. Hardware discussed includes adhesives, fasteners, lubricants, data storage systems, solar cells, seals, and the LDEF structure. Lessons learned from the testing and analysis of LDEF hardware is also presented.

Dursch, Harry↗
NASA NTRS1994

Hardware interface for isolation of vibrations in flexible manipulators: Development and applications

NASA's Langley Research Center (LaRC) is addressing the problem of isolating the vibrations of the Shuttle remote manipulator system (RMS) from its end-effector and/or payload by modeling an RMS flat-floor simulator with a dynamic payload. Analysis of the model can lead to control techniques that will improve the speed, accuracy, and safety of the RMS in capturing satellites and eventually facilitate berthing with the space station. Rockwell International Corporation, also involved in vibration isolation, has developed a hardware interface unit to isolate the end-effector from the vibrations of an arm on a Shuttle robotic tile processing system (RTPS). To apply the RTPS isolation techniques to long-reach arms like the RMS, engineers have modeled the dynamics of the hardware interface unit with simulation software. By integrating the Rockwell interface model with the NASA LaRC RMS simulator model, investigators can study the use of a hardware interface to isolate dynamic payloads from the RMS. The interface unit uses both active and passive compliance and damping for vibration isolation. Thus equipped, the RMS could be used as a telemanipulator with control characteristics for capture and berthing operations. The hardware interface also has applications in industry.

Manouchehri, Davoud↗
NASA NTRS1991

Human-machine interface hardware: The next decade

In order to understand where human-machine interface hardware is headed, it is important to understand where we are today, how we got there, and what our goals for the future are. As computers become more capable, faster, and programs become more sophisticated, it becomes apparent that the interface hardware is the key to an exciting future in computing. How can a user interact and control a seemingly limitless array of parameters effectively? Today, the answer is most often a limitless array of controls. The link between these controls and human sensory motor capabilities does not utilize existing human capabilities to their full extent. Interface hardware for teleoperation and virtual environments is now facing a crossroad in design. Therefore, we as developers need to explore how the combination of interface hardware, human capabilities, and user experience can be blended to get the best performance today and in the future.

Marcus, Elizabeth A.↗
NASA NTRS1994

Hardware description languages

Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

Tucker, Jerry H.↗
NASA NTRS1995

The Mission Operations Directorate's International Space Station Alpha Hardware Familiarization Role

The National Aeronautics and Space Administration's Mission Operation Directorate's (MOD) On-Orbit Maintenance Operations Mission Controllers are participating in space station hardware tests and demonstrations in multiple neutral buoyancy facilities. This is part of the controllers' hardware familiarization world in preparation to support the astronauts in the operation and maintenance of the hardware. This paper describes the larger context of Mission Controller hardware familiarization with specifics of participation in the Boeing neutral buoyancy tests. Also covered is what participation has occurred in the past and future plans.

Zingrebe, Kenneth W., II↗
NASA NTRS2000

Extended Logic Intelligent Processing System for a Sensor Fusion Processor Hardware

The paper presents the hardware implementation and initial tests from a low-power, highspeed reconfigurable sensor fusion processor. The Extended Logic Intelligent Processing System (ELIPS) is described, which combines rule-based systems, fuzzy logic, and neural networks to achieve parallel fusion of sensor signals in compact low power VLSI. The development of the ELIPS concept is being done to demonstrate the interceptor functionality which particularly underlines the high speed and low power requirements. The hardware programmability allows the processor to reconfigure into different machines, taking the most efficient hardware implementation during each phase of information processing. Processing speeds of microseconds have been demonstrated using our test hardware.

Stoica, Adrian↗
NASA NTRS2002

The Microwave Anisotropy Probe (MAP): Guidance, Navigation, and Control Hardware Suite

The Microwave Anisotropy Probe (MAP) was launched June 30, 2001 to create an all-sky map of the Cosmic Microwave Background. The mission's hardware suite included two Lockheed Martin AST-201 star trackers, two Kearfott Two-Axis Rate Assemblies (TARAs) mounted to provide X, Y and redundant Z-axis rates, two Adcole Digital Sun Sensor (DSS) heads sharing one set of electronics, twelve Adcole Coarse Sun Sensor (CSS) eyes, three Ithaco E-sized Reaction Wheel Assemblies (RWAs), and a Propulsion Subsystem that employed eight PRIMEX Rocket Engine Modules (REMs). This hardware has allowed MAP to meet its various Orbit and Attitude Control Requirements, including performing a complex zero-momentum scan, meeting its attitude determination requirements, and maintaining a trajectory that places MAP in a lissajous orbit around the second Sun-Earth Lagrange point (L2) via phasing loops and a lunar gravity assist. Details of MAP's attitude determination, attitude control, and trajectory design are presented separately. This paper will focus on the performance of the hardware components mentioned above, as well as the significant lessons learned through the use of these components. An emphasis will be placed on spacecraft design modifications that were needed to accommodate existing hardware designs into the MAP Observatory design.

Ward, David K.↗