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At least 127 records · Page 7

Yearlong 500 C Operational Demonstration of Up-Scaled 4H-SiC JFET Integrated Circuits

This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500 C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.

Silicon carbides↗

Test Structures For Bumpy Integrated Circuits

Cross-bridge resistors added to comb and serpentine patterns. Improved combination of test structures built into integrated circuit used to evaluate design rules, fabrication processes, and quality of interconnections. Consist of meshing serpentines and combs, and cross bridge. Structures used to make electrical measurements revealing defects in design or fabrication. Combination of test structures includes three comb arrays, two serpentine arrays, and cross bridge. Made of aluminum or polycrystalline silicon, depending on material in integrated-circuit layers evaluated. Aluminum combs and serpentine arrays deposited over steps made by polycrystalline silicon and diffusion layers, while polycrystalline silicon versions of these structures used to cross over steps made by thick oxide layer.

Buehler, Martin G.↗

Amplifier improvement circuit

Stable input stage was designed for the use with a integrated circuit operational amplifier to provide improved performance as an instrumentation-type amplifier. The circuit provides high input impedance, stable gain, good common mode rejection, very low drift, and low output impedance.

Sturman, J.↗

Sliding backshorts for planar circuits

An adjustable planar imbedding circuit based on coplanar transmission lines is presented to deal with the impedance mismatch associated with the use of the Superconductor-Insulator-Superconductor tunnel junction. The planar embedding circuit is developed with movable noncontacting shorting elements that consist of thin metallic plates with optimized arrangements of rectangular holes. The rectangular holes are placed along the insulated metallic transmission line to provide a periodic variation of the line impedance. A large reflection coefficient is demonstrated with a scale model of the sliding backshort, and values of more than -0.5 dB are reported. The shorting elements are incorporated into a low-frequency tuning circuit to test the practical tuning ranges. The backshort can be used to fashion tuning stubs with variable post-fabrication electrical lengths which relaxes the design constraints of planar integrated circuits.

Lubecke, Victor M.↗

Development of a plan for automating integrated circuit processing

The operations analysis and equipment evaluations pertinent to the design of an automated production facility capable of manufacturing beam-lead CMOS integrated circuits are reported. The overall plan shows approximate cost of major equipment, production rate and performance capability, flexibility, and special maintenance requirements. Direct computer control is compared with supervisory-mode operations. The plan is limited to wafer processing operations from the starting wafer to the finished beam-lead die after separation etching. The work already accomplished in implementing various automation schemes, and the type of equipment which can be found for instant automation are described. The plan is general, so that small shops or large production units can perhaps benefit. Examples of major types of automated processing machines are shown to illustrate the general concepts of automated wafer processing.

Source record↗

MEMS Microshutter Array System for James Webb Space Telescope

A complex MEMS microshutter array system has been developed at NASA Goddard Space Flight Center (GSFC) for use as a multi-object aperture array for a Near-Infrared Spectrometer (NIRSpec). The NIRSpec is one of the four major instruments carried by the James Webb Space Telescope (JWST), the next generation of space telescope after the Hubble Space Telescope retires. The microshutter arrays (MSAs) are designed for the selective transmission of light with high efficiency and high contrast. It is demonstrated in Figure 1 how a MSA is used as a multiple object selector in deep space. The MSAs empower the NIRSpec instrument simultaneously collect spectra from more than 100 targets therefore increases the instrument efficiency 100 times or more. The MSA assembly is one of three major innovations on JWST and the first major MEMS devices serving observation missions in space. The MSA system developed at NASA GSFC is assembled with four quadrant fully addressable 365x171 shutter arrays that are actuated magnetically, latched and addressed electrostatically. As shown in Figure 2, each MSA is fabricated out of a 4' silicon-on-insulator (SOI) wafer using MEMS bulk-micromachining technology. Individual shutters are close-packed silicon nitride membranes with a pixel size close to 100x200 pm (Figure 3). Shutters are patterned with a torsion flexure permitting shutters to open 90 degrees with a minimized mechanical stress concentration. In order to prevent light leak, light shields are made on to the surrounding frame of each shutter to cover the gaps between the shutters and the Game (Figure 4). Micro-ribs and sub-micron bumps are tailored on hack walls and light shields, respectively, to prevent sticktion, shown in Figures 4 and 5. JWST instruments are required to operate at cryogenic temperatures as low as 35K, though they are to be subjected to various levels of ground tests at room temperature. The shutters should therefore maintain nearly flat in the entire temperature range between 35K and 300K. Through intensive numerical simulations and experimental studies, an optically opaque and electrically conductive metal-nitride thin film was selected as a coating material deposited on the shutters with the best thermal-expansion match to silicon nitride - the shutter blade thin film material. A shutter image shown in Figure 6 was taken at room temperature, presenting shutters slightly bowing down as expected. Shutters become flat when the temperature decreases to 35K. The MSAs are then bonded to silicon substrates that are fabricated out of 6" single-silicon wafers in the thickness of 2mm. The bonding is conducted using a novel single-sided indium flip-chip bonding technology. Indium bumps fabricated on a substrate are shown in Figure 7. There are 180,000 indium bumps for bonding a flight format MSA array to its substrate. Besides a MSA, each substrate houses five customer-designed ASIC (Application Specific Integrated Circuit) multiplexer/address chips for 2-dimensional addressing, twenty capacitors, two temperature sensors, numbers of resistors and all necessary interconnects, as shown in Figure 8. Complete MSA quadrant assemblies have been successfully manufactured and fully functionally tested. The assemblies have passed a series of critical reviews required by JWST in satisfying all the design specifications. The qualification tests cover programmable 2-D addressing, life tests, optical contrast tests, and environmental tests including radiation, vibration, and acoustic tests. A 2-D addressing pattern with 'ESA' letters programmed in a MSA is shown in Figure 9. The MSAs passed 1 million cycle life tests and achieved high optical contrast over 10,000. MSA teams are now making progress in final fabrication, testing and assembly (Figure 10). The delivery of flight-format MSA system is scheduled at the end of 2008 for being integrated to the focal plane of the NIRSpec detectors.

Li, Mary J.↗

Nonlinear optical thin films

A focused approach to development and evaluation of organic polymer films for use in optoelectronics is presented. The issues and challenges that are addressed include: (1) material synthesis, purification, and the tailoring of the material properties; (2) deposition of uniform thin films by a variety of methods; (3) characterization of material physical properties (thermal, electrical, optical, and electro-optical); and (4) device fabrication and testing. Photonic materials, devices, and systems were identified as critical technology areas by the Department of Commerce and the Department of Defense. This approach offers strong integration of basic material issues through engineering applications by the development of materials that can be exploited as the active unit in a variety of polymeric thin film devices. Improved materials were developed with unprecedented purity and stability. The absorptive properties can be tailored and controlled to provide significant improvement in propagation losses and nonlinear performance. Furthermore, the materials were incorporated into polymers that are highly compatible with fabrication and patterning processes for integrated optical devices and circuits. By simultaneously addressing the issues of materials development and characterization, keeping device design and fabrication in mind, many obstacles were overcome for implementation of these polymeric materials and devices into systems. We intend to considerably improve the upper use temperature, poling stability, and compatibility with silicon based devices. The principal device application that was targeted is a linear electro-optic modulation etalon. Organic polymers need to be properly designed and coupled with existing integrated circuit technology to create new photonic devices for optical communication, image processing, other laser applications such as harmonic generation, and eventually optical computing. The progression from microscopic sample to a suitable film-forming material in a working device is a complex, multifaceted endeavor. It requires close attention to maintaining the optical properties of the electro-optic active portion of the polymer while manipulating the polymer structure to obtain the desired secondary polymer properties.

Leslie, Thomas M.↗

120-GHz HEMT Oscillator With Surface-Wave-Assisted Antenna

Two monolithic microwave integrated circuits (MMICs) have been designed and built to function together as a source of electromagnetic radiation at a frequency of 120 GHz. One of the MMICs is an oscillator and is the highest-power 120-GHz oscillator reported thus far in the literature. The other MMIC is an end-fire antenna that radiates the oscillator signal. Although these MMICs were constructed as separate units and electrically connected with wire bonds, future oscillator/ antenna combinations could readily be fabricated as monolithic integrated units. Such units could be used as relatively high-power solid-state microwave sources in diverse applications that include automotive radar, imaging, scientific instrumentation, communications, and radio astronomy. As such, these units would be attractive alternatives to vacuum-tube oscillators, which are still used to obtain acceptably high power in the frequency range of interest. The oscillator (see figure) includes a high-electron-mobility transistor (HEMT), with gate-periphery dimensions of 4 by 37 m, in a common-source configuration. The series feedback element of the oscillator is a grounded coplanar waveguide (CPW) at the source. The HEMT is biased for class-A operation (meaning that current is conducted throughout the oscillation cycle) to maximize the output power of the oscillator. Input and output impedance-matching circuit elements are designed to maximize output power and to establish the conditions needed for oscillation. The design of the antenna takes advantage of surface waves, which, heretofore, have been regarded as highly disadvantageous because they can leak power and degrade the performances of antennas that have not been designed to exploit them. Measures taken to suppress surface waves have included complex machining of circuit substrates and addition of separate substrates. These measures are difficult to implement in standard MMIC fabrication processes. In contrast, because the design of the present antenna eliminates the need to suppress surface waves, the fabrication of the antenna is fully compatible with standard MMIC fabrication processes.

Samoska, Lorene↗

Further Development of an Optimal Design Approach Applied to Axial Magnetic Bearings

Classical design methods involved in magnetic bearings and magnetic suspension systems have always had their limitations. Because of this, the overall effectiveness of a design has always relied heavily on the skill and experience of the individual designer. This paper combines two approaches that have been developed to aid the accuracy and efficiency of magnetostatic design. The first approach integrates classical magnetic circuit theory with modern optimization theory to increase design efficiency. The second approach uses loss factors to increase the accuracy of classical magnetic circuit theory. As an example, an axial magnetic thrust bearing is designed for minimum power.

Bloodgood, V. Dale, Jr.↗

A Compact, Multi-view Net Flux Radiometer for Future Uranus and Neptune Probes

A Net Flux Radiometer (NFR) is presented that can be included in an atmospheric structure instrument suite for future probe missions to the icy giants Uranus and Neptune. The baseline design has two spectral channels i.e., a solar channel (0.4-to-3.5 m) and a thermal channel (4-to-300 m). The NFR is capable of viewing five distinct viewing angles during the descent. Non-imaging Winston cones with band-pass filters are used for each spectral channel and to define a 5 angular acceptance. Uncooled thermopile detectors are used in each spectral channel and are read out using a custom radiation hard application specific integrated circuit (ASIC). The baseline design can easily be changed to increase the number of detector channels from two to seven.

Aslam, S.↗

Power Electronics Being Developed for Deep Space Cryogenic Applications

Electronic circuits and systems designed for deep space missions need to operate reliably and efficiently in harsh environments that include very low temperatures. Spacecraft that operate in such cold environments carry a large number of heaters so that the ambient temperature for the onboard electronics remains near 20 C. Electronics that can operate at cryogenic temperatures will simplify system design and reduce system size and weight by eliminating the heaters and their associated structures. As a result, system development and launch cost will be reduced. At the NASA Glenn Research Center, an ongoing program is focusing on the development of power electronics geared for deep space low-temperature environments. The research and development efforts include electrical components design, circuit design and construction, and system integration and demonstration at cryogenic temperatures. Investigations are being carried out on circuits and systems that are targeted for use in NASA missions where low temperatures will be encountered: devices such as ceramic and tantalum capacitors, metal film resistors, semiconductor switches, magnetics, and integrated circuits including dc/dc converters, operational amplifiers, voltage references, and motor controllers. Test activities cover a wide range of device and circuit performance under simple as well as complex test conditions, such as multistress and thermal cycling. The effect of low-temperature conditions on the switching characteristics of an advanced silicon-on-insulator field effect transistor is shown. For gate voltages (VGS) below 2.6 V, drain currents at -190 C are lower than drain currents at room temperature (20 C).

Patterson, Richard L.↗

Standard high-reliability integrated circuit logic packaging

A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

Slaughter, D. W.↗

A study of microwave downcoverters operating in the K sub u band

A computer program for parametric amplifier design is developed with special emphasis on practical design considerations for microwave integrated circuit degenerate amplifiers. Precision measurement techniques are developed to obtain a more realistic varactor equivalent circuit. The existing theory of a parametric amplifier is modified to include the equivalent circuit, and microwave properties, such as loss characteristics and circuit discontinuities are investigated.

Fellers, R. G.↗