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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7

All sources NASA NTRS DOE OSTI

NASA NTRS1977

Report on phase 1 of the Microprocessor Seminar

Proceedings of a seminar on microprocessors and associated large scale integrated (LSI) circuits are presented. The potential for commonality of device requirements, candidate processes and mechanisms for qualifying candidate LSI technologies for high reliability applications, and specifications for testing and testability were among the topics discussed. Various programs and tentative plans of the participating organizations in the development of high reliability LSI circuits are given.

Source record↗

NASA NTRS1980

Technique for mounting pyroelectric detector arrays

Technique is developed at Langley Research Center for mounting pyroelectric detector arrays on silicon integrated circuits. Procedure incorporates normal silicon integrated-circuit technology to form quasi-free mounts for detector arrays. Advantages of technique include lower cost, better image registration, and improved reliability.

Breckenridge, R. A.↗

NASA NTRS2014

5.8kV SiC PiN Diode for Switching of High-Efficiency Inductive Pulsed Plasma Thruster Circuits

Inductive Pulsed Plasma Thruster (IPPT) pulse circuits, such as those needed to operate the Pulsed Inductive Thruster (PIT), are required to quickly switch capacitor banks operating at a period of μs while conducting current at levels on the order of at least 10 kA. [1,2] For all iterations of the PIT to date, spark gaps have been used to discharge the capacitor bank through an inductive coil. Recent availability of fast, high‐power solid state switching devices makes it possible to consider the use of semiconductor switches in modern IPPTs. In addition, novel pre‐ionization schemes have led to a reduction in discharge energy per pulse for electric thrusters of this type, relaxing the switching requirements for these thrusters. [3,4] Solid state switches offer the advantage of greater controllability and reliability, as well as decreased drive circuit dimensions and mass relative to spark gap switches. The use of solid state devices such as Integrated Gate Bipolar Transistors (IGBTs), Gate Turn‐off Thyristors (GTOs) and Silicon‐Controlled Rectifiers (SCRs) often involves the use of power diodes. These semiconductor devices may be connected antiparallel to the switch for protection from reverse current, or used to reduce power loss in a circuit by clamping off current ringing. In each case, higher circuit efficiency may be achieved by using a diode that is able to transition, or 'switch,' from the forward conducting state ('on' state) to the reverse blocking state ('off' state) in the shortest amount of time, thereby minimizing current ringing and switching losses. Silicon Carbide (SiC) PiN diodes offer significant advantages to conventional fast‐switching Silicon (Si) diodes for high power and fast switching applications. A wider band gap results in a breakdown voltage 10 times that of Si, so that a SiC device may have a thinner drift region for a given blocking voltage. [5] This leads to smaller, lighter devices for high voltage applications, as well as reduced forward conduction losses, faster reverse recovery time (faster turn‐off), and lower‐magnitude reverse recovery current. In addition, SiC devices have lower leakage current as compared to their Si counterparts, and a high thermal conductivity, potentially allowing the former to operate at higher temperatures with a smaller, lighter heatsink (or no heatsink at all).

Toftul, Alexandra↗

DOE OSTI2025

Understanding Reliability Trade-Offs in 1T-nC and 2T-nC FeRAM Designs

Ferroelectric random access memory (FeRAM) is a promising candidate for energy-efficient nonvolatile memory, particularly for logic-in-memory and compute-in-memory (CIM) applications. Among the available cell architectures, One-Transistor–n-Capacitor (1T-nC) and two-transistor–n-capacitor (2T-nC) FeRAMs each offer distinct trade-offs in density, scalability, and reliability. In this work, we present a comparative study of these two architectures under both dimensional scaling ( XY/Z shrinkage) and vertical integration (increasing stacked capacitors per cell). Using technology computer-aided design (TCAD) and circuit-level simulations, we analyze how scaling impacts ferroelectric capacitance, parasitic coupling, and floating-node (FN) dynamics, which together dictate sense margin (SM) and read stability. A key mitigation strategy—floating unselected capacitors—is applied to both architectures, effectively decoupling the SM from the number of stacked capacitors and enabling tractable analysis across scaling regimes. Results show that 1T-nC suffers more from charge sharing with the bitline (BL), while 2T-nC benefits from transistor isolation and stronger low-voltage sensing at the cost of increased area. By systematically evaluating these behaviors across scaling directions, this work establishes the reliability trade-offs of 1T-nC and 2T-nC cells and provides design guidelines for high-density, vertically integrated FeRAM systems.

1T-nC↗

NASA NTRS1985

Crystalline-silicon reliability lessons for thin-film modules

The reliability of crystalline silicon modules has been brought to a high level with lifetimes approaching 20 years, and excellent industry credibility and user satisfaction. The transition from crystalline modules to thin film modules is comparable to the transition from discrete transistors to integrated circuits. New cell materials and monolithic structures will require new device processing techniques, but the package function and design will evolve to a lesser extent. Although there will be new encapsulants optimized to take advantage of the mechanical flexibility and low temperature processing features of thin films, the reliability and life degradation stresses and mechanisms will remain mostly unchanged. Key reliability technologies in common between crystalline and thin film modules include hot spot heating, galvanic and electrochemical corrosion, hail impact stresses, glass breakage, mechanical fatigue, photothermal degradation of encapsulants, operating temperature, moisture sorption, circuit design strategies, product safety issues, and the process required to achieve a reliable product from a laboratory prototype.

Ross, R. G., Jr.↗

NASA NTRS1978

A concept for a transparent data acquisition and distribution system for spaceflight applications

The paper describes the Modular Data System concept of the NASA End-to-End Data System program. Data from a single instrument along with the necessary ancillary data will be assembled into self-contained packets and subsequently transmitted over various communications links (space telemetry channel, ground communications circuits, etc.) to the experimenter's facility in real time; reliable error control coding will be included in each link transmission to protect the integrity of the data packets. A major objective is to make the entire data acquisition and distribution process transparent to the experimenter in the sense that the output terminal of the distribution system will be physically, logically and electrically identical to that of the experiment output channel.

Greene, E. P.↗

NASA NTRS1991

Test chips and ASIC qualification

A test chip set being developed to aid in the qualification of spaceborne Application Specific Integrated Circuits (ASICs) is described. The chip set consists of a process monitor for process parameter verification, a fault chip for yield analysis, a reliability chip for ASIC failure rate analysis, and total ionizing dose and single event upset chips for radiation effect analysis. The test structures contained in these chips are discussed along with representative test results.

Buehler, M. G.↗

NASA NTRSDate not supplied

Toward High-Endurance Nonvolatile Reconfigurable Metasurfaces

The applications of adaptive optics extend across multiple sectors, encompassing areas such as LiDAR, biological and chemical sensing, and free-space optical communications. The advent of metasurfaces optics with reconfigurability has offered a versatile platform for the design of compact optical components, offering a compelling alternative to their conventional bulky counterparts. In this study, we introduce the PROWESS (Phase change Reconfigurable Optical WavEfront Synthesis System project at NASA LaRC), electrically reconfigurable metasurfaces using low-loss, high-contrast phase change material (PCM), Ge2Sb2Se4Te integrated with IR-transparent silicon microheater for various practical applications. The talk covers a reliable platform for switching large-scale PCM-based devices utilizing a microheater and an architecture for the metasurface switching within an integrated circuit configuration, which is compatible with standard foundry fabrication processes. The utilization of near- to midinfrared transparent silicon microheater in the proposed architecture opens possibilities for the development of reconfigurable transmissive optics such as filters, zoom lenses, and beam steering modules. We demonstrated switching of 140 µm × 140 µm PCM pixel, on a 200 µm × 200 µm silicon microheater for several thousand cycles. Further, we performed an in-depth investigation into the failure mechanism utilizing techniques such as transmission electron microscopy and thermal modeling. Guidelines for device performance improvement are proposed, and an improved design with larger endurance is shown in progress. With further progress, we aim to unlock the full potential of PCM-based devices and advance the field of adaptive optics with demonstrable examples including a reconfigurable beam steerer for ocean surface flash LiDAR and Navigation Doppler LiDAR for precise lunar landing missions.

metasurface optics↗

NASA NTRS2010

Fiber-Coupled Planar Light-Wave Circuit for Seed Laser Control in High Spectral Resolution Lidar Systems

Precise laser remote sensing of aerosol extinction and backscatter in the atmosphere requires a high-power, pulsed, frequency doubled Nd:YAG laser that is wavelength- stabilized to a narrow absorption line such as found in iodine vapor. One method for precise wavelength control is to injection seed the Nd:YAG laser with a low-power CW laser that is stabilized by frequency converting a fraction of the beam to 532 nm, and to actively frequency-lock it to an iodine vapor absorption line. While the feasibility of this approach has been demonstrated using bulk optics in NASA Langley s Airborne High Spectral Resolution Lidar (HSRL) program, an ideal, lower cost solution is to develop an all-waveguide, frequency-locked seed laser in a compact, robust package that will withstand the temperature, shock, and vibration levels associated with airborne and space-based remote sensing platforms. A key technology leading to this miniaturization is the integration of an efficient waveguide frequency doubling element, and a low-voltage phase modulation element into a single, monolithic, planar light-wave circuit (PLC). The PLC concept advances NASA's future lidar systems due to its compact, efficient and reliable design, thus enabling use on small aircraft and satellites. The immediate application for this technology is targeted for NASA Langley's HSRL system for aerosol and cloud characterization. This Phase I effort proposes the development of a potassium titanyl phosphate (KTP) waveguide phase modulator for future integration into a PLC. For this innovation, the proposed device is the integration of a waveguide-based frequency doubler and phase modulator in a single, fiber pigtail device that will be capable of efficient second harmonic generation of 1,064-nm light and subsequent phase modulation of the 532 nm light at 250 MHz, providing a properly spectrally formatted beam for HSRL s seed laser locking system. Fabrication of the integrated PLC chip for NASA Langley, planned for the Phase II effort, will require full integration and optimization of the waveguide components (SHG waveguide, splitters, and phase modulator) onto a single, monolithic device. The PLC will greatly reduce the size and weight, improve electrical- to-optical efficiency, and significantly reduce the cost of NASA Langley s current stabilized HSRL seed laser system built around a commercial off-the-shelf seed laser that is free-space coupled to a bulk doubler and bulk phase modulator.

Cook, Anthony↗

NASA NTRS1978

Fault-tolerant building-block computer study

Ultra-reliable core computers are required for improving the reliability of complex military systems. Such computers can provide reliable fault diagnosis, failure circumvention, and, in some cases serve as an automated repairman for their host systems. A small set of building-block circuits which can be implemented as single very large integration devices, and which can be used with off-the-shelf microprocessors and memories to build self checking computer modules (SCCM) is described. Each SCCM is a microcomputer which is capable of detecting its own faults during normal operation and is described to communicate with other identical modules over one or more Mil Standard 1553A buses. Several SCCMs can be connected into a network with backup spares to provide fault-tolerant operation, i.e. automated recovery from faults. Alternative fault-tolerant SCCM configurations are discussed along with the cost and reliability associated with their implementation.

Rennels, D. A.↗

NASA NTRS1983

Practical preventive reliability using matrix forms

This paper describes a practical new tool to improve the reliability of equipment. It uses a matrix form to help monitor anticipated component faults precisely. The tool provides the practical measures necessary to generate matrix tables that accurately display all causes of failure and all planned programmatic analyses, tests, processes, and inspections. When completed, the matrix tables give users in-depth visibility of the degree of protection against component failure that is provided by the program's preventive measure plans. The matrix form is an excellent technique for tracking, and thereby influencing, the reliability of nonelectronic spacecraft subsystems or components. No electronic applications have been tried, but the procedure can be useful in the electronics field, e.g., in integrated circuit production planning, and perhaps in process control, inspection or test lines for other electronic components. The drawing of forms, and the recording/manipulation of the data can be computerized.

Johnson, S. A.↗

NASA NTRS2006

Fault Tolerance Implementation within SRAM Based FPGA Designs based upon Single Event Upset Occurrence Rates

Emerging technology is enabling the design community to consistently expand the amount of functionality that can be implemented within Integrated Circuits (ICs). As the number of gates placed within an FPGA increases, the complexity of the design can grow exponentially. Consequently, the ability to create reliable circuits has become an incredibly difficult task. In order to ease the complexity of design completion, the commercial design community has developed a very rigid (but effective) design methodology based on synchronous circuit techniques. In order to create faster, smaller and lower power circuits, transistor geometries and core voltages have decreased. In environments that contain ionizing energy, such a combination will increase the probability of Single Event Upsets (SEUs) and will consequently affect the state space of a circuit. In order to combat the effects of radiation, the aerospace community has developed several "Hardened by Design" (fault tolerant) design schemes. This paper will address design mitigation schemes targeted for SRAM Based FPGA CMOS devices. Because some mitigation schemes may be over zealous (too much power, area, complexity, etc.. . .), the designer should be conscious that system requirements can ease the amount of mitigation necessary for acceptable operation. Therefore, various degrees of Fault Tolerance will be demonstrated along with an analysis of its effectiveness.

Berg, Melanie↗

NASA NTRS2004

Multisensor Arrays for Greater Reliability and Accuracy

Arrays of multiple, nominally identical sensors with sensor-output-processing electronic hardware and software are being developed in order to obtain accuracy, reliability, and lifetime greater than those of single sensors. The conceptual basis of this development lies in the statistical behavior of multiple sensors and a multisensor-array (MSA) algorithm that exploits that behavior. In addition, advances in microelectromechanical systems (MEMS) and integrated circuits are exploited. A typical sensor unit according to this concept includes multiple MEMS sensors and sensor-readout circuitry fabricated together on a single chip and packaged compactly with a microprocessor that performs several functions, including execution of the MSA algorithm. In the MSA algorithm, the readings from all the sensors in an array at a given instant of time are compared and the reliability of each sensor is quantified. This comparison of readings and quantification of reliabilities involves the calculation of the ratio between every sensor reading and every other sensor reading, plus calculation of the sum of all such ratios. Then one output reading for the given instant of time is computed as a weighted average of the readings of all the sensors. In this computation, the weight for each sensor is the aforementioned value used to quantify its reliability. In an optional variant of the MSA algorithm that can be implemented easily, a running sum of the reliability value for each sensor at previous time steps as well as at the present time step is used as the weight of the sensor in calculating the weighted average at the present time step. In this variant, the weight of a sensor that continually fails gradually decreases, so that eventually, its influence over the output reading becomes minimal: In effect, the sensor system "learns" which sensors to trust and which not to trust. The MSA algorithm incorporates a criterion for deciding whether there remain enough sensor readings that approximate each other sufficiently closely to constitute a majority for the purpose of quantifying reliability. This criterion is, simply, that if there do not exist at least three sensors having weights greater than a prescribed minimum acceptable value, then the array as a whole is deemed to have failed.

Immer, Christopher↗

NASA NTRS2013

Damage Detection Response Characteristics of Open Circuit Resonant (SansEC) Sensors

The capability to assess the current or future state of the health of an aircraft to improve safety, availability, and reliability while reducing maintenance costs has been a continuous goal for decades. Many companies, commercial entities, and academic institutions have become interested in Integrated Vehicle Health Management (IVHM) and a growing effort of research into "smart" vehicle sensing systems has emerged. Methods to detect damage to aircraft materials and structures have historically relied on visual inspection during pre-flight or post-flight operations by flight and ground crews. More quantitative non-destructive investigations with various instruments and sensors have traditionally been performed when the aircraft is out of operational service during major scheduled maintenance. Through the use of reliable sensors coupled with data monitoring, data mining, and data analysis techniques, the health state of a vehicle can be detected in-situ. NASA Langley Research Center (LaRC) is developing a composite aircraft skin damage detection method and system based on open circuit SansEC (Sans Electric Connection) sensor technology. Composite materials are increasingly used in modern aircraft for reducing weight, improving fuel efficiency, and enhancing the overall design, performance, and manufacturability of airborne vehicles. Materials such as fiberglass reinforced composites (FRC) and carbon-fiber-reinforced polymers (CFRP) are being used to great advantage in airframes, wings, engine nacelles, turbine blades, fairings, fuselage structures, empennage structures, control surfaces and aircraft skins. SansEC sensor technology is a new technical framework for designing, powering, and interrogating sensors to detect various types of damage in composite materials. The source cause of the in-service damage (lightning strike, impact damage, material fatigue, etc.) to the aircraft composite is not relevant. The sensor will detect damage independent of the cause. Damage in composite material is generally associated with a localized change in material permittivity and/or conductivity. These changes are sensed using SansEC. The unique electrical signatures (amplitude, frequency, bandwidth, and phase) are used for damage detection and diagnosis. An operational system and method would incorporate a SansEC sensor array on select areas of the aircraft exterior surfaces to form a "Smart skin" sensing surface. In this paper a new method and system for aircraft in-situ damage detection and diagnosis is presented. Experimental test results on seeded fault damage coupons and computational modeling simulation results are presented. NASA LaRC has demonstrated with individual sensors that SansEC sensors can be effectively used for in-situ composite damage detection of delamination, voids, fractures, and rips. Keywords: Damage Detection, Composites, Integrated Vehicle Health Monitoring (IVHM), Aviation Safety, SansEC Sensors

Dudley, Kenneth L.↗

NASA NTRS1992

Two-dimensional thermal modeling of power monolithic microwave integrated circuits (MMIC's)

Numerical simulations of the two-dimensional temperature distributions for a typical GaAs MMIC circuit are conducted, aiming at understanding the heat conduction process of the circuit chip and providing temperature information for device reliability analysis. The method used is to solve the two-dimensional heat conduction equation with a control-volume-based finite difference scheme. In particular, the effects of the power dissipation and the ambient temperature are examined, and the criterion for the worst operating environment is discussed in terms of the allowed highest device junction temperature.

Fan, Mark S.↗

NASA NTRS2019

Inclusion of Radiation Environment Variability for Reliability Estimates for SiC Power MOSFETs

Variability of the solar energetic particle environment is investigated for single-event-burnout reliability of silicon-carbide power metal-oxide-semiconductor field effect transistors. A probabilistic assessment of failure evaluates the benefits of de-rating voltage, shielding, and mission length. The Prediction of Solar particle Yields for Characterizing Integrating Circuits code is used to calculate a cumulative density function for the fluence of the environment. The lethal ion method is then used to determine what proportion of the environment will cause single-event-burnout. The operating voltage determines the lowest linear-energy-transfer particle that will cause single-event-burnout and that should be included in the environment distribution. The shielding and mission length also determine the final environment distribution of the mission fluence. Through calculating the reliability for different operating voltages, shielding, and mission length for a specific device, it is shown that shielding thickness and operating voltage have a large effect on reliability and can be traded off during the design.

Heavy ion↗

NASA NTRS1971

Active parallel redundancy for electronic integrator-type control circuits

Circuit extends concept of redundant feedback control from type-0 to type-1 control systems. Inactive channels are slaves to the active channel, if latter fails, it is rejected and slave channel is activated. High reliability and elimination of single-component catastrophic failure are important in closed-loop control systems.

Peterson, R. A.↗

NASA NTRS2011

Operation of a New Half-Bridge Gate Driver for Enhancement - Mode GaN FETs, Type LM5113, Over a Wide Temperature Range

A new commercial-off-the-shelf (COTS) gate driver designed to drive both the high-side and the low-side enhancement-mode GaN FETs, National Semiconductor's type LM5113, was evaluated for operation at temperatures beyond its recommended specified limits of -40 C to +125 C. The effects of limited thermal cycling under the extended test temperature, which ranged from -194 C to +150 C, on the operation of this chip as well as restart capability at the extreme cryogenic and hot temperatures were also investigated. The driver circuit was able to maintain good operation throughout the entire test regime between -194 C and +150 C without undergoing any major changes in its outputs signals and characteristics. The limited thermal cycling performed on the device also had no effect on its performance, and the driver chip was able to successfully restart at each of the extreme temperatures of -194 C and +150 C. The plastic packaging of this device was also not affected by either the short extreme temperature exposure or the limited thermal cycling. These preliminary results indicate that this new commercial-off-the-shelf (COTS) halfbridge eGaN FET driver integrated circuit has the potential for use in space exploration missions under extreme temperature environments. Further testing is planned under long-term cycling to assess the reliability of these parts and to determine their suitability for extended use in the harsh environments of space.

Patterson, Richard↗