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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS1993

Reactive system verification case study: Fault-tolerant transputer communication

A reactive program is one which engages in an ongoing interaction with its environment. A system which is controlled by an embedded reactive program is called a reactive system. Examples of reactive systems are aircraft flight management systems, bank automatic teller machine (ATM) networks, airline reservation systems, and computer operating systems. Reactive systems are often naturally modeled (for logical design purposes) as a composition of autonomous processes which progress concurrently and which communicate to share information and/or to coordinate activities. Formal (i.e., mathematical) frameworks for system verification are tools used to increase the users' confidence that a system design satisfies its specification. A framework for reactive system verification includes formal languages for system modeling and for behavior specification and decision procedures and/or proof-systems for verifying that the system model satisfies the system specifications. Using the Ostroff framework for reactive system verification, an approach to achieving fault-tolerant communication between transputers was shown to be effective. The key components of the design, the decoupler processes, may be viewed as discrete-event-controllers introduced to constrain system behavior such that system specifications are satisfied. The Ostroff framework was also effective. The expressiveness of the modeling language permitted construction of a faithful model of the transputer network. The relevant specifications were readily expressed in the specification language. The set of decision procedures provided was adequate to verify the specifications of interest. The need for improved support for system behavior visualization is emphasized.

Crane, D. Francis↗
NASA NTRS1974

Design and flight experience with a digital fly-by-wire control system in an F-8 airplane

A digital fly-by-wire flight control system was designed, built, and for the first time flown in an airplane. The system, which uses components from the Apollo guidance system, is installed in an F-8 airplane as the primary control system. A lunar module guidance computer is the central element in the three-axis, single-channel, multimode, digital control system. A triplex electrical analog system which provides unaugmented control of the airplane is the only backup to the digital system. Flight results showed highly successful system operation, although the trim update rate was inadequate for precise trim changes, causing minor concern. The use of a digital system to implement conventional control laws proved to be practical for flight. Logic functions coded as an integral part of the control laws were found to be advantageous. Although software verification required extensive effort, confidence in the software was achieved.

Deets, D. A.↗
NASA NTRSDate not supplied

Lean Model-Based Systems Engineering on the NASA High-Density Vertiplex Subproject

The High Density Vertiplex (HDV) subproject of NASA’s Advanced Air Mobility (AAM) project adopted Model-Based Systems Engineering (MBSE)in July of 2020, prior to subproject formulation. A small and lean team of HDV Systems Engineers(SE) are utilizing MagicDraw to execute NASA SE processes via MBSE. The SEs learned how to use MagicDraw from scratch and HDV is the first project for which the SEs have utilized MagicDraw. This paper will demonstrate project technical execution via MBSE, utilizing the digital elements built into the SysML (Systems Modeling Language). SysML provides a model-centric means of carrying out the NASA SE common technical processes by providing tools for complete system modeling, including requirements and interface management and design capture. The authors also leverage and extend SysML to perform other SE tasks, such as Verification and Validation (V&V)tracking. MBSE has two main purposes for HDV: 1) documenting the subproject’s logical architecture for distribution outside of the subproject, 2) capturing the subproject’s physical architecture in a single-source-of-truth for use by the subproject’s members. This paper details the challenges, lessons learned, and solutions that were encountered in implementing MBSE in the first iteration on a multi-iteration, full-lifecycle design, build, fly project.

Demetrios Katsaduros↗
NASA NTRSDate not supplied

Lean Model-Based Systems Engineering on the NASA High-Density Vertiplex Subproject

The High Density Vertiplex (HDV) subproject of NASA’s Advanced Air Mobility (AAM) project adopted Model-Based Systems Engineering (MBSE) in July of 2020, prior to subproject formulation. A small and lean team of HDV Systems Engineers (SE) are utilizing MagicDraw to execute NASA SE processes via MBSE. The SEs learned how to use MagicDraw from scratch and HDV is the first project for which the SEs have utilized MagicDraw. This presentation will demonstrate project technical execution via MBSE, utilizing the digital elements built into the SysML (Systems Modeling Language). SysML provides a model-centric means of carrying out the NASA SE common technical processes by providing tools for complete system modeling, including requirements and interface management and design capture. The authors also leverage and extend SysML to perform other SE tasks, such as Verification and Validation (V&V) tracking. MBSE has two main purposes for HDV: 1) documenting the subproject’s logical architecture for distribution outside of the subproject, 2) capturing the subproject’s physical architecture in a single-source-of-truth for use by the subproject’s members. This presentation details the challenges, lessons learned, and solutions that were encountered in implementing MBSE in the first iteration on a multi-iteration, full-lifecycle design, build, fly project.

systems engineering↗
NASA NTRS1993

A formal language for the specification and verification of synchronous and asynchronous circuits

A formal hardware description language for the intended application of verifiable asynchronous communication is described. The language is developed within the logical framework of the Nqthm system of Boyer and Moore and is based on the event-driven behavioral model of VHDL, including the basic VHDL signal propagation mechanisms, the notion of simulation deltas, and the VHDL simulation cycle. A core subset of the language corresponds closely with a subset of VHDL and is adequate for the realistic gate-level modeling of both combinational and sequential circuits. Various extensions to this subset provide means for convenient expression of behavioral circuit specifications.

Russinoff, David M.↗
NASA NTRS1990

Derivation of sorting programs

Program synthesis for critical applications has become a viable alternative to program verification. Nested resolution and its extension are used to synthesize a set of sorting programs from their first order logic specifications. A set of sorting programs, such as, naive sort, merge sort, and insertion sort, were successfully synthesized starting from the same set of specifications.

Varghese, Joseph↗
NASA NTRS1998

Flight Guidance System Validation Using SPIN

To verify the requirements for the mode control logic of a Flight Guidance System (FGS) we applied SPIN, a widely used software package that supports the formal verification of distributed systems. These requirements, collectively called the FGS specification, were developed at Rockwell Avionics & Communications and expressed in terms of the Consortium Requirements Engineering (CoRE) method. The properties to be verified are the invariants formulated in the FGS specification, along with the standard properties of consistency and completeness. The project had two stages. First, the FGS specification and the properties to be verified were reformulated in PROMELA, the input language of SPIN. This involved a semantics issue, as some constructs of the FGS specification do not have well-defined semantics in CoRE. Then we attempted to verify the requirements' properties using the automatic model checking facilities of SPIN. Due to the large size of the state space of the FGS specification an exhaustive state space analysis with SPIN turned out to be impossible. So we used the supertrace model checking procedure of SPIN that provides for a partial analysis of the state space. During this process, we found some subtle errors in the FGS specification.

Naydich, Dimitri↗
NASA NTRS1989

A logical model of cooperating rule-based systems in space mission ground support facilities

This paper describes an abstract reference model of cooperating rule-based systems (CRBSs). The model is intended to assist in the planning, specification, development, and verification of space information systems involving multiple, distributed, communicating rule-based systems. The functions performed in ground control systems are described, and five types of rule-based systems that could be used in such centers are identified. The interactions between rule-based systems are examined, and the unique requirements of such systems are addressed. A four-layer logical model is discussed which provides a framework for discussing solutions to unique CRBS requirements. The elements and operations at each layer are described.

Bailin, Sidney C.↗
NASA NTRS2011

A Multi-Encoding Approach for LTL Symbolic Satisfiability Checking

Formal behavioral specifications written early in the system-design process and communicated across all design phases have been shown to increase the efficiency, consistency, and quality of the system under development. To prevent introducing design or verification errors, it is crucial to test specifications for satisfiability. Our focus here is on specifications expressed in linear temporal logic (LTL). We introduce a novel encoding of symbolic transition-based Buchi automata and a novel, "sloppy," transition encoding, both of which result in improved scalability. We also define novel BDD variable orders based on tree decomposition of formula parse trees. We describe and extensively test a new multi-encoding approach utilizing these novel encoding techniques to create 30 encoding variations. We show that our novel encodings translate to significant, sometimes exponential, improvement over the current standard encoding for symbolic LTL satisfiability checking.

Rozier, Kristin Y.↗
NASA NTRS2013

A Scala DSL for RETE-Based Runtime Verification

Runtime verification (RV) consists in part of checking execution traces against formalized specifications. Several systems have emerged, most of which support specification notations based on state machines, regular expressions, temporal logic, or grammars. The field of Artificial Intelligence (AI) has for an even longer period of time studied rule-based production systems, which at a closer look appear to be relevant for RV, although seemingly focused on slightly different application domains, such as for example business processes and expert systems. The core algorithm in many of these systems is the Rete algorithm. We have implemented a Rete-based runtime verification system, named LogFire (originally intended for offline log analysis but also applicable to online analysis), as an internal DSL in the Scala programming language, using Scala's support for defining DSLs. This combination appears attractive from a practical point of view. Our contribution is in part conceptual in arguing that such rule-based frameworks originating from AI may be suited for RV.

matching problem↗
NASA NTRS2020

First-Order Runtime Verification using BDDs

Runtime Verification (RV) expedites the analyses of execution traces for detecting system errors and for statistical and quality analysis. Having started modestly, with checking temporal properties that are based on propositional (yes/no) values, the current practice of RV often involves properties that are parametrized by the data observed in the input trace. The specifications are based on various formalisms, such as automata, temporal logics, rule systems, and stream processing. Checking execution traces that are data intensive against a specification that imposes strong dependencies between the data, poses a nontrivial challenges; in particular if runtime verification has to be performed online, while many events that carry data appear within small time proximities. Towards achieving this goal, it was recently suggested to represent relations over the observed data values, based on BDDs, where data elements are enumerated and then converted into bit vectors. This representation provided a very simple and natural extension of an RV algorithm from propositional to first-order LTL, but more importantly, was shown to contribute to the memory compactness and to the speed, as was demonstrated using a corresponding implementation. We extend here the capabilities of BDD-based RV with the ability to express timing constraints, where the monitored events include (integer) clock values. We show how to efficiently operate on BDDs that represent both relations on (enumerations of) values and time dependencies, as required by the addition of the time constraints. We demonstrate our algorithm with an efficient implementation and provide experimental results.

Peled, Doron↗
NASA NTRS1983

Graphics enhanced computer emulation for improved timing-race and fault tolerance control system analysis

A computer simulation system has been developed for the Space Shuttle's advanced Centaur liquid fuel booster rocket, in order to conduct systems safety verification and flight operations training. This simulation utility is designed to analyze functional system behavior by integrating control avionics with mechanical and fluid elements, and is able to emulate any system operation, from simple relay logic to complex VLSI components, with wire-by-wire detail. A novel graphics data entry system offers a pseudo-wire wrap data base that can be easily updated. Visual subsystem operations can be selected and displayed in color on a six-monitor graphics processor. System timing and fault verification analyses are conducted by injecting component fault modes and min/max timing delays, and then observing system operation through a red line monitor.

Szatkowski, G. P.↗
NASA NTRSDate not supplied

A Temporal Differential Dynamic Logic Formal Embedding

Differential dynamic logic is a formal framework to specify and reason about hybrid programs (HPs). The core of dL is a proof calculus that contains a collection of axioms and rules for the rigorous verification of properties of HPs. Recently, dL has been embedded within the theorem prover Prototype Verification System (PVS) resulting in the tool Plaidypvs2. The integration of dL into PVS expands its expressive power; user defined functions, such as trigonometric and other transcendental functions, can be used inside the dL framework, and meta-reasoning about HPs can be performed, including reasoning about entire classes of HPs, specified using dependent types in PVS. The differential temporal dynamic logic (dTL2) extends dL with temporal logic operators to reason about all the states reachable during the execution of an HP. This paper presents a work in progress focusing on embedding dTL2 in PVS as an extension of Plaidypvs. Plaidypvs is expanded with the formalization of a trace semantics for HPs, the definition of the LTL temporal operators eventually and globally, and the implementation of the proof calculus for dTL2. This new embedding has the same capabilties as Plaidypvs, which allows user defined functions and meta-reasoning of properties of HPs. To the best of the authors’ knowledge this is the first implementation of dTL2.

differential dynamic logic↗
NASA NTRS1972

Methodology for the systems engineering process. Volume 2: Technical parameters

A scheme based on starting the logic networks from the development and mission factors that are of primary concern in an aerospace system is described. This approach required identifying the primary states (design, design verification, premission, mission, postmission), identifying the attributes within each state (performance capability, survival, evaluation, operation, etc), and then developing the generic relationships of variables for each branch. To illustrate this concept, a system was used that involved a launch vehicle and payload for an earth orbit mission. Examination showed that this example was sufficient to illustrate the concept. A more complicated mission would follow the same basic approach, but would have more extensive sets of generic trees and more correlation points between branches. It has been shown that in each system state (production, test, and use), a logic could be developed to order and classify the parameters involved in the translation from general requirements to specific requirements for system elements.

Nelson, J. H.↗
NASA NTRS2007

The ANMLite Language and Logic for Specifying Planning Problems

We present the basic concepts of the ANMLite planning language. We discuss various aspects of specifying a plan in terms of constraints and checking the existence of a solution with the help of a model checker. The constructs of the ANMLite language have been kept as simple as possible in order to reduce complexity and simplify the verification problem. We illustrate the language with a specification of the space shuttle crew activity model that was constructed under the Spacecraft Autonomy for Vehicles and Habitats (SAVH) project. The main purpose of this study was to explore the implications of choosing a robust logic behind the specification of constraints, rather than simply proposing a new planning language.

Butler, Ricky W.↗
NASA NTRS2002

A Rewriting-Based Approach to Trace Analysis

We present a rewriting-based algorithm for efficiently evaluating future time Linear Temporal Logic (LTL) formulae on finite execution traces online. While the standard models of LTL are infinite traces, finite traces appear naturally when testing and/or monitoring red applications that only run for limited time periods. The presented algorithm is implemented in the Maude executable specification language and essentially consists of a set of equations establishing an executable semantics of LTL using a simple formula transforming approach. The algorithm is further improved to build automata on-the-fly from formulae, using memoization. The result is a very efficient and small Maude program that can be used to monitor program executions. We furthermore present an alternative algorithm for synthesizing probably minimal observer finite state machines (or automata) from LTL formulae, which can be used to analyze execution traces without the need for a rewriting system, and can hence be used by observers written in conventional programming languages. The presented work is part of an ambitious runtime verification and monitoring project at NASA Ames, called PATHEXPLORER, and demonstrates that rewriting can be a tractable and attractive means for experimenting and implementing program monitoring logics.

Havelund, Klaus↗
DOE OSTI2024

MCNPs Easy Sources for (α,n) (MESA):Verification with Sources4c

MESA is intended to be a direct re-implementation of the algorithms documented in the Sources manual in C++. However, some fundamental changes to the computational structure and logic were made to avoid the use of goto, require consistency in input definition, and reduce computational approximations in later steps of three-layer problems. In addition, MESA uses α-decay information from ISC libraries (based on ENDF). In most cases, differences between Sources4c and MESA are dominated by differences in decay energy spectra and intensities. To verify this we have reproduced 6 problems that are documented examples or samples in Sources4c. These problems cover the three types of problems MESA currently supports: homogeneous, interface, and three-layer.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2023

Systems and methods for verification and authentication of remote sensing imagery

A system for generating and authenticating remote sensing imagery includes a remote sensing platform. The remote sensing platform includes an imaging sensor and a hardware logic device that is directly coupled to the imaging sensor. The hardware logic device receives image data from the imaging sensor and generates a cryptographic signature based upon the image data. The hardware logic device outputs a signed image that includes the image data and the cryptographic signature. A computing device operated by a downstream user receives the signed image and can determine whether the image data has been modified from its original content based upon the cryptographic signature.

Crosby, Sean Michael↗