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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

Coexistence and Interplay of Two Ferroelectric Mechanisms in Zn 1-x Mg x O

Ferroelectric materials promise exceptional attributes including low power dissipation, fast operational speeds, enhanced endurance, and superior retention to revolutionize information technology. However, the practical application of ferroelectric-semiconductor memory devices has been significantly challenged by the incompatibility of traditional perovskite oxide ferroelectrics with metal-oxide-semiconductor technology. Recent discoveries of ferroelectricity in binary oxides such as Zn 1-x Mg x O and Hf 1-x Zr x O have been a focal point of research in ferroelectric information technology. Here, this work investigates the ferroelectric properties of Zn 1-x Mg x O utilizing automated band excitation piezoresponse force microscopy. This findings reveal the coexistence of two ferroelectric subsystems within Zn 1-x Mg x O. A “fringing-ridge mechanism” of polarization switching is proposed that is characterized by initial lateral expansion of nucleation without significant propagation in depth, contradicting the conventional domain growth process observed in ferroelectrics. This unique polarization dynamics in Zn 1-x Mg x O suggests a new understanding of ferroelectric behavior, contributing to both the fundamental science of ferroelectrics and their application in information technology.

36 MATERIALS SCIENCE↗
DOE OSTI2022

Thermal Optimization of a Silicon Carbide, Half-Bridge Power Module

This project describes the modeling process to design the packaging and heat exchanger for a half-bridge wide-bandgap (WBG) power semiconductor module. The module uses two silicon carbide, metal-oxide-semiconductor field-effect transistor (MOSFET) devices per switch position that are soldered to an aluminum nitride, direct-bond copper (DBC) substrate. A baseplate cooling configuration (e.g., no thermal grease) is used along with a water-ethylene glycol, jet-impingement-style heat exchanger. The heat exchanger was designed to be fabricated using prototyping equipment from the National Renewable Energy Laboratory, complies with automotive standards (for minimal channel sizes, flow rates, and coolant), and considers reliability aspects (i.e., erosion/corrosion). Device-scale computational fluid dynamics (CFD) is used first to design the slot jet impingement cooling configuration and compute the effective heat transfer coefficient (HTC) of the concept. The computed HTCs are then used as boundary conditions for a finite element study to optimize the package geometry (e.g., device layout and baseplate thickness) to minimize thermal resistance and minimize temperature variation between the module's four devices. Finally, a fluid manifold is designed to generate the slot jets and cool the devices. Module-scale CFD predicts a relatively low junction-to-fluid thermal resistance of 16.7 mm2 K/W, a 1.4 degrees C temperature variation between devices, and a total pressure drop of 5,860 Pa (0.85 psi) for the design. The thermal resistance of the module design is about 67% lower than the 2015 BMW i3 power electronics/modules thermal resistance.

DIRECT ENERGY CONVERSION↗
DOE OSTI2023

A Smart Silicon Carbide Power Module With Pulse Width Modulation Over Wi-Fi and Wireless Power Transfer-Enabled Gate Driver, Featuring Onboard State of Health Estimator and High-Voltage Scaling Capabilities

A wide range of utility applications require controllable switches with features such as high-voltage blocking and high-current carrying capacity, especially at high pulse width modulation (PWM) frequency. Low- and medium-voltage utility applications such as motor drives and flexible AC transmission systems as well as solid state transformers could also benefit from a low-cost high-voltage switching module. Wide-bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) metal oxide semiconductor field effect transistors (MOSFETs) are considered to be the present and next-generation device choices, although they have limitations. For relatively high-voltage applications with demanding thermal management, SiC is still the only choice, and GaN dominates the low-voltage regime. This manuscript proposes a new half-bridge power MOSFET module that is suitable for conventional H-bridge of multilevel configurations used in high-voltage applications. Constructed from bare SiC dies, this half-bridge module takes advantage of (1) optimized MOSFET placement inside the module, (2) customized heat exchanger, manifold, and cooling, (3) integrated gate driver module with pulse width modulation (PWM) over wi-fi to eliminate the need for low-voltage signals, (4) wireless power transfer (WPT)-enabled gate driver and other ancillary circuits, (5) and the option to incorporate an onboard state-of-health (SOH) estimator module. The entire architecture has been designed and built at the National Renewable Energy Laboratory (NREL) in Golden, CO.

Ga2O3 devices↗
NASA NTRS1975

Low cost AMOS solar cell development

Recent developments at JPL have demonstrated that high conversion efficiencies are found with GaAs metal semiconductor solar cells when a particular heat treatment processing step is used to introduce an interfacial layer between the metal and the semiconductor. The new cell, called AMOS (Antireflection-Coated Metal-Oxide-Semiconductor), has open circuit voltages of 0.68-0.72 volts and efficiencies of 15% under terrestrial sunlight, as compared to values of 0.45-0.48 volts and 10%, respectively, for similar cells without an interfacial layer. Potentially higher efficiencies are feasible as further improvements are made in optimizing the interfacial layer effect and in increasing the blue response of the cells. A thin film AMOS cell is proposed that uses a thin recrystallized germanium (Ge) layer between a low cost metal substrate and the vapor phase epitaxially (VPE)-grown GaAs.

Stirn, R. J.↗
NASA NTRS1976

Single crystal and polycrystalline GaAs solar cells using AMOS technology

A description is given of current technology for fabricating single AMOS (antireflection-coated metal oxide semiconductor) solar cells, with attention given to thermal, plasma, and anodic oxidation, native oxide stripping, and X-ray photoelectron spectroscopy results. Some preliminary results are presented on the chemistry and electrical characterization of such cells, and the characteristics of cells fabricated on sliced polycrystalline GaAs wafers are examined. Consideration is also given to the recrystallization of evaporated Ge films for use as low-cost substrates for polycrystalline GaAs solar cells.

Stirn, R. J.↗
NASA NTRS1997

Investigation of Field Emitter Array Vacuum Microtriodes for Space Electronics Applications

Research into processing techniques for fabrication of vacuum microelectronic devices has been carried out, with special emphasis being given to the growth of silicon dioxide thin films. Oxide films ranging from 30 nm to approximately 2 micrometers have been grown on single crystal silicon wafers. Metal-oxide-semiconductor capacitor test structures have been made from some of these oxide films, and current-versus-voltage plots for these structures have been measured. It has been observed that the rate of applied voltage across the oxide films produces marked differences in measured leakage current. Breakdown fields across two of the thinnest oxide films have been measured and are comparable with highest values reported in literature. Several silicon wafers were processed to make field- emitter array diodes, and were delivered to collaborators at NASA-Lewis Research Center for final fabrication steps and testing.

Smith, Mark A.↗
DOE OSTI2023

Direct Visualization of Charge Migration in Bilayer Tantalum Oxide Films by Multimodal Imaging

Inspired by biological neuromorphic computing, artificial neural networks based on crossbar arrays of bilayer tantalum oxide memristors have shown to be promising alternatives to conventional complementary metal-oxide-semiconductor (CMOS) architectures. In order to understand the driving mechanism in these oxide systems, tantalum oxide films are resistively switched by conductive atomic force microscopy (C-AFM), and subsequently imaged by kelvin probe force microscopy (KPFM) and spatially resolved time-of-flight secondary ion mass spectrometry (ToF-SIMS). These workflows enable induction and analysis of the resistive switching mechanism as well as control over the resistively switched region of the film. In this work it is shown that the resistive switching mechanism is driven by both current and electric field effects. Reversible oxygen motion is enabled by applying low (<1 V) electric fields, while high electric fields generate irreversible breakdown of the material (>1 V). Fully understanding oxygen motion and electrical effects in bilayer oxide memristor systems is a fundamental step toward the adoption of memristors as a neuromorphic computing technology.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Interfacial oxide and other species in trimethylaluminum-pretreated atomic layer deposition-Al 2 O 3 /GaN characterized by sputter-assisted ToF-SIMS

Deposition techniques, like atomic layer deposition (ALD), are used to form high-quality dielectrics for GaN-based metal–oxide–semiconductor (MOS) gate structures due to the lack of a reliable thermal oxide in GaN. Moreover, interfacial GaO x from pre-existing native oxides is thought to adversely impact channel carrier dynamics and induce undesired threshold voltage shifts in GaN-based MOS gate structures. Exposure of the GaN surface to the trimethylaluminum (TMA) precursor prior to standard alumina ALD decreases the native oxide layer on GaN, but the extent of chemical modification has not been well studied in the context of interface composition in a MOS gate structure. Herein, we compare annealed 55 nm Al 2 O 3 dielectric films on GaN grown using either a water-first ALD process or a process including sequential pulses of TMA immediately before the initiation of Al 2 O 3 ALD. Time-of-Flight Secondary Ion Mass Spectrometry measures differences in the interfacial GaO x content between each ALD film. Here, it also detects surface contaminant species like Si, F, S, and C. Furthermore, we report the formation of an AlN species at the Al 2 O 3 /GaN interface, which is more prominent for the film grown using the TMA pre-pulse step. In general, this work demonstrates that the TMA pre-pulse step is an effective strategy for cleaning substrate surfaces prior to ALD.

Atomic layer deposition↗
NASA NTRS1985

Electrical characterization of plasma-grown oxides on gallium arsenide

Plasma-grown GaAs oxides and their interfaces have been characterized by measuring the electrical properties of metal-oxide-semiconductor capacitors and of Schottky junctions. The current transport mechanism in the oxide at high electrical field was found to be Frankel-Poole emission, with an electron trap center at 0.47 eV below the conduction band of the oxide. The interface-state density, evaluated from capacitance and conductance measurements, exhibits a U-shaped interface-state continuum extending over the entire band gap. Two discrete deep states with high concentration are superimposed on this continuum at 0.40 and 0.70 eV below the conduction band. The results obtained from measurements on Schottky junctions have excluded the possibility that these two deep states originate from plasma damage. Possible origins of these states are discussed in this paper.

Hshieh, F. I.↗
NASA NTRS1976

Fabrication of OSOS cells by neutral ion beam sputtering

Oxide semiconductor on silicon (OSOS) solar cells have been fabricated from various indium tin oxide (In2O3)x(SnO2)1-x compositions sputtered onto p-type single crystal silicon substrates with a neutralized argon ion beam. High temperature processing or annealing was not required. The highest efficiency was achieved with x = 0.91 and was 12 percent. The cells are environmentally rugged, chemically stable, and show promise for still higher efficiencies. Moreover, the ion beam sputtering fabrication technique is amenable to low cost, continuous processing.

Burk, D. E.↗
DOE OSTI2022

Epitaxial SrTiO 3 films with dielectric constants exceeding 25,000

Significance Semiconductor interfaces are among the most important in use in modern technology. The properties they exhibit can either enable or disable the characteristics of the materials they connect for functional performance. While much is known about important junctions involving conventional semiconductors such as Si and GaAs, there are several unsolved mysteries surrounding interfaces between oxide semiconductors. Here we resolve a long-standing issue concerning the measurement of anomalously low dielectric constants in SrTiO 3 films with record high electron mobilities. We show that the junction between doped and undoped SrTiO 3 required to make dielectric constant measurements masks the dielectric properties of the undoped film. Through modeling, we extract the latter and show that it is much higher than previously measured.

36 MATERIALS SCIENCE↗
NASA NTRS1986

Behavior of inversion layers in 3C silicon carbide

A study on the field-induced surface-charge region in 3C silicon carbide (SiC) using 1 MHz capacitance-voltage (C-V) measurements at room temperature is here reported. A double column mercury probe was used on oxidized SiC substrates to form metal-oxide-semiconductor (MOS) structures. These structures were characterized in terms of the substrate doping profile, effective fixed oxide charge, and interface trap density. A distinctive feature of the MOS C-V curves from accumulation to inversion is that after going into deep depletion the capacitance rises to its equilibrium inversion level during the voltage sweep. Capacitance transient measurements indicate that the minority-carrier generation occurs at the SiO2/SiC interface.

Avila, R. E.↗
DOE OSTI2025

Off-state magnetoresistance in long-channel germanium Schottky-barrier MOSFETs

An increasing magnetic field perpendicular to an undoped semiconductor surface at low temperature is known to strengthen the binding of localized electrons to stationary ions, as the wavefunction's tails evolve from exponential to Gaussian. It is also known that application of a high bias voltage to a depleted semiconductor can liberate bound charge and induce a large drop in electrical resistance. We connect these established results to experimental electrical transport measurements on off-state germanium Schottky-barrier metal–oxide–semiconductor field-effect transistor (MOSFETs) with an aluminum oxide insulating dielectric and platinum germanide contacts. We make measurements at the three distinct orientations of the magnetic field with respect to the substrate and the current. At 6 K, we observe sharp attenuation of current by more than 2 orders of magnitude, within 60 mT, at a crossover magnetic field perpendicular to the substrate. A 1 T magnetic field attenuates the current by more than 4 orders of magnitude. The strength of the attenuation and the value of the crossover field are controlled by both the gate–source and drain–source voltages. The attenuation is much weaker when the magnetic field is parallel to the current. Finally, we orient the magnetic field parallel to the substrate, but perpendicular to the current, allowing us to distinguish charge hopping at the oxide interface from charge hopping in the bulk. In conclusion, this large off-state magnetoresistance can be exploited for cryogenic magnetic- and photo-detection, and for high-bias, low-leakage MOSFETs.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS1999

Multi-Dimensional Quantum Tunneling and Transport Using the Density-Gradient Model

We show that quantum effects are likely to significantly degrade the performance of MOSFETs (metal oxide semiconductor field effect transistor) as these devices are scaled below 100 nm channel length and 2 nm oxide thickness over the next decade. A general and computationally efficient electronic device model including quantum effects would allow us to monitor and mitigate these effects. Full quantum models are too expensive in multi-dimensions. Using a general but efficient PDE solver called PROPHET, we implemented the density-gradient (DG) quantum correction to the industry-dominant classical drift-diffusion (DD) model. The DG model efficiently includes quantum carrier profile smoothing and tunneling in multi-dimensions and for any electronic device structure. We show that the DG model reduces DD model error from as much as 50% down to a few percent in comparison to thin oxide MOS capacitance measurements. We also show the first DG simulations of gate oxide tunneling and transverse current flow in ultra-scaled MOSFETs. The advantages of rapid model implementation using the PDE solver approach will be demonstrated, as well as the applicability of the DG model to any electronic device structure.

Biegel, Bryan A.↗
DOE OSTI2022

Ultrathin ferroic HfO 2 –ZrO 2 superlattice gate stack for advanced transistors

With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO 2 , which remains the material of choice to date. Here we report HfO 2 –ZrO 2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric–antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal–oxide–semiconductor capacitors is equivalent to an effective SiO 2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO 2 -based high-dielectric-constant gate stacks without scavenging the interfacial SiO 2 , which has adverse effects on the electron transport and gate leakage current. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO 2 –ZrO 2 multilayers, stabilized with competing ferroelectric–antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO 2 -based high-dielectric-constant materials.

36 MATERIALS SCIENCE↗