Search NASA⌕ Search

SEARCH · Search NASA

Results for “silicon devices”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 127 records · Page 7
All sourcesNASA NTRSDOE OSTI
NASA NTRS1979

Silicon on Ceramic Process: Silicon Sheet Growth and Device Development for the Large-area Silicon Sheet and Cell Development Tasks of the Low-cost Solar Array Project

The technical and economic feasibility of producing solar cell quality sheet silicon was investigated. It was hoped this could be done by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Work was directed towards the solution of unique cell processing/design problems encountered with the silicon-ceramic (SOC) material due to its intimate contact with the ceramic substrate. Significant progress was demonstrated in the following areas; (1) the continuous coater succeeded in producing small-area coatings exhibiting unidirectional solidification and substatial grain size; (2) dip coater succeeded in producing thick (more than 500 micron) dendritic layers at coating speeds of 0.2-0.3 cm/sec; and (3) a standard for producing total area SOC solar cells using slotted ceramic substrates was developed.

Chapman, P. W.↗
NASA NTRS1979

Silicon-on-ceramic Process: Silicon Sheet Growth and Device Development for the Large-area Silicon Sheet and Cell Development Tasks of the Low-cost Solar Array Project

Significant progress is reported in fabricating a 4 sq cm cell having a 10.1 percent conversion efficiency and a 10 sq cm cell having a 9.2 percent conversion efficiency. The continuous (SCIM) coater succeeded in producing a 16 sq cm coating exhibiting unidirectional solidification and large grain size. A layer was grown at 0.2 cm/sec in the experimental coater which was partially dendritic but also contained a large smooth area approximately 100 micron m thick. The dark characteristic measurements of a typical SCC solar cell yield shunt resistance values of 10K ohms and series resistance values and 0.4 ohm. The production dip-coater is operating at over 50 percent yield in terms of good cell quality material. The most recent run yielded 13 good substrates out of 15.

Chapman, P. W.↗
NASA NTRS1979

Silicon-on Ceramic Process: Silicon Sheet Growth and Device Development for the Large-area Silicon Sheet and Cell Development Tasks of the Low-cost Solar Array Project

The technical and economic feasibility of producing solar cell-quality silicon was investigated. This was done by coating one surface of carbonized ceramic substrates with a thin layer of large-grain polycrystalline silicon from the melt. Significant progress in the following areas was demonstrated: (1) fabricating a 10 sq cm cell having 9.9 percent conversion efficiency; (2) producing a 225 sq cm layer of sheet silicon; and (3) obtaining 100 microns thick coatings at pull speed of 0.15 cm/sec, although approximately 50 percent of the layer exhibited dendritic growth.

Chapman, P. W.↗
NASA NTRS1981

Silicon-on-ceramic process: Silicon sheet growth and device development for the large-area silicon sheet task of the low-cost solar array project

The technical feasibility of producing solar cell quality sheet silicon to meet the DOE 1986 cost goal of 70 cents/watt was investigated. The silicon on ceramic approach is to coat a low cost ceramic substrate with large grain polycrystalline silicon by unidirectional solidification of molten silicon. Results and accomplishments are summarized.

Whitehead, A. B.↗
NASA NTRS1981

Silicon-on ceramic process: Silicon sheet growth and device development for the large-area silicon sheet task of the low-cost solar array project

The technical feasibility of producing solar-cell-quality sheet silicon to meet the Department of Energy (DOE) 1986 overall price goal of $0.70/watt was investigated. With the silicon-on-ceramic (SOC) approach, a low-cost ceramic substrate is coated with large-grain polycrystalline silicon by unidirectional solidification of molten silicon. This effort was divided into several areas of investigation in order to most efficiently meet the goals of the program. These areas include: (1) dip-coating; (2) continuous coating designated SCIM-coating, and acronym for Silicon Coating by an Inverted Meniscus (SCIM); (3) material characterization; (4) cell fabrication and evaluation; and (5) theoretical analysis. Both coating approaches were successful in producing thin layers of large grain, solar-cell-quality silicon. The dip-coating approach was initially investigated and considerable effort was given to this technique. The SCIM technique was adopted because of its scale-up potential and its capability to produce more conventiently large areas of SOC.

Grung, B. L.↗
NASA NTRS1998

Preparation and Surface Analysis of a Fluorinated Amorphous Silicon for Photo-voltaic Device Application

Amorphous silicon films (a-Si:H) have been routinely deposited on a variety of substrates. Surface and interfacial studies were carried out with a PHI 5600 X-ray photo electron spectrometer. Co-deposition with fluorine yielded films having oxygen present as bulk oxide. The higher the fluorine content, the greater the amount of bulk oxygen observed. The presence of oxygen may be a contributing factor to inconsistent film properties of fluorine doped silicon materials, reported else where. A definite chemical interface between a layer containing fluorine and a layer made from pure silane has been delineated.

McWhinney, Hylton G.↗
NASA NTRS1991

Development of silicon carbide semiconductor devices for high temperature applications

The semiconducting properties of electronic grade silicon carbide crystals, such as wide energy bandgap, make it particularly attractive for high temperature applications. Applications for high temperature electronic devices include instrumentation for engines under development, engine control and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Discrete prototype SiC devices were fabricated and tested at elevated temperatures. Grown p-n junction diodes demonstrated very good rectification characteristics at 870 K. A depletion-mode metal-oxide-semiconductor field-effect transistor was also successfully fabricated and tested at 770 K. While optimization of SiC fabrication processes remain, it is believed that SiC is an enabling high temperature electronic technology.

Matus, Lawrence G.↗
NASA NTRS2012

The Effects of Thermal Cycling on Gallium Nitride and Silicon Carbide Semiconductor Devices for Aerospace Use

Electronics designed for use in NASA space missions are required to work efficiently and reliably under harsh environment conditions. These Include radiation, extreme temperatures, thermal cycling, to name a few. Preliminary data obtained on new Gallium Nitride and Silicon Carbide power devices under exposure to radiation followed by long term thermal cycling are presented. This work was done in collaboration with GSFC and JPL in support of the NASA Electronic Parts and Packaging (NEPP) Program

Patterson, Richard L.↗
NASA NTRS1980

Empirical study of the interaction of silicon substrate thinness, device design, and solar cell processing

Processing experiments using wire-saw techniques to slice thin silicon wafers are described. Substrates were sliced directly to 17 mil, 8 mil, and 5 mil thicknesses. Some of the 8 mil substrates and all of the 5 mil substrates were chemically etched to 7 and 4 mils, respectively, to guarantee removal of any saw damage. The wafers wire sawed to 17 mil thicknesses were processed as reference cells. A baseline process which results in an n(+)-p cell structure, and two advanced processes which provide n(+)-p-p(+) structures were utilized. By using a p(+) enhancement layer on the solar cell back surface, the performance of the 7 mil wafers was increased to exceed that of the 17 mil solar cells with simple n(+)-p structures. Cells fabricated by an ion implantation sequence utilizing elemental boron and phosphorus implants were shown to be capable of equalling or exceeding the performance of cells fabricated by an equivalent all-diffusion process.

Pryor, R. A.↗
DOE OSTI2021

Silicon Materials and Devices

To contribute to the U.S. Department of Energy's involvement with the U.S. photovoltaic (PV) industry's efforts to meet very competitive PV efficiency, cost, and reliability goals, NREL's Silicon PV program focuses on next-generation, high-efficiency silicon (Si) PV.

14 SOLAR ENERGY↗
DOE OSTI2020

Using a carbon vacancy reduction material to increase average carrier lifetime in a silicon carbide semiconductor device

A semiconductor die and a process for fabricating the semiconductor die are disclosed. The semiconductor die has a substrate and a silicon carbide (SiC) epitaxial structure on the substrate. The SiC epitaxial structure includes at least a first N-type SiC layer, at least a first P-type SiC layer, and carbon vacancy reduction material, which has been implanted into a surface of the SiC epitaxial structure. Further, the SiC epitaxial structure has been annealed to mobilize the carbon vacancy reduction material to diffuse carbon atoms substantially throughout the SiC epitaxial structure, thereby increasing an average carrier lifetime in the SiC epitaxial structure.

36 MATERIALS SCIENCE↗
NASA NTRS1981

Semiconductor technology program: Progress briefs

Measurement technology for semiconductor materials, process control, and devices, is discussed. Silicon and silicon based devices are emphasized. Highlighted activities include semiinsulating GaAs characterization, an automatic scanning spectroscopic ellipsometer, linewidth measurement and coherence, bandgap narrowing effects in silicon, the evaluation of electrical linewidth uniformity, and arsenicomplanted profiles in silicon.

Galloway, K. F.↗
NASA NTRS1986

Area Reports. Advanced materials and devices research area. Silicon materials research task, and advanced silicon sheet task

The objectives of the Silicon Materials Task and the Advanced Silicon Sheet Task are to identify the critical technical barriers to low-cost silicon purification and sheet growth that must be overcome to produce a PV cell substrate material at a price consistent with Flat-plate Solar Array (FSA) Project objectives and to overcome these barriers by performing and supporting appropriate R&D. Progress reports are given on silicon refinement using silane, a chemical vapor transport process for purifying metallurgical grade silicon, silicon particle growth research, and modeling of silane pyrolysis in fluidized-bed reactors.

Source record↗
NASA NTRS1988

Microwave and millimeter-wave power generation in silicon carbide avalanche devices

Numerical simulations were performed to investigate the typical power-generating capabilities of SiC IMPATT diodes. Using available material parameters, SiC double-drift IMPATT diodes were simulated at 10, 35, 60, and 94 GHz, and the operating characteristics of these devices were compared to those of Si and GaAs devices. Compared to the Si and GaAs IMPATT performances in the pulsed mode, the SiC IMPATT performance was found to be far superior. The performance of SiC devices in the CW mode was also superior to that of GaAs devices, especially at lower frequencies. At a high frequency (94 GHz), the performance of the SiC device was found to be comparable to that of Si devices.

Mehdi, I.↗
NASA NTRS1990

Silicon carbide semiconductor device fabrication and characterization

A number of basic building blocks i.e., rectifying and ohmic contacts, implanted junctions, MOS capacitors, pnpn diodes and devices, such as, MESFETs on both alpha and beta SiC films were fabricated and characterized. Gold forms a rectifying contact on beta SiC. Since Au contacts degrade at high temperatures, these are not considered to be suitable for high temperature device applications. However, it was possible to utilize Au contact diodes for electrically characterizing SiC films. Preliminary work indicates that sputtered Pt or Pt/Si contacts on beta SiC films are someways superior to Au contacts. Sputtered Pt layers on alpha SiC films form excellent rectifying contacts, whereas Ni layers following anneal at approximately 1050 C provide an ohmic contact. It has demonstrated that ion implantation of Al in substrates held at 550 C can be successfully employed for the fabrication of rectifying junction diodes. Feasibility of fabricating pnpn diodes and platinum gated MESFETs on alpha SiC films was also demonstrated.

Davis, R. F.↗