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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,351 records · Page 75
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Comparative Performance of Low Global Warming Potential (GWP) Refrigerants as Replacement for R-410A in a Regular 2-Speed Heat Pump for Sustainable Cooling

Heat pumps are currently being developed to reduce the energy footprint for residential and commercial building space conditioning and water heating loads in cold climates. To mitigate the nocuous impact of greenhouse gas emissions on the environment, and to create a carbon-neutral building stock, alternate lower-GWP refrigerants must also replace the predominant use of R-410A, without re-engineering the mechanical hardware. In this paper, we analyze the performance of lower-GWP alternative refrigerants (R-32, R-452B, R-454B, and R-466A) relative to the conventional R-410A and draw conclusions on the relative performances to meet cooling loads. The simulations are accomplished using the heat pump design model, a well-known, public-domain design tool with a free web interface and downloadable desktop version to support public use and the HVAC R&D community. The contributions contain detailed, hardware-based heat exchanger and system analyses to provide a comprehensive assessment. The results of the simulation are scrutinized from the first (capacity and energy efficiency) and second laws (exergy analysis) to identify sources of systemic inefficiency, the root cause of lost work. This rigorous approach provides an exhaustive analysis of alternate lower-GWP refrigerants to replace R-410A using the same hardware. The results have practical value in engineering heat pumps in an economy that is compelled to alter by the consequences and uncertainties of climate change, to reduce its anthropogenic carbon footprint.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2022

Prototype hardware design and testing of the global common module for the global trigger subsystem of the ATLAS phase-II upgrade

We report the High-Luminosity Large Hadron Collider (HL-LHC) will deliver more than ten times the integrated luminosity of the previous runs combined. Meeting its stricter throughput requirements poses new challenges to the Trigger and Data Acquisition (TDAQ) systems of the LHC experiments. Introduced in the framework of the ATLAS experiment’s HL upgrade, the Global Trigger (GT) is a new subsystem which will perform offline-like algorithms on full-granularity calorimeter data. The implementation of the GT’s functionality is firmware-focused and is composed of three layers: multiplexing (or data aggregating), global event processing, and demultiplexing interface to the central trigger processor. Each layer will be composed of several, similar nodes, hosted on replicas of identical hardware, the Global Common Module (GCM), an ATCA front board which is designed to be adopted throughout the entire GT subsystem. This article proceeds from the TWEPP 2021 conference and presents the GCM hardware design, performed in 2020, and focuses on some key results of its extensive testing performed in 2021.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2018

A Strawman for an HPC PowerStack

The landscape of High-Performance Computing (HPC) is changing as we enter the exascale era and power and energy management are key design points for any next generation of supercomputers. Efficiently utilizing procured power and optimizing performance of scientific applications under power and energy constraints is challenging due to several reasons including dynamic phase behavior, processor manufacturing variability and increasing heterogeneity of node-level components. Extending the scope from the node- and application-level up to the system-level introduces further challenges on top of power-unaware job scheduling, which is known to be NP-hard on its own. While there exists several individual efforts across the community to research automatic techniques for managing power and energy better, the majority of these techniques have been specialized to meet the needs of a specific HPC center or specific optimization goals and provide little support to connect them to each other. Some projects, most notably the PowerAPI efforts [1], discuss interfaces that form a good starting point for full stack integration, but these interfaces still need to be hooked up to the wide range of software components offered by academic partners, developers or vendors. Furthermore, a recent survey conducted by the EE HPC WG concluded that the majority of such techniques have lacked the application-awareness required to achieve the best system performance and throughput. Other observations were that each technique tended to target management of power and energy for a different subset of the site or system hardware and that the different techniques tended to perform management at different (and often conflicting) granularities. Unfortunately, the existing techniques have not been designed to coexist simultaneously on one site and cooperate on management in an integrated manner [2]. The lack of application-awareness, lack of coordinated management across different granularities, and the lack of widely accepted interfaces and consequent limited connectivity between modules, can result in substantially underutilized Watts and FLOPS. To address these gaps, the HPC community needs a holistic stack for power and energy management and none currently exists. In our view, a holistic stack is one that is extensible enough to support the present and anticipated future needs of various different HPC centers, one that achieves best system performance and throughput through application-awareness, one that is designed to coordinate management at different granularities, and one that enables the seamless integration of software components from different developers and vendors. In this seminar, our goal is bring together experts from academia, research laboratories, and industry in order to take stock of existing approaches, design points and power management concepts and requirements at the various participant’s institutions, and to design concepts for a holistic power and energy management stack, which we refer to as the HPC PowerStack. Further, we hope to take steps toward defining the interfaces necessary for providing a complete prototype shared among many groups. The intention is to align development and research efforts across the community so that we may share development resources, avoid duplicating effort, agree on common interfaces and reap the rewards together as a community. The intended final outcome of this collaboration will be a holistic, flexible and extensible concept of a software stack ecosystem that allows us to combine product-grade open-source software components to enable runtime optimization of system power, energy, and performance.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS2003

Software for Managing Inventory of Flight Hardware

The Flight Hardware Support Request System (FHSRS) is a computer program that relieves engineers at Marshall Space Flight Center (MSFC) of most of the non-engineering administrative burden of managing an inventory of flight hardware. The FHSRS can also be adapted to perform similar functions for other organizations. The FHSRS affords a combination of capabilities, including those formerly provided by three separate programs in purchasing, inventorying, and inspecting hardware. The FHSRS provides a Web-based interface with a server computer that supports a relational database of inventory; electronic routing of requests and approvals; and electronic documentation from initial request through implementation of quality criteria, acquisition, receipt, inspection, storage, and final issue of flight materials and components. The database lists both hardware acquired for current projects and residual hardware from previous projects. The increased visibility of residual flight components provided by the FHSRS has dramatically improved the re-utilization of materials in lieu of new procurements, resulting in a cost savings of over $1.7 million. The FHSRS includes subprograms for manipulating the data in the database, informing of the status of a request or an item of hardware, and searching the database on any physical or other technical characteristic of a component or material. The software structure forces normalization of the data to facilitate inquiries and searches for which users have entered mixed or inconsistent values.

Salisbury, John↗
DOE OSTI2021

Hardware-in-the-Loop Evaluation of an Advanced Distributed Energy Resource Management Algorithm: Preprint

This paper presents the laboratory performance evaluation of voltage regulation under a new distributed energy resource management system (DERMS) algorithm via an advanced hardware-in-tbe-loop (HIL) platform. The HIL platform provides realistic testing in a laboratory environment, including the accurate modeling of a full-scale real-world distribution system from a utility partner, the DERMS software controller, and power hardware photovoltaic (PV) inverters. The new DERMS algorithm is developed based on online multiobjective optimization (OMOO) algorithms that perform fast dispatch of distributed solar PV simulated in a real-time digital simulator and real physical hardware devices. Experimental tests confirm the correct functioning of the HIL platform for evaluating controller algorithms and satisfactory voltage regulation performance of the developed OMOO algorithms.

41 EE - Solar Energy Technologies Office (EE-4S)↗
NASA NTRS1987

Independent Orbiter Assessment (IOA): Analysis of the remote manipulator system

The results of the Independent Orbiter Assessment (IOA) of the Failure Modes and Effects Analysis (FMEA) and Critical Items List (CIL) are presented. The IOA approach features a top-down analysis of the hardware to determine failure modes, criticality, and potential critical items (PCIs). To preserve independence, this analysis was accomplished without reliance upon the results contained within the NASA FMEA/CIL documentation. The independent analysis results for the Orbiter Remote Manipulator System (RMS) are documented. The RMS hardware and software are primarily required for deploying and/or retrieving up to five payloads during a single mission, capture and retrieve free-flying payloads, and for performing Manipulator Foot Restraint operations. Specifically, the RMS hardware consists of the following components: end effector; displays and controls; manipulator controller interface unit; arm based electronics; and the arm. The IOA analysis process utilized available RMS hardware drawings, schematics and documents for defining hardware assemblies, components and hardware items. Each level of hardware was evaluated and analyzed for possible failure modes and effects. Criticality was assigned based upon the severity of the effect for each failure mode. Of the 574 failure modes analyzed, 413 were determined to be PCIs.

Tangorra, F.↗
NASA NTRS1992

H2 arcjet performance mapping program

Work performed during the period of Mar. 1991 to Jan. 1992 is reviewed. High power H2 arcjets are being considered for electric powered orbit transfer vehicles (EOTV). Mission analyses indicate that the overall arcjet thrust efficiency is very important since increasing the efficiency increases the thrust, and thereby reduces the total trip time for the same power. For example, increasing the thrust efficiency at the same specific impulse from 30 to 40 percent will reduce the trip time by 25 percent. For a 200 day mission, this equates to 50 days, which results in lower ground costs and less time during which the payload is dormant. Arcjet performance levels of 1200 seconds specific impulse (lsp) at 35 to 40 percent efficiency with lifetimes over 1000 hours are needed to support EOTV missions. Because of the potential very high efficiency levels, the objective of this program was to evaluate the ability of a scaled Giannini-style thruster to achieve the performance levels while operating at a reduced nominal power of 10 kW. To meet this objective, a review of past literature was conducted; scaling relationships were developed and applied to establish critical dimensions; a development thruster was designed with the aid of the plasma analysis model KARNAC and finite element thermal modeling; test hardware was fabricated; and a series of performance tests were conducted in RRC's Cell 11 vacuum chamber with its null-balance thrust stand.

Source record↗
DOE OSTI2020

Error-mitigated data-driven circuit learning on noisy quantum hardware

Application-level benchmarks measure how well a quantum device performs meaningful calculations. In the case of parameterized circuit training, the computational task is the preparation of a target quantum state via optimization over a loss landscape. This is complicated by various sources of noise, fixed hardware connectivity, and generative modeling, the choice of target distribution. Gradient-based training has become a useful benchmarking task for noisy intermediate-scale quantum computers because of the additional requirement that the optimization step uses the quantum device to estimate the loss function gradient. In this work, we use gradient-based data-driven circuit learning to qualitatively evaluate the performance of several superconducting platform devices and present results that show how error mitigation can improve the training of quantum circuit Born machines with 28 tunable parameters.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
NASA NTRS1986

Independent Orbiter Assessment (IOA): Analysis of the guidance, navigation, and control subsystem

The results of the Independent Orbiter Assessment (IOA) of the Failure Modes and Effects Analysis (FMEA) and Critical Items List (CIL) is presented. The IOA approach features a top-down analysis of the hardware to determine failure modes, criticality, and potential critical items. To preserve independence, this analysis was accomplished without reliance upon the results contained within the NASA FMEA/CIL documentation. The independent analysis results corresponding to the Orbiter Guidance, Navigation, and Control (GNC) Subsystem hardware are documented. The function of the GNC hardware is to respond to guidance, navigation, and control software commands to effect vehicle control and to provide sensor and controller data to GNC software. Some of the GNC hardware for which failure modes analysis was performed includes: hand controllers; Rudder Pedal Transducer Assembly (RPTA); Speed Brake Thrust Controller (SBTC); Inertial Measurement Unit (IMU); Star Tracker (ST); Crew Optical Alignment Site (COAS); Air Data Transducer Assembly (ADTA); Rate Gyro Assemblies; Accelerometer Assembly (AA); Aerosurface Servo Amplifier (ASA); and Ascent Thrust Vector Control (ATVC). The IOA analysis process utilized available GNC hardware drawings, workbooks, specifications, schematics, and systems briefs for defining hardware assemblies, components, and circuits. Each hardware item was evaluated and analyzed for possible failure modes and effects. Criticality was assigned based upon the severity of the effect for each failure mode.

Trahan, W. H.↗
NASA NTRS1989

First incremental buy for Increment 2 of the Space Transportation System (STS)

Thiokol manufactured and delivered 9 flight motors to KSC on schedule. All test flights were successful. All spent SRMs were recovered. Design, development, manufacture, and delivery of required transportation, handling, and checkout equipment to MSFC and to KSC were completed on schedule. All items of data required by DPD 400 were prepared and delivered as directed. In the system requirements and analysis area, the point of departure from Buy 1 to the operational phase was developed in significant detail with a complete set of transition documentation available. The documentation prepared during the Buy 1 program was maintained and updated where required. The following flight support activities should be continued through other production programs: as-built materials usage tracking on all flight hardware; mass properties reporting for all flight hardware until sample size is large enough to verify that the weight limit requirements were met; ballistic predictions and postflight performance assessments for all production flights; and recovered SRM hardware inspection and anomaly identification. In the safety, reliability, and quality assurance area, activities accomplished were assurance oriented in nature and specifically formulated to prevent problems and hardware failures. The flight program to date has adequately demonstrated the success of this assurance approach. The attention focused on details of design, analysis, manufacture, and inspection to assure the production of high-quality hardware has resulted in the absence of flight failures. The few anomalies which did occur were evaluated, design or manufacturing changes incorporated, and corrective actions taken to preclude recurrence.

Source record↗
NASA NTRS1995

Multiphase complete exchange on Paragon, SP2 and CS-2

The overhead of interprocessor communication is a major factor in limiting the performance of parallel computer systems. The complete exchange is the severest communication pattern in that it requires each processor to send a distinct message to every other processor. This pattern is at the heart of many important parallel applications. On hypercubes, multiphase complete exchange has been developed and shown to provide optimal performance over varying message sizes. Most commercial multicomputer systems do not have a hypercube interconnect. However, they use special purpose hardware and dedicated communication processors to achieve very high performance communication and can be made to emulate the hypercube quite well. Multiphase complete exchange has been implemented on three contemporary parallel architectures: the Intel Paragon, IBM SP2 and Meiko CS-2. The essential features of these machines are described and their basic interprocessor communication overheads are discussed. The performance of multiphase complete exchange is evaluated on each machine. It is shown that the theoretical ideas developed for hypercubes are also applicable in practice to these machines and that multiphase complete exchange can lead to major savings in execution time over traditional solutions.

Bokhari, Shahid H.↗
NASA NTRS2009

Sequential Principal Component Analysis -An Optimal and Hardware-Implementable Transform for Image Compression

This paper presents the JPL-developed Sequential Principal Component Analysis (SPCA) algorithm for feature extraction / image compression, based on "dominant-term selection" unsupervised learning technique that requires an order-of-magnitude lesser computation and has simpler architecture compared to the state of the art gradient-descent techniques. This algorithm is inherently amenable to a compact, low power and high speed VLSI hardware embodiment. The paper compares the lossless image compression performance of the JPL's SPCA algorithm with the state of the art JPEG2000, widely used due to its simplified hardware implementability. JPEG2000 is not an optimal data compression technique because of its fixed transform characteristics, regardless of its data structure. On the other hand, conventional Principal Component Analysis based transform (PCA-transform) is a data-dependent-structure transform. However, it is not easy to implement the PCA in compact VLSI hardware, due to its highly computational and architectural complexity. In contrast, the JPL's "dominant-term selection" SPCA algorithm allows, for the first time, a compact, low-power hardware implementation of the powerful PCA algorithm. This paper presents a direct comparison of the JPL's SPCA versus JPEG2000, incorporating the Huffman and arithmetic coding for completeness of the data compression operation. The simulation results show that JPL's SPCA algorithm is superior as an optimal data-dependent-transform over the state of the art JPEG2000. When implemented in hardware, this technique is projected to be ideally suited to future NASA missions for autonomous on-board image data processing to improve the bandwidth of communication.

Duong, Tuan A.↗
NASA NTRS2000

Development of a Flush Airdata Sensing System on a Sharp-Nosed Vehicle for Flight at Mach 3 to 8

NASA Dryden Flight Research Center has developed a flush airdata sensing (FADS) system on a sharp-nosed, wedge-shaped vehicle. This paper details the design and calibration of a real-time angle-of-attack estimation scheme developed to meet the onboard airdata measurement requirements for a research vehicle equipped with a supersonic-combustion ramjet engine. The FADS system has been designed to perform in flights at Mach 3-8 and at -6 deg - 12 deg angle of attack. The description of the FADS architecture includes port layout, pneumatic design, and hardware integration. Predictive models of static and dynamic performance are compared with wind-tunnel results across the Mach and angle-of-attack range. Results indicate that static angle-of-attack accuracy and pneumatic lag can be adequately characterized and incorporated into a real-time algorithm.

Davis, Mark C.↗
NASA NTRS1985

Shuttle avionics software development trials: Tribulations and successes, the backup flight system

The development and verification of the Backup Flight System software (BFS) is discussed. The approach taken for the BFS was to develop a very simple and straightforward software program and then test it in every conceivable manner. The result was a program that contained approximately 12,000 full words including ground checkout and the built in test program for the computer. To perform verification, a series of tests was defined using the actual flight type hardware and simulated flight conditions. Then simulated flights were flown and detailed performance analysis was conducted. The intent of most BFS tests was to demonstrate that a stable flightpath could be obtained after engagement from an anomalous initial condition. The extention of the BFS to meet the requirements of the orbital flight test phase is also described.

Chevers, E. S.↗
NASA NTRS1996

Performance Evaluation of Communication Software Systems for Distributed Computing

In recent years there has been an increasing interest in object-oriented distributed computing since it is better quipped to deal with complex systems while providing extensibility, maintainability, and reusability. At the same time, several new high-speed network technologies have emerged for local and wide area networks. However, the performance of networking software is not improving as fast as the networking hardware and the workstation microprocessors. This paper gives an overview and evaluates the performance of the Common Object Request Broker Architecture (CORBA) standard in a distributed computing environment at NASA Ames Research Center. The environment consists of two testbeds of SGI workstations connected by four networks: Ethernet, FDDI, HiPPI, and ATM. The performance results for three communication software systems are presented, analyzed and compared. These systems are: BSD socket programming interface, IONA's Orbix, an implementation of the CORBA specification, and the PVM message passing library. The results show that high-level communication interfaces, such as CORBA and PVM, can achieve reasonable performance under certain conditions.

Fatoohi, Rod↗
DOE OSTI2018

Scalable FPGA Accelerator for Deep Convolutional Neural Networks with Stochastic Streaming

Here, FPGA-based heterogeneous computing platform, due to its extreme logic reconfigurability, emerges to be a strong contender as computing fabric in modern AI. As a result, various FPGA-based accelerators for deep CNN—the key driver of modern AI—have been proposed due to their advantages of high performance, reconfigurability, and fast development round, etc. In general, the consensus among researchers is that, although FPGA-based accelerator can achieve much higher energy efficiency, its raw computing performance lags behind when compared with GPUs with similar logic density. In this paper, we develop an alternative methodology to efficiently implement CNNs with FPGAs that outperform GPUs in terms of both power consumption and performance. Our key idea is to design a scalable hardware architecture and circuit design for large-scale CNNs that leverages a stochastic-based computing principle. Specifically, there are three major performance advantages. First, all key components of our deep learning CNN are designed and implemented to compute stochastically, thus achieving excellent computing performance and energy efficiency. Second, because our proposed CNN architecture enables a stream-mode computing, all of its stages can process even the partial results from preceding stages, therefore not incurring unnecessary latency due to data dependency. Finally, our FPGA-based deep CNN also provides a superior hardware scalability when compared with conventional FPGA implementations by reducing the bandwidth requirement between layers. The results show that our proposed CNN architecture significantly outperforms all previous FPGA-based deep CNN implementation approaches. It achieves 1.58x more GOPS, 6.42x more GOPS/Slice, and 10.92x more GOPS/W when compared with state-of-the-art CNN architecture. The top-5 accuracy of stochastic VGG-16 CNN is 86.77 percent with 18.91 fps frame rate.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2019

Abstract Machine Models and Proxy Architectures for Exascale Computing

To achieve exascale computing, fundamental hardware architectures must change. The most significant consequence of this assertion is the impact on the scientific and engineering applications that run on current high performance computing (HPC) systems, many of which codify years of scientific domain knowledge and refinements for contemporary computer systems. In order to adapt to exascale architectures, developers must be able to reason about new hardware and determine what programming models and algorithms will provide the best blend of performance and energy efficiency into the future. While many details of the exascale architectures are undefined, an abstract machine model is designed to allow application developers to focus on the aspects of the machine that are important or relevant to performance and code structure. These models are intended as communication aids between application developers and hardware architects during the co-design process. We use the term proxy architecture to describe a parameterized version of an abstract machine model, with the parameters added to elucidate potential speeds and capacities of key hardware components. These more detailed architectural models are formulated to enable discussion between the developers of analytic models and simulators and computer hardware architects. They allow for application performance analysis and hardware optimization opportunities. In this report our goal is to provide the application development community with a set of models that can help software developers prepare for exascale. In addition, through the use of proxy architectures, we can enable a more concrete exploration of how well new and evolving application codes map onto future architectures. This second version of the document addresses system scale considerations and provides a system-level abstract machine model with proxy architecture information.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS2011

International Space Station Passive Thermal Control System Analysis, Top Ten Lessons-Learned

The International Space Station (ISS) has been on-orbit for over 10 years, and there have been numerous technical challenges along the way from design to assembly to on-orbit anomalies and repairs. The Passive Thermal Control System (PTCS) management team has been a key player in successfully dealing with these challenges. The PTCS team performs thermal analysis in support of design and verification, launch and assembly constraints, integration, sustaining engineering, failure response, and model validation. This analysis is a significant body of work and provides a unique opportunity to compile a wealth of real world engineering and analysis knowledge and the corresponding lessons-learned. The analysis lessons encompass the full life cycle of flight hardware from design to on-orbit performance and sustaining engineering. These lessons can provide significant insight for new projects and programs. Key areas to be presented include thermal model fidelity, verification methods, analysis uncertainty, and operations support.

Iovine, John↗