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The libMesh Finite Element Library: a case for Object-Oriented High-Performance Computing
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High Performance Computing Incubator: Overview and Impact
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Efficient Uncertainty Quantification Using High Performance Computing and Scientific Machine Learning
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Deciphering Spaceflight Medical Risks Using High-Performance Computing and Next Generation Sequencing Data From Model Organisms
Somatic mutations are acquired point mutations and other forms of genetic alteration in the DNA of somatic cells in the body. Unlike germline mutations, which can be passed on from one individual to another, somatic mutations are not heritable. Somatic mutation (also called genetic sequence variation) has been recognized for decades as an important mechanism for initiating the development of cancer. Now, with the advent of next generation sequencing (NGS), the study of somatic mutation has become much more accessible, enabling genome scientists to characterize somatic mutations in a comprehensive fashion across the entire genome. From recent studies, it is now apparent that other disease processes besides cancer may be influenced by somatic mutation as well, including degenerative processes and inflammatory diseases. Cancer, degenerative diseases and inflammatory processes are all of concern in the setting of spaceflight. Study of somatic mutation analysis, therefore, is an important new tool for examining some of the earliest changes in the genome that lead to disease. This approach has tremendous potential for NASA, for analysis of both model organisms and humans.
A Partitioned - Task Parallel Implementation of the NASA Multiscale Analysis Tool for High Performance Computing
The NASA Multiscale Analysis Tool (NASMAT) is a platform for multiscale modeling of composites which can perform analysis of materials with any arbitrary number of length scales. The platform supports modularity, scalability, and interoperability using recursive procedures and data structures. A Macro solver driven parallelization scheme often limits the capability of NASMAT to scale as it has access to limited memory and number of cores (often one core/thread) and often forces to implement macro solver specific changes to the platform. In this work, a partitioned task-parallel approach is adopted, where the parallelization strategy adopted for NASMAT is independent of the macro solver and the computational resources are managed independently. The programming architecture takes into account the hierarchy of multiple scales (task-dependence) and the heterogeneous nature (dynamic load balancing) of computation through implementation of a hierarchy-informed task parallel model. The partitioned nature of the framework further extends the “plug and play” capability of NASMAT. preCICE, an open-source library for coupling multiphysics solver in a partitioned manner, is adopted to integrate NASMAT with an external macro solver by implementing a NASMAT adapter for preCICE. Speedup and scalability of the framework is studied for micromechanical models of varying size.
The Future of High Performance Computing in Space – The Path Ahead A NASA Perspective
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VnV: A Self Documenting Testing Framework for In-situ Verification and Validation in High Performance Computing Applications
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Workload-adaptive Scheduling for Efficient Use of Parallel File Systems in High-performance Computing Clusters
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High Performance Computing User Group Meeting - December 10, 2025
INL HPC team provided updates related to the INL HPC program and HPC systems for HPC User Group Quarterly Review - December 10, 2025
High Performance Computing User Group Meeting - March 11, 2026
INL HPC team provided updates related to the INL HPC program and HPC systems for HPC User Group Quarterly Review - March 11, 2026
Challenges of Future High-End Computing
The next major milestone in high performance computing is a sustained rate of one Pflop/s (also written one petaflops, or 10(circumflex)15 floating-point operations per second). In addition to prodigiously high computational performance, such systems must of necessity feature very large main memories, as well as comparably high I/O bandwidth and huge mass storage facilities. The current consensus of scientists who have studied these issues is that "affordable" petaflops systems may be feasible by the year 2010, assuming that certain key technologies continue to progress at current rates. One important question is whether applications can be structured to perform efficiently on such systems, which are expected to incorporate many thousands of processors and deeply hierarchical memory systems. To answer these questions, advanced performance modeling techniques, including simulation of future architectures and applications, may be required. It may also be necessary to formulate "latency tolerant algorithms" and other completely new algorithmic approaches for certain applications. This talk will give an overview of these challenges.
High Performance Spacecraft Computing (HPSC) Middleware Update
High Performance Spacecraft Computing (HPSC) is a joint project between the National Aeronautics and Space Administration (NASA) and Air Force Research Lab (AFRL) to develop a high-performance multi-core radiation hardened flight processor. HPSC offers a new flight computing architecture to meet the needs of NASA missions through 2030 and beyond. Providing on the order of 100X the computational capacity of current flight processors for the same amount of power, the multicore architecture of the HPSC processor, or "Chiplet" provides unprecedented flexibility in a flight computing system by enabling the operating point to be set dynamically, trading among needs for computational performance, energy management and fault tolerance. The HPSC Chiplet is being developed by Boeing under contract to NASA, and is expected to provide prototypes, an evaluation board, system emulators, comprehensive system software, and a software development kit. In addition to the vendor deliverables, the AFRL is funding the development of a flexible Middleware to be developed by NASA Jet Propulsion Laboratory and NASA Goddard Space Flight Center. The HPSC Middleware provides a suite of thirteen high level services to manage the compute, memory and I/O resources of this complex device.This presentation will provide an HPSC project update, an overview of the latest HPSC System Software release, an overview of HPSC Middleware Release 2, and a preview of the third HPSC Middleware release. The presentation will begin with a project update that will provide a look at the high-level changes since the project was introduced at the Flight Software Workshop last year. Next, the presentation will provide an overview of the current suite of HPSC System Software which includes the vendor provided bootloaders, operating systems, emulator, and development tools. Next, the HPSC Middleware progress will be presented, which includes an overview of the features and capabilities of HPSC Middleware Release 2, followed by a look at the reference flight software applications which utilize the Middleware. Finally, the presentation will give a preview of the HPSC Middleware Release 3.
High-Performance Spaceflight Computing (HPSC) Middleware Overview
High Performance Spacecraft Computing (HPSC) is a joint project between the National Aeronautics and Space Administration (NASA) and Air Force Research Lab (AFRL) to develop a high-performance multi-core radiation hardened flight processor. HPSC offers a new flight computing architecture to meet the needs of NASA missions through 2030 and beyond. Providing on the order of 100X the computational capacity of current flight processors for the same amount of power, the multicore architecture of the HPSC processor, or "Chiplet" provides unprecedented flexibility in a flight computing system by enabling the operating point to be set dynamically, trading among needs for computational performance, energy management and fault tolerance. The HPSC Chiplet is being developed by Boeing under contract to NASA, and is expected to provide prototypes in 2021. The HPSC Chiplet prototypes will be delivered with an evaluation board, system emulators, comprehensive system software, and a software development kit. In addition to the vendor deliverables, the AFRL is funding the development of a flexible Middleware to be developed by NASA Jet Propulsion Laboratory and NASA Goddard Space Flight Center. The HPSC Middleware provides a suite of thirteen high level services to manage the compute, memory and I/O resources of this complex device.This presentation will provide an overview of the HPSC project, including a hardware overview, system software overview, Middleware overview, and mission use cases. The hardware overview will provide a look at the 8 core High Performance Processing Subsystem (HPPS), the Real Time Processing Subsystem (RTPS), the Chiplet Configuration Management Subsystem, on chip peripherals, and high speed I/O. The system software overview will introduce the boot loaders, operating systems, device drivers, and software development environment. The Middleware overview will provide insight into the high-level services that will be provided to help mission developers manage the many resources and configurations made possible with the Chiplet. Finally, the presentation will provide a brief look at the mission use cases that can be enabled with this next generation architecture.
New frontiers in design synthesis
The Intelligent Synthesis Environment (ISE), which is one of the major strategic technologies under development at NASA centers and the University of Virginia, is described. One of the major objectives of ISE is to significantly enhance the rapid creation of innovative affordable products and missions. ISE uses a synergistic combination of leading-edge technologies, including high performance computing, high capacity communications and networking, human-centered computing, knowledge-based engineering, computational intelligence, virtual product development, and product information management. The environment will link scientists, design teams, manufacturers, suppliers, and consultants who participate in the mission synthesis as well as in the creation and operation of the aerospace system. It will radically advance the process by which complex science missions are synthesized, and high-tech engineering Systems are designed, manufactured and operated. The five major components critical to ISE are human-centered computing, infrastructure for distributed collaboration, rapid synthesis and simulation tools, life cycle integration and validation, and cultural change in both the engineering and science creative process. The five components and their subelements are described. Related U.S. government programs are outlined and the future impact of ISE on engineering research and education is discussed.
High-Performance Spaceflight Computing (HPSC) Program Overview
The High Performance Spaceflight Computing (HPSC) project is dramatically advancing the state of the art for spaceflight computing, providing both increased performance and greater operational flexibility. Initial studies derived an reference architecture for the HPSC Chiplet, and this has evolved as development has progress. NASA and JPL are jointly developing HPSC Middleware to ease the development of future applications for the Chiplet. Several NASA use cases are identified for HPSC, ranging from smallsats to crewed missions.