Solving sparse finite element problems on neuromorphic hardware
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This slide deck describes typical power systems of large datacenters along with reliability problems to bulk power systems from large-scale integration of datacenters. The slide deck covers the architecture of datacenter power systems, different power electronic converters used inside datacenters, their operation modes, and R&Dopportunities in maintaining grid stability.
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High current, high voltage solenoid pulser power systems for the generation of magnetic fields in a solenoid is not a radical or new concept. Despite being a cornerstone of scientific and weapons research for over 100 years, a commercial off the shelf unit easily configurable for a broad set of applications has yet to appear on the open market. Pulser systems are instead designed for specific target requirements. For gigawatt to terawatt systems, this is unavoidable. For megawatt systems however, many hundreds of thousands of dollars are wasted designing pulser systems from the ground up for clients, when it is possible to simply architect a modular system once that can have its capacitors swapped for many possible target applications. The National Ignition Facility (NIF) at the Lawrence Livermore National Laboratory (LLNL) is one such institution that would benefit from such a system, having bought such pulsers for several imaging systems. Ideally, all such a system would require is only a bachelors-level circuit analysis to find the correct capacitor values, as well as a written procedure to calibrate the software to correctly deliver the voltages required by the application. In this work, systems architecture and software engineering techniques are used to design and analyze such a system. Such a design, it is the hope of this author, will be used in scientific and engineering purposes in the future to build solenoid pulsers at the National Ignition Facility and other institutions to drastically cut development costs of scientific instrumentation.
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Defining a domain-specific language (DSL) that supports vector-calculus abstractions eases the porting of partial differential equation (PDE) solvers to specialized architectures. Sufficiently high-level abstractions empower users to express universal laws with sufficient generality that the laws must always hold true within their domain of validity. A broad class of PDE solvers employs stencil-based algorithms, the target domain of Berkeley Lab's stencil accelerator chip co-design project. First released as open-source in January 2026, the Formal software framework lays a foundation for defining an embedded DSL based on composable operators that implement mimetic numerical methods -- stencil algorithms that guarantee satisfaction of discrete versions of important vector calculus theorems. The Formal DSL will be the frontend to a new class of stencil-PDE accelerators developed jointly by LBNL, UHCL, and UC Berkeley through the DOE Competitive Portfolios for Computer Science Project. This offers the potential of an order of magnitude acceleration for this important category of computational methods to serve the DOE mission. Future work on the Formal DSL will facilitate software verification via type-safe templates that enable problem-specific correctness proofs relying upon generic function theory and carefully crafted unit tests.
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Nonlinear kickers (NLKs) enable off-axis injection in ultralow-emittance storage rings by providing a strong kick to the injected beam while remaining nearly transparent to the stored beam. In hybrid schemes, a conventional four-kicker bump defines the injected trajectory, and the NLK reduces the first-turn action under constrained beam offset and optics conditions. Effective operation additionally requires stable and reproducible first-turn injection trajectories. We develop a compact action–angle framework that expresses NLK dynamics in terms of Courant–Snyder invariants and yields an analytical bound on achievable action reduction. This formulation provides direct design rules for NLK placement, phase advance, injected-beam offset, and kicker field profile. Within this framework, we identify the 8-wire NLK as a practical baseline and extend its design by relaxing the square-geometry constraint, enabling inward shifting of the off-axis field peak while preserving on-axis field and gradient cancellation. Application to the NSLS-II lattice shows how aperture, pulsed-power, and mechanical constraints combine to determine a coupled design solution. Multi-turn tracking confirms that candidate NLK locations maintain sufficient stay-clear (aperture-clearance) margin, while the optimized wire geometry reduces the required current and Lorentz force load. The results establish a unified approach for NLK-assisted injection design and provide a practical pathway for upgrades in diffraction-limited storage rings.
Black hole (BH) environments often host plasmas that are fully collisionless or contain intrinsically collisionless regions, including relativistic jets and coronae, where particle energization is ubiquitous. Capturing the physics of these systems requires numerical methods capable of modeling relativistic, magnetized, collisionless plasmas in strong gravitational fields. In this work, we introduce the general relativistic module for Entity—the first open-source, coordinate-agnostic, performance-portable, particle-in-cell code. The code enables fast axisymmetric simulations of collisionless plasmas around BHs on any modern high-performance computing architecture (both GPUs and CPUs).
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This presentence provides overview of NREL's testing capabilities and experience with advanced testing of multimegawatt grid-forming inverters.
A programmable signal processor-based credited safety control that calculates pulsed beam power based on beam kinetic energy and charge was designed as part of the Proton Power Upgrade (PPU) project at the Spallation Neutron Source (SNS). The system must reliably shut off the beam if the average power exceeds 2.145 MW averaging over 60 seconds. System calibration requires pedigree in measurements, calibration setup, and calculations. This paper discusses the calibration of the analog beam signal components up to and including the Analog Digital Convertors (ADCs) for implementation into the Safety Programmable Logic Controllers (PLCs) and Field Programmable Gate Arrays (FPGAs).