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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

PowerMappeR: Power-Optimized Mapping of SNNs onto ReRAM Crossbars coupled via Packet-Switched NoCs

Many recent efforts in developing hardware-accelerated spiking neural networks (SNNs) are characterized by deep co-design between algorithms, architectures, and devices. Architectural advances overcome device constraints by coupling together many small resistive-RAM (ReRAM) crossbars via a network-on-chip (NoC) for neuromorphic component operation. Concurrently, improved SNN training methods increase accuracy and structural sparsity in networks despite growing problem sizes. Finally, compilers leverage these attributes to minimize area and inter-crossbar communication while mapping large SNNs to sophisticated architectures. However, for compiler-driven co-design to realize increasingly complex and profitable optimizations, a compile-time view of power consumption is critical. We present PowerMappeR to express and optimize over mapping-, architecture-, and device-specific power consumption information. By modeling the dynamic power of well-established components, we develop an integer linear programming (ILP)-based, encoding-agnostic, parametric power estimation model. Using this model, we demonstrate practical improvements in area and inter-crossbar communication by 0%–9.5% and 1.4%–5.1%, respectively. We also limit hotspot formation during optimization, achieving comparable or better results in targeted metrics with up to 96.4%–97.1% restriction of hotspot magnitude. Finally, we introduce profile-guided formulations to reduce worst-case and expected-case hotspot magnitude by 40.7%–69.5% and 40.6%–56.3%, respectively. Optimizing worst-case hotspot magnitude incidentally improves expected-case magnitude by 10.85%–33.45%. Reciprocally, optimizing expected-case magnitude incidentally improves worst-case magnitude by 4.33%–39.87%. Validation against hardware simulators confirms that PowerMappeR can decrease dynamic power consumption by 12.6%–27.3%.

Pohl, Devin [ORNL] (ORCID:0009000040149027)↗
DOE OSTI2024

Dynamic Cooling on Contemporary Quantum Computers

We study the problem of dynamic cooling whereby a target qubit is cooled at the expense of heating up N − 1 further identical qubits by means of a global unitary operation. A standard back-of-the-envelope high-temperature estimate establishes that the target qubit temperature can be dynamically cooled by at most a factor of 1 / N . Here we provide the exact expression for the minimum temperature to which the target qubit can be cooled and reveal that there is a crossover from the high initial temperature regime, where the scaling is 1 / N , to a low initial temperature regime, where a much faster scaling of 1 / N occurs. This slow, 1 / N scaling, which was relevant for early high-temperature NMR quantum computers, is the reason dynamic cooling was dismissed as ineffectual around 20 years ago; the fact that current low-temperature quantum computers fall in the fast, 1 / N scaling regime, reinstates the appeal of dynamic cooling today. We further show that the associated work cost of cooling is exponentially more advantageous in the low-temperature regime. We discuss the implementation of dynamic cooling in terms of quantum circuits and examine the effects of hardware noise. We successfully demonstrate dynamic cooling in a three-qubit system on a real quantum processor. Since the circuit size grows quickly with N , scaling dynamic cooling to larger systems on noisy devices poses a challenge. We therefore propose a suboptimal cooling algorithm, whereby relinquishing a small amount of cooling capability results in a drastically reduced circuit complexity, greatly facilitating the implementation of dynamic cooling on near-future quantum computers. Published by the American Physical Society2024

Physics↗
DOE OSTI2024

Fail-Safe Logic Design Strategies Within Modern FPGA Architectures

Fail-safe computing refers to computing systems that revert to a non-operational safe state when a fault occurs. In this paper, we investigate a circuit level technique as mitigation for single event upsets (SEUs) and fault injection attacks on field programmable gate arrays (FPGAs), and analyze the effectiveness of the technique as a fail-safe monitor for an encryption algorithm. The propagation of fault effects through FPGA primitives including lookup tables (LUTs) and programmable interconnect points (PIPs) is assessed within an FPGA architecture created using an open source tool, and validated using fault injection experiments on an FPGA. The analysis reveals additional vulnerabilities exist within reconfigurable architectures over those in equivalent fail-safe application specific integrated circuit (ASIC), thus requiring a more elaborate network of redundant circuits and checking logic. The configuration memory bits (CMBs), which configure routing and designate logic functions within the LUTs of the FPGA, add complexity to fail-safe design strategies by introducing additional fault conditions and fault propagation paths. A resource-efficient fail-safe circuit design technique called DEsign for Fail-safe in reCONfigurable systems (DEFCON) is proposed. The benefits and limitations associated with DEFCON are described in the context of fault injection experiments carried out as simulations and in FPGA hardware.

Bhakta, Priya A. [Univ. of New Mexico, Albuquerque↗
DOE OSTI2026

Host-Directed, Bioelectronic Immunomodulation for Protection Against Emerging Pathogens

Acute care of patients with severe infections often relies on systemic administration of pharmaceuticals and monitoring of complex physiological symptoms to identify immune system dysfunction, which can lead to increased mortality. Furthermore, determining disease-specific treatment plans often leads to a delay in patient care. To address this, we proposed an immune modulation system that electrically detects and responds to a patient’s immune system status, creating an agnostic means of treating illness and infection. Two pieces of hardware were developed for this task: a minimally-invasive sensor and a vagus nerve stimulator. Stimulation of the vagus nerve is known to modulate the immune system. The sensor is a microfabricated, silicon-based microneedle array capable of interfacing with interstitial fluid to detect small molecules such as inflammatory proteins (cytokines) and pharmaceuticals (vancomycin). Process optimization to manufacture the needles refined the silicon etch process, creating needle patches long enough to penetrate skin and reach interstitial fluid. The needles were tested for mechanical strength and stability, and did not shatter when inserted into skin models. The needles are coated with a thin film metal, turning them into electrodes for electrochemical sensing of our target molecules. We hybridized aptamers to the surface of the electrode to act as the sensing layer and were able to detect changes in the conformation of the aptamer electrochemically in the presence of the target molecule. The stimulator was a cuff electrode that encircled the vagus nerve. Rodent studies were conducted in which rodents were exposed to an inflammatory event and vagus nerve stimulation (VNS) was applied. It was demonstrated that optimized electrical stimulation of the vagus nerve created measurably different levels of cytokines in blood samples, and certain cytokines released during the inflammatory event were either upregulated or downregulated. In sum, this project successfully developed new platforms and technologies that can, with further development, enable better temporal insight into biomarker changes in the body, letting healthcare providers know of possible immune system dysfunction before they are detected physiologically. We also demonstrated the value of VNS and its possible use in treating immune system response to inflammation and illness.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2025

Computational Power of Random Quantum Circuits in Arbitrary Geometries

Empirical evidence for a gap between the computational powers of classical and quantum computers has been provided by experiments that sample the output distributions of two-dimensional quantum circuits. Many attempts to close this gap have utilized classical simulations based on tensor network techniques, and their limitations shed light on the improvements to quantum hardware required to frustrate classical simulability. In particular, quantum computers having in excess of approximately 50 qubits are primarily vulnerable to classical simulation due to restrictions on their gate fidelity and their connectivity, the latter determining how many gates are required (and, therefore, how much infidelity is suffered) in generating highly entangled states. Here, we describe recent hardware upgrades to Quantinuum’s H2 quantum computer, enabling it to operate on up to 56 qubits with arbitrary connectivity and 99.843(5)% two-qubit gate fidelity. We define a class of circuits with random geometries that become hard to classically simulate in very low depth and implement them utilizing the flexible connectivity of H2. A careful analysis demonstrating the fast saturation of classical simulation complexity with depth indicates that H2 can yield data well beyond the reach of state-of-the art classical simulation methods at unprecedented fidelities. We find that the considerable difficulty of classically simulating H2 is likely limited only by qubit number, demonstrating the promise and scalability of the quantum charge-coupled device architecture as continued progress is made toward building larger machines. Published by the American Physical Society 2025

DeCross, M.↗
DOE OSTI2024

Sentinel

Network intrusion detection systems (NIDS) are commonplace in network security but they frequently employ algorithms that are computational demanding requiring hardware and software with significant power requirements. Two examples of such resource-intensive algorithms used for network security are regular expression matching and broader signature pattern matching which are commonly used in deep packet inspection (DPI). Network security algorithms that have large power requirements may be a challenge for low-power internet-of-things (IoT) environments, which generally lack the power resources to implement complex security measures like computationally expensive DPI at the edge. Furthermore, IoT environments incorporating 5G standalone networks have network latency constraints beyond just power that make DPI at the edge even more difficult. Programmable logic is ideally suited for machine learning inference for DPI because of its deep instruction level parallelism and single-cycle memory access. Machine learning approaches for DPI have been explored before using the programmable logic of field programmable gate arrays (FPGA) as a potential solution for NIDS approaches that would be power-suitable for IoT. However, those previous programmable logic NIDS approaches utilize either a supervised or unsupervised learning model. Sentinel utilizes the ensemble of these two machine learning approaches known as a semi-supervised approach which has shown promise in NIDS implementations. Sentinel provides a programmable logic implementation of a semi-supervised approach for DPI which operates at much lower power and latency than a GPU implementation with negligible loss of accuracy due to quantization through a logistic regressor.

Anderson, MatthewW [Idaho National Laboratory (INL↗
DOE OSTI2024

Cyber-Physical System: Design for Sustainability and Resilience

When considering the design tools needed in the transition from numeric models to pilot plant, cyber-physical systems (CPS) come to the forefront as a method to model complex integrated energy systems. CPS approach has proven to be valuable to identify opportunities for economically viable early adoption of integrated energy technologies. This tutorial will introduce the concepts and the roles of CPS in co-design to minimize risks for pilot plant and technology deployment. This tutorial will also layout basic requirements for the CPS development, which requires a highly interdisciplinary effort with expertise in sensors, hardware testing, real-time modeling, controls, and system integration.

Harun, Nor Farida↗
DOE OSTI2025

Hardware-Efficient Quantum Phase Estimation via Local Control

Quantum phase estimation plays a central role in quantum simulation as it enables the study of spectral properties of many-body quantum systems. Most variants of the phase estimation algorithm require the application of the global unitary evolution conditioned on the state of one or more auxiliary qubits, posing a significant challenge for current quantum devices. In this work, we present an approach to quantum phase estimation that uses only locally controlled operations, resulting in a significantly reduced circuit depth. At the heart of our approach are efficient routines to measure the complex phase of the expectation value of the time-evolution operator, the so-called Loschmidt echo, for both circuit dynamics and Hamiltonian dynamics. By tracking changes in the phase during the dynamics, the routines trade circuit depth for increased sampling cost and classical postprocessing. Our approach does not rely on reference states and is applicable to any efficiently preparable state, regardless of its correlations. We provide a comprehensive analysis of the sample complexity and illustrate the results with numerical simulations. Our methods offer a practical pathway for measuring spectral properties in large many-body quantum systems using current quantum devices.

Schiffer, Benjamin F. [Max Planck Institute of Qua↗
DOE OSTI2026

SULI Report - Development of a Molten Salt Circulation Loop for in-situ Spectroscopy

This project supports the development of real time optical monitoring capabilities for molten salt reactor (MSR) environments by designing, testing, and refining a molten salt circulation loop suitable for combined laser induced breakdown spectroscopy (LIBS) and ultraviolet visible (UV Vis) absorption measurements. Online spectroscopic monitoring is increasingly important for nuclear safeguards, corrosion tracking, and material accountancy, yet MSR process fluids present substantial challenges due to their chemical complexity and hazards such as high temperatures and radiation. To address these needs, this work focuses on Phase I, the development of a room temperature aqueous circulation loop that serves as a surrogate platform for evaluating flow behavior, optical access, and component performance prior to high temperature salt operation. Initial testing identified several practical issues—including leaks, obstructions, and two-phase flow through the absorption cell—that were systematically resolved through hardware replacement, flow path redesign, and venturi pressure optimization. Relocating the flow cell upstream of the primary venturi enabled periods of stable single-phase flow, demonstrating the feasibility of integrating optical diagnostics into a circulation system. The results of Phase I provide essential design insight for Phase II, which will incorporate furnace compatible materials and LiCl KCl eutectic salt. Completion of the molten salt system will deliver a reusable testbed for evaluating multimodal spectroscopic techniques, advancing nondestructive, real time monitoring tools for future MSR and nuclear fuel cycle applications.

98 - NUCLEAR DISARMAMENT, SAFEGUARDS, AND PHYSICAL↗
DOE OSTI2025

Wind Supply Chain Security: Hardware Enumeration and Analysis

This project, undertaken by Idaho National Laboratory (INL) for the Department of Energy (DOE) Wind Energy Technologies Office (WETO), focused on the enumeration and analysis of six key devices important to wind technologies. The devices analyzed included Beckhoff Bus Terminal Controllers (BK1120 and BC9000), a Beckhoff Economy Built-in Panel PC (CP6231), an N-Tron Managed Industrial Ethernet Switch (711FX3), a Bachmann M1 Gateway, and a Bachmann Smart Power Plant Controller. Device selection was driven by availability and budget constraints, with several components sourced from existing wind farms and others procured through a co-agreement with another WETO-funded project. The project's primary objective was to create a hardware bill of materials (HBOM) for each device, identifying and documenting all components to assess potential security and supply chain risks. A detailed analysis revealed over 750 unique components across the six devices, with 80% successfully identified and accompanied by datasheets. Notably, Texas Instruments emerged as the leading supplier, providing over 16% of the components, followed by ON Semiconductor at 11.3%, Analog Devices at 5.3%, and Renesas Electronics Corp at 4.1%. Other notable vendors included Toshiba Corporation, iC-Haus Corporation, Atmel, Vishay, and STMicroelectronics. The enumeration process involved thorough documentation of each component, including its designation, quantity, identifiers, pin package, description, vendor, model, and country of origin. This process provided valuable insights into the complexity and diversity of the electronic systems within these wind devices. It also highlighted the distinct separation of components between vendors, suggesting a trend of vendor-specific component usage. Key findings from the project emphasized the importance of broadening the scope of vendor analysis in future research to gain a comprehensive understanding of component distribution and commonality. The identification of vendor-specific component usage patterns offers new avenues for research and underscores the significance of continued investigation in this field. Overall, this project provides critical insights into the component composition of wind devices, aiding in the development of improved supply chain management and component sourcing strategies. The results contribute valuable knowledge to the wind technology sector, laying the groundwork for enhanced security and resilience in wind energy systems.

17 - WIND ENERGY↗
DOE OSTI2024

Sachdev-Ye-Kitaev model on a noisy quantum computer

Here we study the SYK model -- an important toy model for quantum gravity on IBM's superconducting qubit quantum computers. By using a graph-coloring algorithm to minimize the number of commuting clusters of terms in the qubitized Hamiltonian, we find the gate complexity of the time evolution using the first-order product formula for N Majorana fermions is $\mathscr{O}$(N 5 J 2 t 2 /ε) where J is the dimensionful coupling parameter, t is the evolution time, and ε is the desired precision. With this improved resource requirement, we perform the time evolution for N=6,8 with maximum two-qubit circuit depth of 343. We perform different error mitigation schemes on the noisy hardware results and find good agreement with the exact diagonalization results on classical computers and noiseless simulators. In particular, we compute return probability after time t and out-of-time order correlators (OTOC) which is a standard observable of quantifying the chaotic nature of quantum systems.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

LuGo: An enhanced quantum phase estimation implementation

Quantum Phase Estimation (QPE) is a cardinal algorithm in quantum computing that plays a crucial role in various applications, including cryptography, molecular simulation, and solving systems of linear equations. However, the standard implementation of QPE faces challenges related to time complexity and circuit depth, which limit its practicality for large-scale computations. We introduce LuGo, a novel framework designed to enhance the performance of QPE by reducing circuit duplication, as well as using parallelization techniques to achieve faster generation of the QPE circuit and gate reduction. We validate the effectiveness of our framework by generating quantum linear solver circuits, which require both QPE and inverse QPE, to solve linear systems of equations. LuGo achieves significant improvements in both computational efficiency and hardware requirements without compromising on accuracy. Compared to a standard QPE implementation, LuGo reduces time consumption to generate a circuit that solves a 2 6 × 2 6 system matrix by a factor of 50.68 and over 31× reduction of quantum gates and circuit depth, with no fidelity loss on an ideal quantum simulator. Furthermore, we demonstrated the versatility and scalability of LuGo enabled HHL algorithm by simulating a canonical Hele-Shaw fluid problem using a quantum simulator. With these advantages, LuGo paves the way for more efficient implementations of QPE, enabling broader applications across several quantum computing domains.

Quantum algorithm↗
DOE OSTI2025

Dendritic Computing with Multigate Ferroelectric Field-Effect Transistors

Although inspired by neuronal systems in the brain, artificial neural networks generally employ point-neurons, which offer computational complexity far less than that of their biological counterparts. Neurons have dendritic arbors that connect to different sets of synapses and offer local nonlinear accumulation – playing a pivotal role in processing and learning. Inspired by this, we propose a novel neuron design based on a multigate ferroelectric field-effect transistor that mimics dendrites. It leverages ferroelectric nonlinearity for local computations within dendritic branches while utilizing the transistor action to generate the neuronal output. The branched architecture enables smaller crossbar arrays in hardware integration, improving efficiency. Using an experimentally calibrated device-circuit-algorithm cosimulation framework, we demonstrate that networks incorporating our dendritic neurons achieve superior performance compared to much larger networks without dendrites (∼ 17× fewer trainable weight parameters). These findings suggest that dendritic hardware can significantly improve computational efficiency and learning capacity of neuromorphic systems optimized for edge applications.

36 MATERIALS SCIENCE↗
DOE OSTI2024

Scalability of Real-time Distribution Models

This work will focus on developing the capabilities and validating the models for a sub transmission network with multiple feeders and microgrids. To achieve this scale of Hardware-in-the-loop (HitL) simulation, it is necessary to federate and collaborate. The work aims to design the large-scale feeder models to allow federation with complementary testbeds in the future. The feeder would be designed to be reconfigurable to put the system into a variety of modes. Aggregators models will be included in each distribution network’s federate to take control actions and interact with the management systems. Lastly, the feeder model will support large scale resilience studies involving complex Distributed Energy Resources (DER) controls, microgrid studies and emulation of complex data flows in future grid architectures.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2025

Holographic Quantum Simulation of Strongly Correlated Electron Systems

The project aimed to demonstrate a new holographic quantum simulation approach and co‐ designed quantum hardware to tackle three specific problems that fall within the broad umbrella of unraveling the physics of strongly correlated electron systems (SCES). These tasks were: (1) holographic preparation of ground‐ and thermal‐ states of correlated magnetic and electronic systems including quasi‐2d frustrated‐spin, Fermi‐Hubbard, and fractional quantum Hall (FQH) systems, (2) holographic‐simulation of long‐time out‐of‐equilibrium dynamics and (3) holographic analogs of embedding methods such as dynamical mean‐ field theory (DMFT) and density‐matrix embedding theory (DMET) to solve systems with complex structure or long‐range interactions. These tasks are prototypes for the kinds of material simulation problems of interest to BES, such as the simulation of multiferroic materials, perovskite photovoltaics and high‐temperature superconductors, that tax the capabilities of the most powerful classical supercomputers.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

eCounter: Inline Per-IP Network Monitoring at Millisecond Resolution via eBPF

Scientific data acquisition (SciDAQ) systems are shifting from archive-based workflows to streaming paradigms, where real-time, fine-grained network monitoring becomes essential. While P4-enabled devices offer per-packet in-band observability, they require specialized switches and routers. Host-side tools like Prometheus exporters lack sufficient temporal granularity. To bridge this gap, we present eCounter, a lightweight, hardware-agnostic, inline telemetry agent built on extended Berkeley Packet Filter (eBPF). eCounter captures per-interface ingress and egress traffic, categorized by IP address and protocol, at millisecond to sub-millisecond resolution. In a 100 Gbps environment, it continuously exports up to 3,257 time-series bins per second with only 4% CPU utilization at a 35¿KiB/s data rate. We evaluate eCounter across diverse NIC MTU settings, hook types, CPU architectures and operating systems, and observed negligible impact on concurrent high-throughput streaming applications. Complexity analysis confirms that it can be readily scaled to distributed SciDAQ deployments.

Mei, Xinxin [Computational Sciences and Technology↗
DOE OSTI2025

AI Benchmark Democratization and Carpentry

Benchmarks are a cornerstone of modern machine learning, enabling reproducibility, comparison, and scientific progress. However, AI benchmarks are increasingly complex, requiring dynamic, AI-focused workflows. Rapid evolution in model architectures, scale, datasets, and deployment contexts makes evaluation a moving target. Large language models often memorize static benchmarks, causing a gap between benchmark results and real-world performance. Beyond traditional static benchmarks, continuous adaptive benchmarking frameworks are needed to align scientific assessment with deployment risks. This calls for skills and education in AI Benchmark Carpentry. From our experience with MLCommons, educational initiatives, and programs like the DOE's Trillion Parameter Consortium, key barriers include high resource demands, limited access to specialized hardware, lack of benchmark design expertise, and uncertainty in relating results to application domains. Current benchmarks often emphasize peak performance on top-tier hardware, offering limited guidance for diverse, real-world scenarios. Benchmarking must become dynamic, incorporating evolving models, updated data, and heterogeneous platforms while maintaining transparency, reproducibility, and interpretability. Democratization requires both technical innovation and systematic education across levels, building sustained expertise in benchmark design and use. Benchmarks should support application-relevant comparisons, enabling informed, context-sensitive decisions. Dynamic, inclusive benchmarking will ensure evaluation keeps pace with AI evolution and supports responsible, reproducible, and accessible AI deployment. Community efforts can provide a foundation for AI Benchmark Carpentry.

von Laszewski, Gregor [Virginia U.]↗
DOE OSTI2026

Empirical Comparison of Machine Learning Approaches for Black-Box Modeling of Power Conversion System Dynamics

Inverter-based resources are key components in modern power systems, but accurately modeling their complex behavior can be challenging. Standard, generic converter models often oversimplify inverter dynamics, leading to significant errors in predicting performance. In this work, we compare several data-driven machine learning (ML) approaches for inverter modeling, performing experiments on power conversion systems, systematically varying input conditions, and recording the resulting voltages and currents. The ML models were then trained on this measured data to capture the inverter's dynamic response and to predict the inverter's output current. A performance comparison between the four ML models under study is conducted, laying the foundation for future work on hardware implementation for real-time inference.

30 DIRECT ENERGY CONVERSION↗