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Results for “phase locking”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS1992

Constant-Frequency Pulsed Phase-Locked-Loop Measuring Device

Constant-frequency pulsed phase-locked-loop measuring device is sensitive to small changes in phase velocity and easily automated. Based on use of fixed-frequency oscillator in measuring small changes in ultrasonic phase velocity when sample exposed to such changes in environment as changes in pressure and temperature. Automatically balances electrical phase shifts against acoustical phase shifts to obtain accurate measurements of acoustical phase shifts.

Yost, William T.↗
NASA NTRS1971

A compilation of results pertaining to the behavior of phase locked loops

State-of-the art on phase locked loops PLL is reported by summarizing some specific results. Following a statement of the overall analysis and design objectives, results are presented in a format identifying working terminology, inherent assumptions, and references for each result. The use of PLL in tracking, synchronization, and demodulation is reemphasized, as well as the mathematical challenge involved in solving nonlinear stochastic differential equations.

Gleicher, N.↗
NASA NTRS1973

Filter for third order phase locked loops

Filters for third-order phase-locked loops are used in receivers to acquire and track carrier signals, particularly signals subject to high doppler-rate changes in frequency. A loop filter with an open-loop transfer function and set of loop constants, setting the damping factor equal to unity are provided.

Crow, R. B.↗
NASA NTRS1973

Digital second-order phase-locked loop

A digital second-order phase-locked loop is disclosed in which a counter driven by a stable clock pulse source is used to generate a reference waveform of the same frequency as an incoming waveform, and to sample the incoming waveform at zero-crossover points. The samples are converted to digital form and accumulated over M cycles, reversing the sign of every second sample. After every M cycles, the accumulated value of samples is hard limited to a value SGN = + or - 1 and multiplied by a value delta sub 1 equal to a number of n sub 1 of fractions of a cycle. An error signal is used to advance or retard the counter according to the sign of the sum by an amount equal to the sum.

Holes, J. K.↗
NASA NTRS1973

Transient analysis of phase-locked tracking systems in the presence of noise.

This paper is concerned with the problem of obtaining time-dependent solutions to a class of Fokker-Planck equations that arise in the analysis and synthesis of a variety of first-order synchronization systems employing the phase-lock principle. These include the classical sinusoidal phase-locked loop, squaring and Costas loops, data-aided loops, hybrid loops, various symbol synchronizer mechanizations, and tunnel-diode oscillators. By analyzing the spectral properties of the associated time-dependent Fokker-Planck boundary value problem, eigenfunction expansions of the reduced modulo-2-pi phase-error-transition probability-density function are developed for a class of first-order synchronization systems.

La Frieda, J. R.↗
NASA NTRS1974

A second-order all-digital phase-locked loop

A simple second-order digital phase-locked loop has been designed to synchronize itself to a square-wave subcarrier. Analysis and experimental performance are given for both acquisition behavior and steady-state phase error performance. In addition, the damping factor and the noise bandwidth are derived analytically. Although all the data are given for the square-wave subcarrier case, the results are applicable to arbitrary subcarriers that are odd symmetric about their transition region.

Holmes, J. K.↗
NASA NTRS1979

Analysis and design of a second-order digital phase-locked loop

A specific second-order digital phase-locked loop (DPLL) was modeled as a first-order Markov chain with alternatives. From the matrix of transition probabilities of the Markov chain, the steady-state phase error of the DPLL was determined. In a similar manner the loop's response was calculated for a fading input. Additionally, a hardware DPLL was constructed and tested to provide a comparison to the results obtained from the Markov chain model. In all cases tested, good agreement was found between the theoretical predictions and the experimental data.

Blasche, P. R.↗
NASA NTRS1979

High power phase locked laser oscillators

The feasibility of mechanizing an adaptive array of independent laser oscillators for generation of a high power coherent output was experimentally investigated. Tests were structured to evaluate component/system requirements for delivery of energy to a low-earth orbit satellite. Initial experiments addressed the control issues of phase locking unstable resonators at low power levels. A successful phase lock demonstration formed the basis for the design and fabrication of the high power, water-cooled, control mirror subsequently installed in the NASA LeRC high power laser. Tests were performed to characterize the operational limits of the laser system and included quantitative assessment of the frequency stability, noise sources, and optical properties of the beam.

Hayes, C. L.↗
NASA NTRS1972

A simple second-order digital phase-locked loop.

A simple second-order digital phase-locked loop has been designed for the Viking Orbiter 1975 command system. Excluding analog-to-digital conversion, implementation of the loop requires only an adder/subtractor, two registers, and a correctable counter with control logic. The loop considers only the polarity of phase error and corrects system clocks according to a filtered sequence of this polarity. The loop is insensitive to input gain variation, and therefore offers the advantage of stable performance over long life. Predictable performance is guaranteed by extreme reliability of acquisition, yet in the steady state the loop produces only a slight degradation with respect to analog loop performance.

Tegnelia, C. R.↗