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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS1972

Improvements in deep-space tracking by use of third-order loops.

Third-order phase-locked receivers have not yet found wide application in deep-space communications systems because the second-order systems now used have performed adequately on past spacecraft missions. However, a survey of the doppler profiles for future missions shows that an unaided second-order loop may be unable to perform within reasonable error bounds. This article discusses the characteristics of a simple third-order extension to present second-order systems that not only extends doppler-tracking capability, but widens the pull-in range and decreases pull-in time as well.

Tausworth, R. C.↗
NASA NTRS1973

Power flow for Josephson elements.

General relations are presented for the power flow at the frequencies of interest in a Josephson element. These general power flow relations depend upon whether the autonomous frequency is phase-locked, either harmonically or subharmonically, to a frequency in the system or is unlocked. The results presented generalize those given previously by Russer (1971) for the harmonically locked case.

Thompson, E. D.↗
NASA NTRS1974

Minicomputer-controlled frequency generator

Extremely-accurate and low-phase-noise frequency generator varies oscillator frequency as predetermined function of time. System could be used: (a) to automatically vary transmission frequencies in accordance with seasonal and diurnal changes in ionospheric conditions, (b) as automatic tuner for heterodyne receivers, or (c) as control element for phase-locked telemetry receivers.

Winkelstein, R. A.↗
NASA NTRS1973

A Computer Model of a Phase Lock Loop

A computer model is reported of a PLL (phase-lock loop), preceded by a bandpass filter, which is valid when the bandwidth of the bandpass filter is of the same order of magnitude as the natural frequency of the PLL. New results for the PLL natural frequency equal to the bandpass filter bandwidth are presented for a second order PLL operating with carrier plus noise as the input. However, it is shown that extensions to higher order loops, and to the case of a modulated carrier are straightforward. The new results presented give the cycle skipping rate of the PLL as a function of the input carrier to noise ratio when the PLL natural frequency is equal to the bandpass filter bandwidth. Preliminary results showing the variation of the output noise power and cycle skipping rates of the PLL as a function of the loop damping ratio for the PLL natural frequency equal to the bandpass filter bandwidth are also included.

Shelton, Ralph Paul↗
NASA NTRS1973

Optimal space communications techniques

The design, development, and analysis are reported of a digital phase-locked loop (DPLL) for FM demodulation and threshold extension. One of the features of the developed DPLL is its synchronous, real time operation. The sampling frequency is constant and all the required arithmetic and logic operations are performed within one sampling period, generating an output sequence which is converted to analog form and filtered. An equation relating the sampling frequency to the carrier frequency must be satisfied to guarantee proper DPLL operation. The synchronous operation enables a time-shared operation of one DPLL to demodulate several FM signals simultaneously. In order to obtain information about the DPLL performance at low input signal-to-noise ratios, a model of an input noise spike was introduced, and the DPLL equation was solved using a digital computer. The spike model was successful in finding a second order DPLL which yielded a five db threshold extension beyond that of a first order DPLL.

Schilling, D. L.↗
NASA NTRS1973

Advanced study of video signal processing in low signal to noise environments

Conventional analytical techniques used to determine and optimize phase-lock loop (PLL) characteristics are most often based on a model which is valid only if the intermediate frequency (IF) filter bandwidth is large compared to the PLL bandwidth and the phase error is small. An improved model (called the quasi-linear model) is developed which takes into account small IF filter bandwidths and nonlinear effects associated with large phase errors. By comparison of theoretical and experimental results it is demonstrated that the quasi-linear model accurately predicts PLL characteristics. This is true even for small IF filter bandwidths and large phase errors where the conventional model is invalid. The theoretical and experimental results are used to draw conclusions concerning threshold, multiplier output variance, phase error variance, output signal-to-noise ratio, and signal distortion. The relationship between these characteristics and IF filter bandwidth, modulating signal spectrum, and rms deviation is also determined.

Carden, F.↗
NASA NTRS1973

Telecommunication systems engineering

Telecommunication network concepts are discussed together with carrier-tracking loops employing the phase-lock principle, phase and Doppler measurements in two-way phase-coherent tracking systems, range measurements by phase-coherent techniques, and questions of phase-coherent detection with perfect reference signals and with noisy reference signals. The design of one-way and two-way phase-coherent communication systems is considered, giving attention to the optimal design of single-channel systems, the design of two-channel systems, and the design of multichannel systems. Other topics explored include the design and the performance of phase-coherent systems preceded by band-pass limiters, symbol synchronization and its effects on data detection, noncoherent communication over the Gaussian channel, and tracking loops with improved performance.

Lindsey, W. C.↗
NASA NTRS1974

Quantizing and sampling considerations in digital phased-locked loops

The quantizer problem is first considered. The conditions under which the uniform white sequence model for the quantizer error is valid are established independent of the sampling rate. An equivalent spectral density is defined for the quantizer error resulting in an effective SNR value. This effective SNR may be used to determine quantized performance from infinitely fine quantized results. Attention is given to sampling rate considerations. Sampling rate characteristics of the digital phase-locked loop (DPLL) structure are investigated for the infinitely fine quantized system. The predicted phase error variance equation is examined as a function of the sampling rate. Simulation results are presented and a method is described which enables the minimum required sampling rate to be determined from the predicted phase error variance equations.

Hurst, G. T.↗
NASA NTRS1975

Real-time speech analyzer

System uses phase-locked loops to give real-time information on speech spectrum by tracking the fundamental and its first 19 harmonics.

Hong, J. P.↗
NASA NTRS1974

Low cost omega navigation receiver

The development of a low cost Omega navigation receiver is discussed. Emphasis is placed on the completion and testing of a modular, multipurpose Omega receiver which utilizes a digital memory-aided, phase-locked loop to provide phase measurement data to a variety of applications interfaces. The functional units contained in the prototype device are described. The receiver is capable of receiving and storing phase measurements for up to eight Omega signals and computes two switch-selectable lines of position, displaying this navigation data in chart-recorded form.

Lilley, R. W.↗
NASA NTRS1974

Computer program CORDET

A FORTRAN 4 computer program provides convenient simulation of an all-digital phase-lock loop (DPLL). The DPLL forms the heart of the Omega navigation receiver prototype. Through the DPLL, the phase of the 10.2 KHz Omega signal is estimated when the true signal phase is contaminated with noise. This investigation has provided a convenient means of evaluating loop performance in a variety of noise environments, and has proved to be a useful tool for evaluating design changes. The goals of the simulation are to: (1) analyze the circuit on a bit-by-bit level in order to evaluate the overall design; (2) see easily the effects of proposed design changes prior to actual breadboarding; and (3) determine the optimum integration time for the DPLL in an environment typical of general aviation conditions.

Palkovic, R. A.↗
NASA NTRS1974

Synthesis and evaluation of phase detectors for active bit synchronizers

Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.

Mcbride, A. L.↗
NASA NTRS1974

Binary processing and display concepts for low-cost Omega receivers

A description is given of concepts related to plans for developing a low-cost, all-digital Omega receiver capable of offering to the small-aircraft pilot a reliable and accurate navigation aid. The receiver base considered includes a receiver front-end module, a receiver control module, a memory-aided phase-locked loop module, a housekeeping timer module, and a synthesizer module.

Lilley, R. W.↗
NASA NTRS1975

A decision directed detector for the phase incoherent Gaussian channel

A vector digital signalling scheme is proposed for simultaneous adaptive data transmission and phase estimation. The use of maximum likelihood estimation methods predicts a better performance than the phase-locked loop. The phase estimate is shown to converge to the true value, so that the adaptive nature of the detector effectively achieves phase acquisition and improvement in performance. No separate synchronization interval is required and phase fluctuations can be tracked simultaneously with the transmission of information.

Kazakos, D.↗
NASA NTRS1987

Clock synchronization of a large multiprocessor system in the presence of malicious faults

An interconnection algorithm is presented for achieving clock synchronization in a multiprocessor system. The system is assumed to be maliciously faulty, i.e., some processors are out of synchronization and lie about their clock state to other intragroup or intergroup processors. A phase-locked clock network design is proposed which groups the clocks in the system into diverse clusters. The clusters are then treated as single clock units from the perspective of the network. The algorithm minimizes the number of interconnections while permitting synchronization of large multiprocessor systems controlling time-critical applications such as aircraft, nuclear reactors and industrial processes.

Shin, Kang G.↗
NASA NTRS1968

Design Concept for a Rapid Automatic Sync Acquisition System

A design has been conceived for a system intended to provide rapid command sync acquisition between widely separated transmitter-receivers, such as between a spacecraft telemetry transmitter, and a ground-based receiver. Use of the system in commercial satellite communications would facilitate rapid sync acquisition between stations and regaining of data lock after interruption or equipment failure. The system is based on a rapid, automatic range-adjustment approach rather than the time-consuming cycle slipping or stepping techniques of conventional phase-locked loops.

Anderson, T. O.↗
NASA NTRS1961

A Long-Range Precision Ranging System

A technique is presented that may be used for precision real-time continuous range measuring at long ranges. The technique uses a carrier that is phase modulated by a pseudo-random binary sequence. The characteristics of the sequence that make it acquirable are discussed. The general form of a receiver capable of tracking the carrier is given and is shown to be a kind of phase-locked loop. A two-loop system capable of tracking a pseudo-random sequence and its clock is given. The combination of the receiver and the sequence tracking system form a ranging receiver. The power division necessary between the carrier and the sidebands is shown to be determined by the noise bandwidths of the two tracking systems. The bandwidths necessary for tracking space probes and Earth satellites are given and some experiments in radar-tracking Earth satellites are described. Based on these experiments, estimates are made of the useful range of such a system in tracking space probes.

Easterling, Mahlon↗
DOE OSTI2025

An Arbitrary Time Interval Generator Base on Vernier Clocks with 0.67 ps Adjustable Steps Implemented in FPGA

In TDC testing and timing system implementations, it is often necessary to generate signal pulses with finely adjustable time intervals. In delay cell–based schemes, the adjustment resolution is constrained by the propagation delay of the cells—typically 15–20 ps per step—and is sensitive to temperature and supply voltage variations. This document presents a fully digital approach that uses two vernier clocks, generated by two stages of cascaded phase-locked loops (PLLs) with a slight frequency difference, to achieve adjustable timing intervals through accumulated phase differences. The scheme was validated on two families of low-cost FPGA devices, achieving adjustable step sizes of 0.67 ps and 0.97 ps.

Wu, Jin-yuan [Fermilab] (ORCID:0000000344329521)↗