Silicon surface passivation for devices Research report, 1 Sep. 1968 - 1 Sep. 1969
Contamination in metal oxide semiconductor devices and thermal oxide on silicon
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Contamination in metal oxide semiconductor devices and thermal oxide on silicon
A new material system is proposed for silicon based opto-electronic and heterostructure devices; the silicon lattice matched compositions of the (In,Ga,Al)-(As,P)N 3-5 compounds. In this nitride alloy material system, the bandgap is expected to be direct at the silicon lattice matched compositions with a bandgap range most likely to be in the infrared to visible. At lattice constants ranging between those of silicon carbide and silicon, a wider bandgap range is expected to be available and the high quality material obtained through lattice matching could enable applications such as monolithic color displays, high efficiency multi-junction solar cells, opto-electronic integrated circuits for fiber communications, and the transfer of existing 3-5 technology to silicon.
The NASA aerospace program, in particular, requires breakthrough instrumentation inside the combustion chambers of engines for the purpose of, among other things, improving computational fluid dynamics code validation and active engine behavioral control (combustion, flow, stall, and noise). This environment can be as high as 600 degrees Celsius, which is beyond the capability of silicon and gallium arsenide devices. Silicon-carbide- (SiC-) based devices appear to be the most technologically mature among wide-bandgap semiconductors with the proven capability to function at temperatures above 500 degrees Celsius. However, the contact metalization of SiC degrades severely beyond this temperature because of factors such as the interdiffusion between layers, oxidation of the contact, and compositional and microstructural changes at the metal/semiconductor interface. These mechanisms have been proven to be device killers. Very costly and weight-adding packaging schemes that include vacuum sealing are sometimes adopted as a solution.
A device for dividing silicon wafers into rectangular chips is characterized by a base including a horizontally oriented bed with a planar support surface, a vacuum chuck adapted to capture a silicon wafer seated on the support for translation in mutually perpendicular directions. A stylus support mounted on the bed includes a shaft disposed above and extended across the bed and a truck mounted on the shaft and supported thereby for linear translation along a path extended across the bed a vertically oriented scribe has a diamond tip supported by the truck also adapted as to engage a silicon wafer captured by the chuck and positioned beneath it in order to form score lines in the surface of the wafer as linear translation is imparted to the truck. A chuck positioning means is mounted on the base and is connected to the chuck for positioning the chuck relative to the stylus.
A variety of silicon-fabricated devices is used in medical applications such as drug and cell delivery, and DNA and protein separation and analysis. When a fluidic device inlet is connected to a compressed gas reservoir, and the outlet is at a lower pressure, a gas flow occurs through the membrane toward the outside. The method relies on the measurement of the gas pressure over the elapsed time inside the upstream and downstream environments. By knowing the volume of the upstream reservoir, the gas flow rate through the membrane over the pressure drop can be calculated. This quality control method consists of measuring the gas flow through a device and comparing the results with a standard curve, which can be obtained by testing standard devices. Standard devices can be selected through a variety of techniques, both destructive and nondestructive, such as SEM, AFM, and standard particle filtration.
Electronic systems designed for use in deep space and planetary exploration missions are expected to encounter extreme temperatures and wide thermal swings. Silicon-based devices are limited in their wide-temperature capability and usually require extra measures, such as cooling or heating mechanisms, to provide adequate ambient temperature for proper operation. Silicon-On-Insulator (SOI) technology, on the other hand, lately has been gaining wide spread use in applications where high temperatures are encountered. Due to their inherent design, SOI-based integrated circuit chips are able to operate at temperatures higher than those of the silicon devices by virtue of reducing leakage currents, eliminating parasitic junctions, and limiting internal heating. In addition, SOI devices provide faster switching, consume less power, and offer improved radiation-tolerance. Very little data, however, exist on the performance of such devices and circuits under cryogenic temperatures. In this work, the performance of an SOI bootstrapped, full-bridge driver integrated circuit was evaluated under extreme temperatures and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of this device for use in space exploration missions under extreme temperature conditions.
This project takes advantage of the special capabilities of wide-bandgap (WBG) power semiconductor devices to develop innovative power electronics in the form of new current-source inverters (CSIs) that offer promising advantages over the dominant voltage-source inverter (VSI) topology. These CSIs, in turn, are extremely well-suited for integration into the housings of permanent magnet synchronous machines (PMSMs) to form integrated motor drives (IMDs). These new IMDs offer great promise for achieving major energy savings in a wide variety of applications that benefit from adjustable-speed control, including air conditioners, laundry appliances, industrial pumps/compressors, electric vehicles, and aerospace drives. WBG devices play a critical enabling role in these new IMDs because of their transformative features including much higher switching frequencies, lower losses, and compatibility with high operating temperatures. When incorporated into new CSI-based IMDs with PM machines, these WBG switches open the door to achieving major increases in power density, drive system efficiency, and fault tolerance, as well as substantial reductions in electromagnetic interference (EMI), manufacturing cost, and temperature-induced failures. The higher operating temperature capability of WBG devices compared to conventional silicon power devices is very appealing in IMD applications because the power electronics is mounted in close proximity to the motors which typically operate at temperatures well above the maximum limits of today’s silicon-based power electronics. This project has succeeded in designing, building, and testing multiple prototype versions of this CSI-IMD that have overcome many technical challenges in order to demonstrate the impressive performance improvements that can be achieved by the WBG-enabled CSI-IMD. The preliminary demo and bench-top versions of the current-source inverter developed during the first two years of the project were critical to laying the technical foundations for the 3 kW prototype CSI-IMD unit that was successfully built and tested during the third year. This prototype CSI-IMD unit was designed to fit within the housing envelope of the original permanent magnet (PM) synchronous machine in order to meet the demanding power density requirements that were set at the beginning of the project. All of the remaining performance objectives set for the prototype CSI-IMD unit including efficiency and electromagnetic interference (EMI) were also met. The last 18 months of the project were devoted to developing further enhancements of the WBG-enabled CSI-IMD technology that better prepare it for commercial production. More specifically, an upgraded version of the prototype CSI-IMD unit was developed that moved the power electronics into the same machine housing chamber as the motor, substantially raising the thermal demands on the power electronics. Tests with five different combinations of motor enclosure types and air cooling configurations were evaluated. Importantly, this work confirmed that the power electronics can deliver its full rated power and still operate well within its maximum temperature limits even for worst-case conditions when the housing is “totally-enclosed” without any openings for air to enter or exit the enclosure, and no blower/fan is provided to blow air over the outside surface of the enclosure. Reaching the full performance and energy-savings potential of this disruptive CSI-IMD motor drive technology is highly consistent with ARPA-E’s stated mission to “enhance the economic and energy security of the United States” while also supporting its commitment to “ensure that the U.S. maintains a technological lead in developing and deploying advanced energy technologies”. Follow-on projects are under way to explore the scalability of WBG-enabled CSI-IMD technology to 100 kW (peak) electric vehicle traction drives and fault-tolerant modular motor drives for future electrified aircraft propulsion applications.
Water contamination in thermal oxide on silicon
A semiconductor device employs at least one layer of semiconducting porous silicon carbide (SiC). The porous SiC layer has a monocrystalline structure wherein the pore sizes, shapes, and spacing are determined by the processing conditions. In one embodiment, the semiconductor device is a p-n junction diode in which a layer of n-type SiC is positioned on a p-type layer of SiC, with the p-type layer positioned on a layer of silicon dioxide. Because of the UV luminescent properties of the semiconducting porous SiC layer, it may also be utilized for other devices such as LEDs and optoelectronic devices.
Silicon-sapphire space charge limited triode development
Embodiments related to systems and methods of crack detection in wafers (e.g., silicon wafers for photovoltaics, photovoltaic devices including silicon wafers) are disclosed. In some embodiments, an apparatus may include a light source configured to illuminate a side of a wafer and a camera directed towards a first face of the wafer. In some embodiments, a long axis of a field of view of the camera may be angled relative to a propagation direction of the light source. In some embodiments, at least a portion of the field of view of the camera is offset from the path of propagation of light emitted from the light source through the wafer. In some embodiments, at least a portion of a light beam may be oriented at a positive non-zero angle relative to the first face of the wafer, and a dimension of the light beam normal to the first face of the wafer may be larger than a thickness of the wafer.
Electronic systems in planetary exploration missions and in aerospace applications are expected to encounter extreme temperatures and wide thermal swings in their operational environments. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of the missions. Electronic parts based on silicon-on-insulator (SOI) technology are known, based on device structure, to provide faster switching, consume less power, and offer better radiation-tolerance compared to their silicon counterparts. They also exhibit reduced current leakage and are often tailored for high temperature operation. However, little is known about their performance at low temperature. The performance of several SOI devices and mixed-signal circuits was determined under extreme temperatures, cold-restart, and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these devices for use in space exploration missions under extreme temperatures. The experimental results obtained on selected SOI devices are presented and discussed in this paper.
The epitaxial development and characterization of metamorphic “GaSb-on-silicon” buffers as substrates for antimonide devices is presented. The approach involves the growth of a spontaneously and fully relaxed GaSb metamorphic buffer in a primary epitaxial reactor, and use of the resulting “GaSb-on-silicon” wafer to grow subsequent layers in a secondary epitaxial reactor. The buffer growth involves four steps—silicon substrate preparation for oxide removal, nucleation of AlSb on silicon, growth of the GaSb buffer, and finally capping of the buffer to prevent oxidation. This approach on miscut silicon substrates leads to a buffer with negligible antiphase domain density. The growth of this buffer is based on inducing interfacial misfit dislocations between an AlSb nucleation layer and the underlying silicon substrate, which results in a fully relaxed GaSb buffer. A 1 μm thick GaSb layer buffer grown on silicon has ~9.2 × 10 7 dislocations/cm 2 . The complete lack of strain in the epitaxial structure allows subsequent growths to be accurately lattice matched, thus making the approach ideal for use as a substrate. Here we characterize the GaSb-on-silicon wafer using high-resolution x-ray diffraction and transmission electron microscopy. The concept’s feasibility is demonstrated by growing interband cascade light emitting devices on the GaSb-on-silicon wafer. The performance of the resulting LEDs on silicon approaches that of counterparts grown lattice matched on GaSb.
A collaborative research effort at MIT, Ohio State University and NASA has resulted in the demonstration of record quality gallium arsenide (GaAs) based single junction photovoltaic devices on silicon (Si) substrates. The ability to integrate highly efficient, radiation hard III-V based devices on silicon offers the potential for dramatic reductions in cell mass (approx.2x) and increases in cell area. Both of these improvements offer the potential for dramatic reductions in the cost of on-orbit electrical power. Recently, lattice matched InGaP/GaAs and metamorphic InGaP/InGaAs dual junction solar cells were demonstrated by MBE and OMVPE, respectively. Single junction GaAs on Si devices have been integrated into a space flight experiment (MISSES), scheduled to be launched to the International Space Station in March of 2005. I-V performance data from the GaAs/Si will be collected on-orbit and telemetered to ground stations daily. Microcracks in the GaAs epitaxial material, generated because of differences in the thermal expansion coefficient between GaAs and Si, are of concern in the widely varying thermal environment encountered in low Earth orbit. Ground based thermal life cycling (-80 C to + 80 C) equivalent to 1 year in LEO has been conducted on GaAs/Si devices with no discernable degradation in device performance, suggesting that microcracks may not limit the ability to field GaAs/Si in harsh thermal environments. Recent advances in the development and testing of III-V photovoltaic devices on Si will be presented.
Tomographic volumetric additive manufacturing (T‐VAM) rapidly prints solid objects within minutes, accessing photochemistries that are traditionally challenging for layer‐based additive manufacturing methods. This includes high‐viscosity materials, air‐free chemistries, and solid‐state systems. Catalytic chemistries are appealing as a pathway to engineering advanced materials, including tough thermosets, silicone elastomers, and complex block copolymers. However, photoactivated dormant catalytic chemistries, where the catalyst irreversibly activates upon exposure to light, are incompatible with typical tomographic VAM approaches. To address this limitation, a zero‐dose optimization strategy is devised to preserve dormant catalysts in desired regions by keeping them unexposed to light. VAM printed micro‐ and millifluidic devices and instant molds are successfully produced within minutes in silicones polymerized using photoactivated dormant platinum photohydrosilylation catalysts. The printed channels are programmed to be 500 and 2500 µm for the micro‐ and millifluidic devices, and print fidelity is assessed by X‐ray computed tomography. This work demonstrates the potential of zero‐dose optimization to expand the range of chemistries accessible for VAM, enabling the rapid fabrication of complex devices.
Processes proposed for production of SiC crystals for use in semiconductors operating at temperatures as high as 900 degrees C. Combination of new processes produce silicon carbide chips containing epitaxial layers. Chips of SiC first grown on porous carbon matrices, then placed in fluidized bed, where additional layer of SiC grows. Processes combined to yield complete process. Liquid crystallization process used to make SiC particles or chips for fluidized-bed process.
Diffusion process modeling to improve silicon integrated device reliability
The term "SiC MCPMs" (wherein "MCPM" signifies "multi-chip power module") denotes electronic power-supply modules containing multiple silicon carbide power devices and silicon-on-insulator (SOI) control integrated-circuit chips. SiC MCPMs are being developed as building blocks of advanced expandable, reconfigurable, fault-tolerant power-supply systems. Exploiting the ability of SiC semiconductor devices to operate at temperatures, breakdown voltages, and current densities significantly greater than those of conventional Si devices, the designs of SiC MCPMs and of systems comprising multiple SiC MCPMs are expected to afford a greater degree of miniaturization through stacking of modules with reduced requirements for heat sinking. Moreover, the higher-temperature capabilities of SiC MCPMs could enable operation in environments hotter than Si-based power systems can withstand. The stacked SiC MCPMs in a given system can be electrically connected in series, parallel, or a series/parallel combination to increase the overall power-handling capability of the system. In addition to power connections, the modules have communication connections. The SOI controllers in the modules communicate with each other as nodes of a decentralized control network, in which no single controller exerts overall command of the system. Control functions effected via the network include synchronization of switching of power devices and rapid reconfiguration of power connections to enable the power system to continue to supply power to a load in the event of failure of one of the modules. In addition to serving as building blocks of reliable power-supply systems, SiC MCPMs could be augmented with external control circuitry to make them perform additional power-handling functions as needed for specific applications: typical functions could include regulating voltages, storing energy, and driving motors. Because identical SiC MCPM building blocks could be utilized in a variety of ways, the cost and difficulty of designing new, highly reliable power systems would be reduced considerably. Several prototype DC-to-DC power-converter modules containing SiC power-switching devices were designed and built to demonstrate the feasibility of the SiC MCPM concept. In anticipation of a future need for operation at high temperature, the circuitry in the modules includes high-temperature inductors and capacitors. These modules were designed to be stacked to construct a system of four modules electrically connected in series and/or parallel. The packaging of the modules is designed to satisfy requirements for series and parallel interconnection among modules, high power density, high thermal efficiency, small size, and light weight. Each module includes four output power connectors two for serial and two for parallel output power connections among the modules. Each module also includes two signal connectors, electrically isolated from the power connectors, that afford four zones for signal interconnections among the SOI controllers. Finally, each module includes two input power connectors, through which it receives power from an in-line power bus. This design feature is included in anticipation of a custom-designed power bus incorporating sockets compatible with snap-on type connectors to enable rapid replacement of failed modules.