Search NASA⌕ Search

SEARCH · Search NASA

Results for “capacitance”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 1,585 records · Page 88
All sourcesNASA NTRSDOE OSTI
DOE OSTI2017

Dielectric Spectroscopy on Thermally Aged, Intact Poly-vinyl Chloride/Ethylene Propylene Rubber (PVC/EPR) Multipolar Cables

As a contribution to condition monitoring diagnostics on low voltage cables used in nuclear power plants, this work shows that broadband dielectric spectroscopy can be an effective technique to assess aging state of these cables. Broadband dielectric spectroscopy has been performed on three-conductor (tri-core) cables, insulated by EPR with PVC jacket. The main challenge has been to perform the measurement on the intact cables, by means of a custom-built connector, conceiving a non-destructive and non-intrusive technique. Results show that capacitance and dissipation factor can provide information about the aging state of the cable, without the need to destroy the sample in the measurement process.

dielectric spectroscopy, nondestructive evaluation↗
DOE OSTI2018

Dielectric and Mechanical Behavior of Thermally Aged EPR/CPE Cable Materials

Power and instrumentation cables play a crucial role in the safe operation of Nuclear Power Plants (NPPs). Thermal and other stressors present in the reactor environment cause the cable materials to degrade. In this work, dielectric and mechanical properties of cable insulation and jacket materials are studied as they are thermally aged, supporting development of non-destructive evaluation sensors for monitoring cable aging. Materials selected for this study are found in certain types of single-core unshielded power cables. These utilize ethylene propylene rubber (EPR)-based insulation material and chlorinated polyethylene (CPE)-based jacket material. Flat mats of these materials were obtained from the cable manufacturer and thermally aged at 140 °C in an air-circulating oven. Elongation-at-break was measured on tensile specimens stamped from the aged mats, and dielectric properties were measured from 100 Hz to 100 kHz using a parallel plate capacitor and precision LCR meter. In the case of aged EPR-based materials, rapid decrease in elongation at break indicating end of useful life was accompanied by a significant increase in dissipation factor, D, measured at 100 kHz. Capacitive measurement of D shows promise, therefore, as a non-destructive indicator of corresponding mechanical property changes in thermally-aged EPR-based insulation materials.

cable aging, nuclear cables, material degradation,↗
DOE OSTI2019

Design of a loop-gap resonator with bimodal uniform fields using finite element analysis

The loop-gap resonator (LGR) was originally developed to provide a uniform microwave magnetic field on a sample for electron spin resonance (ESR) experiments. The LGR is composed of one or more loops and gaps acting as inductances and capacitances respectively. Typical LGR designs produce a uniform field on a sample at a single resonant frequency, but for certain experiments it is necessary to study the response of a material to uniform fields at multiple frequencies applied simultaneously. In this study we develop an empirical design procedure using finite element method calculations to design an asymmetric loop-gap resonator with uniform fields at two frequencies in the same sample volume and analyze the field uniformity, frequency tunability and filling factors, providing comparison to a manufactured device.

Computational electromagnetics↗
DOE OSTI2024

Evaluation of Converter Performance Considering Static and Dynamic Device Part-to-Part Variability

This paper presents a methodology to incorporate and analyze the impact of semiconductor device part-to-part variation on power converter performance. By integrating extensive static and dynamic device characterization data with an automated compact model generation process that reflects manufacturing variability, device models with inherent variability features are utilized in converter simulations for a comprehensive assessment of performance impacts. The traditional converter performance evaluation process typically yields fixed efficiency values, often dismissing the inherent part-to-part variability caused by the manufacturing process of semiconductor devices. To address this limitation, a large population of devices was characterized to capture variations in static parameters-such as transfer, output, and capacitance characteristics-as well as dynamic behaviors, including switching losses. This data-driven approach enables the development of individual compact models, which were then integrated into converter simulations to evaluate efficiency ranges rather than single point estimated values. The converter simulation results show that part-to-part component variation can lead to significant efficiency deviations, exceeding several percentage points in high-power conversion applications. By offering a more accurate representation of converter behavior under real-world manufacturing conditions, this methodology enables designers to anticipate performance variability, improving the robustness of power converter designs.

device characterization↗
DOE OSTI2019

Optimal Submodule Capacitor Sizing for Modular Multilevel Converters with Common Mode Voltage Injection and Circulating Current Control

Abstract - Modular multilevel converters (MMCs), with the filterless and transformer-less features, are considered as a promising topology for high-efficiency medium voltage (MV) high voltage (HV) drive systems. However, at low frequencies (< 30 Hz), a large current ripple flowing through the capacitors of each submodule will cause significant capacitor voltage fluctuation. This paper proposes an optimal submodule capacitor selection based on the common mode voltage injection. The proposed sizing model includes two functions: a) accurately estimating the capacitor voltage ripple based on the drive system parameters; and b) identifying the minimum capacitance of the submodule capacitors based on the allowed maximum capacitor voltage fluctuations. Simulation and hardware-in-the-loop (HIL) test results show that the error between the actual and estimated values of the voltage fluctuation is within 3% using the proposed model.

Capacitor Sizing↗
DOE OSTI2017

An adaptive DC-bus stabilizer for single-phase grid-connected renewable energy source system

This paper proposes an adaptive DC-bus stabilizer for single-phase grid-connected voltage source converter (VSC) with small-scale renewable energy integration. To enhance converter's power density, the conventional active power decoupling (APD) techniques were adopted to reduce the DC capacitance by compensating the inherent second-order harmonic power ripples in the single-phase VSC. However, it would potentially make the DC voltage vulnerable to transient power ripples, which is a critical issue for the grid-connected renewable energy source (RES) system during grid faults. The proposed DC-bus stabilizer can not only compensate the second-order harmonic power ripples at normal operation, but also enhance the fault ride-through capability of the converter. The circuit topology and its corresponding control strategy are presented, and then simulation results are provided to demonstrate the feasibility and validity of the proposed DC-bus stabilizer under normal operation and grid fault condition.

Zeng, Rong↗
DOE OSTI2019

Medium Voltage (13.8 kV) Transformer-less Grid-Connected DC/AC Converter Design and Demonstration Using 10 kV SiC MOSFETs

Medium voltage (MV) power converters using high voltage (HV) Silicon Carbide (SiC) power semiconductors result in great benefits in weight, size, efficiency and control bandwidth. However, challenges still exist on the components design considering HV insulation and noise immunity requirements in the MV SiC based power converter. A 5-level MMC based transformer-less grid-connected dc/ac converter is developed for 13.8 kV medium voltage grid using 10 kV SiC MOSFETs. The key components, including gate driver with high dv/dt immunity and fast reliable protection, isolated power supply with low parasitic capacitance, voltage/current sensors with high noise immunity, and passives following related insulation standard are provided. A 25 kV dc-link phase-leg is demonstrated, and the experimental results are presented.

Ji, Shiqi↗
DOE OSTI2022

A High-Accuracy Power Loss Model of SiC MOSFETs in Current Source Inverter Considering Current Commutation and Parasitic Parameters

Power loss estimation of power electronic devices is important to the efficiency optimization of motor drives used in many applications. However, most existing simplified power loss models of silicon carbide (SiC) MOSFETs are not sufficiently accurate due to their neglect of parasitic parameters in the current commutation loop. In addition, the loss model of the voltage source inverter (VSI) cannot be directly applied to the current source inverter (CSI) because of differences between their commutation loops. First, the commutation processes for VSIs and CSIs are compared. The voltage and current trajectories of SiC MOSFETs in the switching transition of a CSI-based motor drive system are analyzed in detail. Based on these results, the conduction and switching losses of SiC MOSFETs in CSIs are modeled considering the current commutation details. In addition, the proposed analytical model includes parasitic inductances and capacitances in the current commutation loop. Experimental results have verified that the proposed power loss model delivers higher accuracy loss predictions than the conventional loss model.

current commutation, current source inverter, powe↗
DOE OSTI2023

Frequency Response Analysis to Monitor and Identify Changes in the Impedance of a Photovoltaic Panel Measured Online using a Power Optimizer

Photovoltaic (PV) cells are generally modeled as a current source due to photocurrent, p-n junction diodes with parasitic resistance, capacitance, and inductance. This paper proposes online frequency response analysis (FRA) to measure the impedance of a PV panel using an existing panel-level power optimizer in a PV system. The algorithm will actively perturb a small signal into a 300 W rooftop PV panel and compute its small signal impedance. The technology discussed is easy to incorporate, requires no additional hardware, doesn't alter the stability of the system, and is implemented at a steady-state point. The power optimizer initially stabilizes at an operating point and then perturbs the PV current via FRA and computes PV panel impedance. The relative standard deviation test conducted indoors under 300 W/m 2 illumination on a PV panel shows a less than 5% error rate in PV panel impedance magnitude and phase is measured using a power optimizer.

14 SOLAR ENERGY↗
DOE OSTI2025

10 kV Class 14 MHz Isolated Power Supply

This paper presents a single-switch based isolated power supply, utilizing a PCB based core-less transformer to achieve high inter-winding isolation and low common-mode capacitance. Detailed design procedure, considering the transformer to achieve full range ZVS, minimize voltage stress and minimize RMS currents is presented. The proposed methodology is experimentally validated at 14 MHz, with a load variation of 10:1 in output power and a maximum output power of 4 W. The proposed power supply is useful in applications such as MV gate drives and sensors.

Tessaro Andrade, Elvey [ORNL] (ORCID:0009000225919↗
DOE OSTI2025

Towards Scalable 3D Integration of 2T-nC FeRAM with Hundreds of Layer Stacking

In this article, we study the limits of the number of capacitors and read history dependence in a 2T-nC ferroelectric random-access memory (FeRAM) cell, paving the way for its high-density integration toward hundreds of stacked layers. Through a comprehensive experimental and simulation study on the scaling behavior of the 2T-nC FeRAM architecture, we demonstrate: (i) successful fabrication of 2T-64C cells with robust memory operation and clearly distinguishable ‘0’ and ‘1’ states, even in 64- capacitor configurations; (ii) that the parasitic capacitance of the floating node originates predominantly from the linear component of the ferroelectric capacitor, and its impact on n-scaling—due to degraded sense margin—can be mitigated by floating unselected capacitors with enough TΩ isolation; (iii) that sharing write and read transistors among n capacitors introduces a read history dependence issue due to fluctuating floating node voltage (VFN); and (iv) that a proposed FN discharge scheme can effectively eliminate read-sequence dependence, at the cost of reduced read endurance.

36 MATERIALS SCIENCE↗
DOE OSTI2018

Performance of High Voltage Bipolar Pulse Generator with Fast Push-Pull Solid-State Switch Modules

Four identical pulse generators (pulsers) provide fast beam deflection in the Low Energy Beam Transport (LEBT) beam chopping system at the Spallation Neutron Source (SNS) Linac. The existing pulsers have become obsolete and need to be replaced to improve overall performance of the chopper system. A new bipolar pulse generator has been designed, and a prototype has been built and tested at the SNS. The generator uses fast push-pull transistor BEHLKE switch modules. It can produce a 1MHz burst of alternate 2.5kV with adjustable pulse widths during the 1-ms macro-pulse at a burst repetition frequency of 60Hz with rise/fall times of less than 40ns into a 100pF capacitive load. The performance enhancements of this new pulser in comparison with existing and previous versions of the pulse generator are discussed in the paper. The pulser can be used in applications requiring a series of bipolar ±3.5kV pulses, or unipolar pulses of positive or negative polarity with amplitude up to 4.5kV and various pulse widths with a minimum of 150ns. The maximum switching frequency, number of pulses, or burst repetition frequency in burst mode is limited by maximum power dissipation in the switches and other components. The features of this new pulser along with the results of timing control adjustments, timing and temperature measurements, and HV full power testing on the test stand are presented.

Peplov, Vladimir↗
DOE OSTI2018

Characterization and Comparison of Trench and Planar Silicon Carbide (SiC) MOSFET at Different Temperatures

In this paper, the static and dynamic characteristics of discrete 650 V and 1200 V trench TO 247 SiC MOSFET is evaluated and compared with a similar current rating 1200 V planar gate discrete TO 247 SiC MOSFET. The new trench MOSFET has promising application for vehicle charging and auxiliary power supply application due to the lower on-state resistance and lower capacitance. Static characteristics for these devices are evaluated using a curve tracer for different device junction temperature A common double pulse test (DPT) platform is developed to evaluate the switching loss at different device junction temperature ranging from 25°C to 175°C. The experimental setup and results are presented for different load currents and temperature.

Anwar, Saeed↗
DOE OSTI2020

High-Energy Density Capacitors for Electric Vehicle Traction Inverters

DC bus capacitors take up substantial space in a traction inverter, limiting the traction drive power density. Thus, several commercial capacitor technologies, under consideration for use as DC bus capacitors for electric vehicle traction inverters, were reviewed for their ability to optimize the volume of traction inverters and are evaluated in this paper. Three promising capacitor technologies--film, ceramic, and PLZT have been selected for detailed experimental characterization. Experimental results for equivalent series resistance, equivalent series inductance, and effective capacitance with respect to DC bias voltage for various operating frequencies and temperatures are presented. The results reveal the superiority of the PLZT capacitor in terms of power density, current conduction capability, and redundancy.

Chowdhury, Shajjad↗
DOE OSTI2019

An Analytical Model for Predicting Turn-ON Overshoot in Normally-OFF GaN HEMTs

Recently, a major challenge in the adoption of wide bandgap semiconductors for power electronic applications is the need to trade device performance for device safety. In this article, methods for predicting gate voltage overshoot in normally-OFF gallium nitride (GAN) high electron mobility transistors (HEMTs) are derived in order to deliver optimal device performance. Two models are proposed; a simple, yet less accurate second order model and a complex, yet more accurate fourth order model. These models allow for the calculation of gate resistances necessary for a desired amount of gate voltage overshoot. The nonlinear capacitances of the device are considered in the analysis. The models are validated with an experimental double-pulse tester. Furthermore, these newly developed models allow design engineers to extract the best possible performance of commercially available GaN devices while keeping the devices in their safe-operating region.

42 ENGINEERING↗
DOE OSTI2020

Quantifying Dynamic On-State Resistance of GaN HEMTs for Power Converter Design via a Survey of Low and High Voltage Devices

Designing and optimizing high switching frequency, ultra-efficient converters requires detailed knowledge of the behavior and parasitic parameters for both active and passive components. Recently, wide bandgap transistors have enabled simultaneous increases in both switching frequency and efficiency due to higher maximum operating junction temperature limits, lower dc on-state resistances, and reduced parasitic inductances and capacitances. Yet, the early acceptance of gallium-nitride (GaN) switches was plagued by detrimental dynamic on-state resistance effects. This complex phenomenon for GaN devices is characterized by deviations in on-state resistance from dc operating characteristics based on design choices such as the magnitude and duration of both voltage and current stress, switching mode, and junction temperature. While device manufacturers have made improvements compared to early generation devices, experimental evidence from a survey of commercial GaN transistors highlight measurable change in on-state resistance still exists due to variations in voltage stress during hard-switching operation. After sharing insights for obtaining low noise measurements, an analysis method along with two metrics are proposed to characterize dynamic on-state resistance measurements for power electronics designers. Furthermore, quantifying the performance of GaN devices with standardized metrics facilitates a fair comparison between different GaN device technologies during converter development, enables manufacturing qualification for GaN switches, and provides a benchmark to catalyze improvement for the next generation of GaN device development.

14 SOLAR ENERGY↗