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At least 1,585 records · Page 88

Implementation of ISEE-3 trajectory control

Control of the trajectory and attitude for the International Sun-Earth Explorer-3 (ISEE-3) spacecraft is performed using an onboard hydrazine propulsion system. This paper describes the spacecraft hardware and operational limitations that were considered in the planning, execution, and evaluation of all ISEE-3 maneuvers performed to date. Propulsion system performance and spacecraft dynamics models as implemented in the maneuver support computer software are described. Examples are presented that show how maneuver goals are achieved while satisfying mission orbit and attitude constraints. Procedures used in the development of maneuver plans are detailed for the second midcourse correction maneuver which typifies maneuver operations in general.

Erickson, J. A.↗

Testing for the J-2X Upper Stage Engine

NASA selected the J-2X Upper Stage Engine in 2006 to power the upper stages of the Ares I crew launch vehicle and the Ares V cargo launch vehicle. Based on the proven Saturn J-2 engine, this new engine will provide 294,000 pounds of thrust and a specific impulse of 448 seconds, making it the most efficient gas generator cycle engine in history. The engine's guiding philosophy emerged from the Exploration Systems Architecture Study (ESAS) in 2005. Goals established then called for vehicles and components based, where feasible, on proven hardware from the Space Shuttle, commercial, and other programs, to perform the mission and provide an order of magnitude greater safety. Since that time, the team has made unprecedented progress. Ahead of the other elements of the Constellation Program architecture, the team has progressed through System Requirements Review (SRR), System Design Review (SDR), Preliminary Design Review (PDR), and Critical Design Review (CDR). As of February 2010, more than 100,000 development engine parts have been ordered and more than 18,000 delivered. Approximately 1,300 of more than 1,600 engine drawings were released for manufacturing. A major factor in the J-2X development approach to this point is testing operations of heritage J-2 engine hardware and new J-2X components to understand heritage performance, validate computer modeling of development components, mitigate risk early in development, and inform design trades. This testing has been performed both by NASA and its J-2X prime contractor, Pratt & Whitney Rocketdyne (PWR). This body of work increases the likelihood of success as the team prepares for testing the J-2X powerpack and first development engine in calendar 2011. This paper will provide highlights of J-2X testing operations, engine test facilities, development hardware, and plans.

Buzzell, James C.↗

Demonstration of a Balloon Borne Arc-Second Pointer Design

Many designs for utilizing stratospheric balloons as low-cost platforms on which to conduct space science experiments have been proposed throughout the years. A major hurdle in extending the range of experiments for which these vehicles are useful has been the imposition of the gondola dynamics on the accuracy with which an instrument can be kept pointed at a celestial target. A significant number of scientists have sought the ability to point their instruments with jitter in the arc-second range. This paper presents the design and analysis of a stratospheric balloon borne pointing system that is able to meet this requirement. The test results of a demonstration prototype of the design with similar ability are also presented. Discussion of a high fidelity controller simulation for design analysis is presented. The flexibility of the flight train is represented through generalized modal analysis. A multiple controller scheme is utilized for coarse and fine pointing. Coarse azimuth pointing is accomplished by an established pointing system, with extensive flight history, residing above the gondola structure. A pitch-yaw gimbal mount is used for fine pointing, providing orthogonal axes when nominally on target. Fine pointing actuation is from direct drive dc motors, eliminating backlash problems. An analysis of friction nonlinearities and a demonstration of the necessity in eliminating static friction are provided. A unique bearing hub design is introduced that eliminates static friction from the system dynamics. A control scheme involving linear accelerometers for enhanced disturbance rejection is also presented. Results from a linear analysis of the total system and the high fidelity simulation are given. Results from a generalized demonstration prototype are presented. Commercial off-the-shelf (COTS) hardware was used to demonstrate the efficacy and performance of the pointer design for a mock instrument. Sub-arcsecond pointing ability from a ground hang test setup is shown from the testing results. This paper establishes that the proposed control strategy can be made robustly stable with significant design margins. Also demonstrated is the efficacy of the proposed system in rejecting disturbances larger than those considered realistic. The system is implemented and demonstrates sub arc second pointing ability using COTS hardware. Finally, we see that sub arc-second pointing stability can be achieved for a large instrument pointing at an inertial target.

DeWeese, Keith D.↗

Centaur operations at the space station: Cost and transportation analysis

A study was conducted to expand on the results of an initial study entitled Centaur Operations at the Space Station. The previous study developed technology demonstration missions (TDMs) that utilized the Centaur G-prime upper stage to advance OTV technologies required for accomodations and operations at the Space Station. An initial evaluation was performed of the cost to NASA for TDM implementation. Due to the potential for commercial communication satellite operation utilizing the TDM hardware, an evaluation of the Centaur's transportation potential was also performed.

Source record↗

Understanding the I/O Performance Gap Between Cori KNL and Haswell

The Cori system at NERSC has two compute partitions with different CPU architectures: a 2,004 node Haswell partition and a 9,688 node KNL partition, which ranked as the 5th most powerful and fastest supercomputer on the November 2016 Top 500 list. The compute partitions share a common storage configuration, and understanding the IO performance gap between them is important, impacting not only to NERSC/LBNL users and other national labs, but also to the relevant hardware vendors and software developers. In this paper, we have analyzed performance of single core and single node IO comprehensively on the Haswell and KNL partitions, and have discovered the major bottlenecks, which include CPU frequencies and memory copy performance. We have also extended our performance tests to multi-node IO and revealed the IO cost difference caused by network latency, buffer size, and communication cost. Overall, we have developed a strong understanding of the IO gap between Haswell and KNL nodes and the lessons learned from this exploration will guide us in designing optimal IO solutions in many-core era.

97 MATHEMATICS AND COMPUTING↗

Thermal Cycling of Mir Cooperative Solar Array (MCSA) Test Panels

The Mir Cooperative Solar Array (MCSA) project was a joint US/Russian effort to build a photovoltaic (PV) solar array and deliver it to the Russian space station Mir. The MCSA is currently being used to increase the electrical power on Mir and provide PV array performance data in support of Phase 1 of the International Space Station (ISS), which will use arrays based on the same solar cells used in the MCSA. The US supplied the photovoltaic power modules (PPMs) and provided technical and programmatic oversight while Russia provided the array support structures and deployment mechanism and built and tested the array. In order to ensure that there would be no problems with the interface between US and Russian hardware, an accelerated thermal life cycle test was performed at NASA Lewis Research Center on two representative samples of the MCSA. Over an eight-month period (August 1994 - March 1995), two 15-cell MCSA solar array 'mini' panel test articles were simultaneously put through 24,000 thermal cycles (+80 C to -100 C), equivalent to four years on-orbit. The test objectives, facility, procedure and results are described in this paper. Post-test inspection and evaluation revealed no significant degradation in the structural integrity of the test articles and no electrical degradation, not including one cell damaged early as an artifact of the test and removed from consideration. The interesting nature of the performance degradation caused by this one cell, which only occurred at elevated temperatures, is discussed. As a result of this test, changes were made to improve some aspects of the solar cell coupon-to-support frame interface on the flight unit. It was concluded from the results that the integration of the US solar cell modules with the Russian support structure would be able to withstand at least 24,000 thermal cycles (4 years on-orbit).

Hoffman, David J.↗

ExaSat: An Exascale Static Analysis Tool (ExaSat) v1.0

The ExaSAT framework automates the extraction of parameterized performance models directly from source code using compiler analysis. Its parameterized analytic model enables quantitative evaluation of a broad range of hardware design trade-offs and software optimizations on a variety of different performance metrics, with a primary focus on data movement as a metric. ExaSAT analysis provides insights in the hardware and software tradeoffs and lays the groundwork for exploring a more targeted set of design points using cycle-accurate architectural simulators and emulators.

Chan, Cy↗

D-1A equipment module structure test

The Centaur Equipment Module (E/M) structural test program was performed in two parts due to an unscheduled hardware failure in the first test series. The objectives of the initial test program were to define the flexibility characteristics of the E/M, verify the design load capability, and determine its ultimate strength capability by loading to structural failure. However, during the first failure test attempt, the Intelsat IV MPA failed instead of the E/M. Therefore a new adapter was fabricated to simulate the HEAO mission adapter and the second series of tests were then performed. They concluded with the failure of the E/M forward interface ring resulting in about 3.5 degrees of permanent set on the high compression side. Nevertheless, the linear or useable strength capability of the E/M is greater or equal to that which is required for the HEAO missions. The E/M is deemed structurally qualified for the HEAO missions.

Niezgoda, T. F.↗

Analog Signal Correlating Using an Analog-Based Signal Conditioning Front End

This innovation is capable of correlating two analog signals by using an analog-based signal conditioning front end to hard-limit the analog signals through adaptive thresholding into a binary bit stream, then performing the correlation using a Hamming "similarity" calculator function embedded in a one-bit digital correlator (OBDC). By converting the analog signal into a bit stream, the calculation of the correlation function is simplified, and less hardware resources are needed. This binary representation allows the hardware to move from a DSP where instructions are performed serially, into digital logic where calculations can be performed in parallel, greatly speeding up calculations.

Prokop, Norman↗

RDPM: An Extensible Tool for Resilience Design Patterns Modelling

Resilience to faults, errors, and failures in extreme-scale high-performance computing (HPC) systems is a critical challenge. Resilience design patterns offer a new, structured hardware and software design approach for improving resilience. While prior work focused on developing performance, reliability, and availability models for resilience design patterns, this paper extends it by providing a Resilience Design Patterns Modeling (RDPM) tool which allows (1) exploring performance, reliability, and availability of each resilience design pattern, (2) offering customization of parameters to optimize performance, reliability, and availability, and (3) allowing investigation of trade-off models for combining multiple patterns for practical resilience solutions.

Kumar, Mohit↗

QCOR; A Language Extension Specification for the Heterogeneous Quantum-Classical Model of Computation

Quantum computing (QC) is an emerging computational paradigm that leverages the laws of quantum mechanics to perform elementary logic operations. Existing programming models for QC were designed with fault-tolerant hardware in mind, envisioning stand-alone applications. However, the susceptibility of near-term quantum computers to noise limits their stand-alone utility. To better leverage limited computational strengths of noisy quantum devices, hybrid algorithms have been suggested whereby quantum computers are used in tandem with their classical counterparts in a heterogeneous fashion. This modus operandi calls out for a programming model and a high-level programming language that natively and seamlessly supports heterogeneous quantum-classical hardware architectures in a single-source-code paradigm. Motivated by the lack of such a model, we introduce a language extension specification, called QCOR, which enables single-source quantum-classical programming. Programs written using the QCOR library–based language extensions can be compiled to produce functional hybrid binary executables. After defining QCOR’s programming model, memory model, and execution model, we discuss how QCOR enables variational, iterative, and feed-forward QC. Additionally, QCOR approaches quantum-classical computation in a hardware-agnostic heterogeneous fashion and strives to build on best practices of high-performance computing. The high level of abstraction in the language extension is intended to accelerate the adoption of QC by researchers familiar with classical high-performance computing.

97 MATHEMATICS AND COMPUTING↗

Design-Technology Co-Optimization for NVM-based Neuromorphic Processing Elements

An emerging use-case of machine learning (ML) is to train a model on a high-performance system and deploy the trained model on energy-constrained embedded systems. Neuromorphic hardware platforms, which operate on principles of the biological brain, can significantly lower the energy overhead of a machine learning inference task, making these platforms an attractive solution for embedded ML systems. In this paper, we present a design-technology tradeoff analysis to implement such inference tasks on the processing elements (PEs) of a Non-Volatile Memory (NVM)-based neuromorphic hardware. Through detailed circuit-level simulations at scaled process technology nodes, we show the negative impact of technology scaling on the information-processing latency, which impacts the quality-of-service (QoS) of an embedded ML system. At a finer granularity, the latency inside a PE depends on 1) the delay introduced by parasitic components on its current paths, and 2) the varying delay to sense different resistance states of its NVM cells. Based on these two observations, we make the following three contributions. First, on the technology front, we propose an optimization scheme where the NVM resistance state that takes the longest time to sense is set on current paths having the least delay, and vice versa, reducing the average PE latency, which improves the QoS. Second, on the architecture front, we introduce isolation transistors within each PE to partition it into regions that can be individually power-gated, reducing both latency and energy. Finally, on the system-software front, we propose a mechanism to leverage the proposed technological and architectural enhancements when implementing a machine-learning inference task on neuromorphic PEs of the hardware. Evaluations with a recent neuromorphic hardware architecture show that our proposed design-technology co-optimization approach improves both performance and energy efficiency of machine-learning inference tasks without incurring high cost-per-bit.

42 ENGINEERING↗

Gas-grain simulation experiment module conceptual design and gas-grain simulation facility breadboard development

This report delineates the Option portion of the Phase A Gas-Grain Simulation Facility study. The conceptual design of a Gas-Grain Simulation Experiment Module (GGSEM) for Space Shuttle Middeck is discussed. In addition, a laboratory breadboard was developed during this study to develop a key function for the GGSEM and the GGSF, specifically, a solid particle cloud generating device. The breadboard design and test results are discussed and recommendations for further studies are included. The GGSEM is intended to fly on board a low earth orbit (LEO), manned platform. It will be used to perform a subset of the experiments planned for the GGSF for Space Station Freedom, as it can partially accommodate a number of the science experiments. The outcome of the experiments performed will provide an increased understanding of the operational requirements for the GGSF. The GGSEM will also act as a platform to accomplish technology development and proof-of-principle experiments for GGSF hardware, and to verify concepts and designs of hardware for GGSF. The GGSEM will allow assembled subsystems to be tested to verify facility level operation. The technology development that can be accommodated by the GGSEM includes: GGSF sample generation techniques, GGSF on-line diagnostics techniques, sample collection techniques, performance of various types of sensors for environmental monitoring, and some off-line diagnostics. Advantages and disadvantages of several LEO platforms available for GGSEM applications are identified and discussed. Several of the anticipated GGSF experiments require the deagglomeration and dispensing of dry solid particles into an experiment chamber. During the GGSF Phase A study, various techniques and devices available for the solid particle aerosol generator were reviewed. As a result of this review, solid particle deagglomeration and dispensing were identified as key undeveloped technologies in the GGSF design. A laboratory breadboard version of a solid particle generation system was developed and characterization tests performed. The breadboard hardware emulates the functions of the GGSF solid particle cloud generator in a ground laboratory environment, but with some modifications, can be used on other platforms.

Zamel, James M.↗

Overview of NASA's Thermal Control System Development for Exploration Project

NASA s Constellation Program includes the Orion, Altair, and Lunar Surface Systems project offices. The first two elements, Orion and Altair, are manned space vehicles while the third element is broader and includes several subelements including Rovers and a Lunar Habitat. The upcoming planned missions involving these systems and vehicles include several risks and design challenges. Due to the unique thermal environment, many of these risks and challenges are associated with the vehicles thermal control system. NASA s Exploration Systems Mission Directorate (ESMD) includes the Exploration Technology Development Program (ETDP). ETDP consists of several technology development projects. The project chartered with mitigating the aforementioned risks and design challenges is the Thermal Control System Development for Exploration Project. The risks and design challenges are addressed through a rigorous technology development process that culminates with an integrated thermal control system test. The resulting hardware typically has a Technology Readiness Level (TRL) of six. This paper summarizes the development efforts being performed by the technology development project. The development efforts involve heat acquisition and heat rejection hardware including radiators, heat exchangers, and evaporators. The project has also been developing advanced phase change material heat sinks and performing assessments for thermal control system fluids. The current paper will provide an update to a similar overview paper published at last year s International Conference on Environmental Systems (ICES).

Stephan, Ryan A.↗

Overview of NASA's Thermal Control System Development for Exploration Project

NASA's Constellation Program includes the Orion, Altair, and Lunar Surface Systems project offices. The first two elements, Orion and Altair, are manned space vehicles while the third element is broader and includes several sub-elements including Rovers and a Lunar Habitat. The upcoming planned missions involving these systems and vehicles include several risks and design challenges. Due to the unique thermal environment, many of these risks and challenges are associated with the vehicles' thermal control system. NASA's Exploration Systems Mission Directorate (ESMD) includes the Exploration Technology Development Program (ETDP). ETDP consists of several technology development projects. The project chartered with mitigating the aforementioned risks and design challenges is the Thermal Control System Development for Exploration Project. The risks and design challenges are addressed through a rigorous technology development process that culminates with an integrated thermal control system test. The resulting hardware typically has a Technology Readiness Level (TRL) of six. This paper summarizes the development efforts being performed by the technology development project. The development efforts involve heat acquisition and heat rejection hardware including radiators, heat exchangers, and evaporators. The project has also been developing advanced phase change material heat sinks and performing assessments for thermal control system fluids.

Stephan, Ryan A.↗

The state of Monte Carlo neutron transport on GPU accelerators - A review - 25609

A review of the current state of Monte Carlo neutron transport of Graphical Processing Units (GPUs) has been performed. Up-to-date data has been solicited from researchers in the field and combined with data available in literature to provide the current state of Monte Carlo neutron transport on GPU hardware. Nine implementations of neutron transport on GPUs have been summarized and the performance results have been presented to allow the reader to compare performance. A comparison of the results has shown that researchers obtained similar performance when scaled to the performance of NVIDIA Tesla K40 GPUs. A strong scaling equation will be presented that can be used to describe the GPU performance against different numbers of CPU cores. One implementation of a production Monte Carlo code on GPU hardware, the code Shift, showed that newer NVIDIA Pascal and Volta based GPUs provide a significant performance improvement. (authors)

61 RADIATION PROTECTION AND DOSIMETRY↗

A checkpoint compression study for high-performance computing systems

As high-performance computing systems continue to increase in size and complexity, higher failure rates and increased overheads for checkpoint/restart (CR) protocols have raised concerns about the practical viability of CR protocols for future systems. Previously, compression has proven to be a viable approach for reducing checkpoint data volumes and, thereby, reducing CR protocol overhead leading to improved application performance. In this article, we further explore compression-based CR optimization by exploring its baseline performance and scaling properties, evaluating whether improved compression algorithms might lead to even better application performance and comparing checkpoint compression against and alongside other software- and hardware-based optimizations. Our results highlights are: (1) compression is a very viable CR optimization; (2) generic, text-based compression algorithms appear to perform near optimally for checkpoint data compression and faster compression algorithms will not lead to better application performance; (3) compression-based optimizations fare well against and alongside other software-based optimizations; and (4) while hardware-based optimizations outperform software-based ones, they are not as cost effective.

97 MATHEMATICS AND COMPUTING↗