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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,603 records · Page 89
All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Evaluating the Performance of Integer Sum Reduction on an Intel GPU

Sum reduction is a primitive operation in parallel computing while SYCL is a promising heterogeneous programming language. In this paper, we describe the SYCL implementations of integer sum reduction using atomic functions, shared local memory, vectorized memory accesses, and parameterized workload sizes. Evaluating the reduction kernels shows that we can achieve 1.4X speedup over the open-source implementations of sum reduction for a sufficiently large number of integers on an Intel integrated GPU.

Jin, Zheming↗
DOE OSTI2018

Symmetric Indefinite Linear Solver Using OpenMP Task on Multicore Architectures

Recently, the Open Multi-Processing (OpenMP) standard has incorporated task-based programming, where a function call with input and output data is treated as a task. At run time, OpenMP's superscalar scheduler tracks the data dependencies among the tasks and executes the tasks as their dependencies are resolved. On a shared-memory architecture with multiple cores, the independent tasks are executed on different cores in parallel, thereby enabling parallel execution of a seemingly sequential code. With the emergence of many-core architectures, this type of programming paradigm is gaining attention-not only because of its simplicity, but also because it breaks the artificial synchronization points of the program and improves its thread-level parallelization. In this paper, we use these new OpenMP features to develop a portable high-performance implementation of a dense symmetric indefinite linear solver. Obtaining high performance from this kind of solver is a challenge because the symmetric pivoting, which is required to maintain numerical stability, leads to data dependencies that prevent us from using some common performance-improving techniques. To fully utilize a large number of cores through tasking, while conforming to the OpenMP standard, we describe several techniques. Our performance results on current many-core architectures-including Intel's Broadwell, Intel's Knights Landing, IBM's Power8, and Arm's ARMv8-demonstrate the portable and superior performance of our implementation compared with the Linear Algebra PACKage (LAPACK). The resulting solver is now available as a part of the PLASMA software package.

Computer Science↗
DOE OSTI2021

cuTS: Scaling Subgraph Isomorphism on Distributed Multi-GPUSystems Using Trie Based Data Structure

Subgraph isomorphism is a pattern-matching algorithm widely used in many domains such as chem-informatics, bioinformatics, databases, and social network analysis. It is computationally expensive and is a proven NP-hard problem. The massive parallelism offered by the GPU hardware is well suited for solving the subgraph isomorphism. However, current GPU implementations are far from the achievable performance. Moreover, the enormous memory requirement of current approaches limits the problem size that can be handled. This work analyzes the fundamental challenges associated with processing the subgraph isomorphism on GPUs and develops an efficient GPU hardware-aware implementation. We also develop a new GPU-friendly trie-based data structure to drastically reduce the intermediate storage space requirement. Hence, our approach runs larger benchmarks than the competitors. We also develop the first distributed sub-graph isomorphism algorithm for GPUs. Our experimental evaluation section demonstrates the efficacy of our approach by comparing the execution time and number of cases that we can handle against the state-of-the-art GPU implementations.

Xiang, Lizhi↗
DOE OSTI2023

GPU Profiling and Optimizing xRAGE (Final Report)

Our project’s objective is to increase the efficiency of GPU-enabled kernels in xRAGE. To do so, we conduct GPU profiling with NSight Systems on xRAGE tests unsplit_sod_1d and unsplit_sedov_2d to identify bottlenecks and understand the behavior of the GPU during code execution. Next, we analyze these generated GPU profiles to locate the lines of code whose optimization have the most potential for improving runtime. We replicate the structure of the code in smaller test problems that are easier to understand, edit, and run quickly. Within these test problems, we implement two different methods of improving performance: transformation of nested loops into a single MDRangePolicy and hierarchical parallelization using teams of threads. Both methods show speedups in the test code, and after transferring them to xRAGE, they both show up to 30x speedups on various computing platforms. Profiling the edited versions of xRAGE reveals that the GPU successfully executed the bottlenecks with greater efficiency

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1981

A systems approach to mechanisms for a white light coronagraph X-ray XUV telescope

A combined instrument package containing nine mechanisms was designed and developed for the international solar polar mission (ISPM). This complement of instruments, commonly called the CXX, is the only imaging system on either the NASA or ESA spacecraft and consists of a white light coronagraph mounted parallel to a combined X-ray and extreme ultra-violet (XUV) telescope. Requirements for and implementation of mechanisms in the CXX instrument are discussed.

R Mastronardi↗
NASA NTRS1989

The PARTY parallel runtime system

In the present automated system for the organization of the data and computational operations entailed by parallel problems, in ways that optimize multiprocessor performance, general heuristics for partitioning program data and control are implemented by capturing and manipulating representations of a computation at run time. These heuristics are directed toward the dynamic identification and allocation of concurrent work in computations with irregular computational patterns. An optimized static-workload partitioning is computed for such repetitive-computation pattern problems as the iterative ones employed in scientific computation.

Saltz, J. H.↗
NASA NTRS1989

A single-assignment language in a distributed memory multiprocessor

The implementation of the single-assignment programming language SISAL (McGraw et al., 1985) on a Symult 2010 parallel computer is described. The advantages of single-assignment languages over imperative languages in a multiprocessor environment are reviewed; the characteristics of SISAL are summarized; the program-graph generation and dynamic data partitioning procedures are explained; and the application of SISAL in constructing a concurrent iterative multigrid algorithm is discussed in detail and illustrated with diagrams.

Evripidou, P.↗
NASA NTRS1992

Ferroelectric/Optoelectronic Memory/Processor

Proposed hybrid optoelectronic nonvolatile analog memory and data processor comprises planar array of microscopic photosensitive ferroelectric capacitors performing massively parallel analog computations. Processors overcome electronic crosstalk and limitations on number of input/output contacts inherent in electronic implementations of large interconnection arrays. Used in general optical computing, recognition of patterns, and artificial neural networks.

Thakoor, Sarita↗
NASA NTRS1992

Interactive explorations of hierarchical segmentations

The authors report on the implementation of an interactive tool, called HSEGEXP, to interactively explore the hierarchical segmentation produced by the iterative parallel region growing (IPRG) algorithm to select the best segmentation result. This combination of the HSEGEXP tool with the IPRG algorithm amounts to a computer-assisted image segmentation system guided by human interaction. The initial application of the HSEGEXP tool is in the refinement of ground reference data based on the IPRG/HSEGEXP segmentation of the corresponding remotely sensed image data. The HSEGEXP tool is being used to help evaluate the effectiveness of an automatic 'best' segmentation process under development.

Tilton, James C.↗
NASA NTRS1989

Parallel FORTH

The extension of Forth into the realm of parallel processing on the Massively Parallel Processor (MPP) is described. The extended language, MPP Parallel FORTH, is a derivative of Forth-83 with extensions designed by the author as philosophically similar to serial Forth as possible. The MPP hardware characteristics are discussed, as viewed by the Forth programmer, and then a description is presented of MPP Parallel FORTH along with a detailed example developed by the author showing how the bitonic sort is implemented in this language.

Dorband, John E.↗
NASA NTRS1993

Experience in using SIMD and MIMD parallelism for computational fluid dynamics

One of the key objectives of the Applied Research Branch in the Numerical Aerodynamic Simulation (NAS) Systems Division at NASA Ames Research Center is the accelerated introduction of highly parallel machines into a fully operational environment. In this report we summarize some of the experiences with the parallel testbed machines at the NAS Applied Research Branch. We discuss the performance results obtained from the implementation of two computational fluid dynamics (CFD) applications, an unstructured grid solver and a particle simulation, on the Connection Machine CM-2 and the Intel iPSC/860.

Simon, Horst D.↗
NASA NTRS2004

SCA Waveform Development for Space Telemetry

The NASA Glenn Research Center is investigating and developing suitable reconfigurable radio architectures for future NASA missions. This effort is examining software-based open-architectures for space based transceivers, as well as common hardware platform architectures. The Joint Tactical Radio System's (JTRS) Software Communications Architecture (SCA) is a candidate for the software approach, but may need modifications or adaptations for use in space. An in-house SCA compliant waveform development focuses on increasing understanding of software defined radio architectures and more specifically the JTRS SCA. Space requirements put a premium on size, mass, and power. This waveform development effort is key to evaluating tradeoffs with the SCA for space applications. Existing NASA telemetry links, as well as Space Exploration Initiative scenarios, are the basis for defining the waveform requirements. Modeling and simulations are being developed to determine signal processing requirements associated with a waveform and a mission-specific computational burden. Implementation of the waveform on a laboratory software defined radio platform is proceeding in an iterative fashion. Parallel top-down and bottom-up design approaches are employed.

Mortensen, Dale J.↗
NASA NTRS2004

A Re-programmable Platform for Dynamic Burn-in Test of Xilinx Virtexll 3000 FPGA for Military and Aerospace Applications

Field Programmable Gate Arrays (FPGA) have played increasingly important roles in military and aerospace applications. Xilinx SRAM-based FPGAs have been extensively used in commercial applications. They have been used less frequently in space flight applications due to their susceptibility to single-event upsets. Reliability of these devices in space applications is a concern that has not been addressed. The objective of this project is to design a fully programmable hardware/software platform that allows (but is not limited to) comprehensive static/dynamic burn-in test of Virtex-II 3000 FPGAs, at speed test and SEU test. Conventional methods test very few discrete AC parameters (primarily switching) of a given integrated circuit. This approach will test any possible configuration of the FPGA and any associated performance parameters. It allows complete or partial re-programming of the FPGA and verification of the program by using read back followed by dynamic test. Designers have full control over which functional elements of the FPGA to stress. They can completely simulate all possible types of configurations/functions. Another benefit of this platform is that it allows collecting information on elevation of the junction temperature as a function of gate utilization, operating frequency and functionality. A software tool has been implemented to demonstrate the various features of the system. The software consists of three major parts: the parallel interface driver, main system procedure and a graphical user interface (GUI).

Field Programmable Gate Arrays (FPGA)↗
NASA NTRSDate not supplied

Adaptive Control and Scaling Approach for the Emulation of Dynamic Sub-scale Torque Loads

Previous research by the authors proposed a control and scaling approach for emulating dynamic sub-scale torque loads. This approach produced an emulation controller that successfully regulated the dynamic behavior of a sub-scale electro-mechanical system intended to be a dynamical representation of the sub-scale turboelectric powertrain of a single-aisle commercial aircraft. The sub-scale system provides an environment without turbomachinery or rotors for the initial testing of electrified aircraft propulsion (EAP) control algorithms as they would be applied to a full-scale EAP system. The sub-scale turbomachinery/rotor torque loads were produced by electric machines (EMs) driven by the control and scaling approach, a full-scale turboelectric powertrain model, and an advanced EAP control algorithm. Although successfully tested, this approach produces an emulation controller that does not guarantee asymptotic stability. Modifying the original control law and integrating adaptive control techniques into the emulation controller allows the designer to guarantee asymptotic stability. This paper introduces the idea behind the emulation controller modifications, derives the controller, proves asymptotic stability, describes the implementation of the controller on a sub-scale electro-mechanical system intended to represent a parallel hybrid-electric turbofan engine, and describes the testing of a full-scale advanced EAP control algorithm. The turbofan engine and emulation controller performance are compared to results obtained using the previous, non-adaptive control and scaling approach.

adaptive↗
NASA NTRSDate not supplied

Adaptive Control and Scaling Approach for the Emulation of Dynamic Subscale Torque Loads

Previous research by the authors proposed a control and scaling approach for emulating dynamic sub-scale torque loads. This approach produced an emulation controller that successfully regulated the dynamic behavior of a sub-scale electro-mechanical system intended to be a dynamical representation of the sub-scale turboelectric powertrain of a single-aisle commercial aircraft. The sub-scale system provides an environment without turbomachinery or rotors for the initial testing of electrified aircraft propulsion (EAP) control algorithms as they would be applied to a full-scale EAP system. The sub-scale turbomachinery/rotor torque loads were produced by electric machines (EMs) driven by the control and scaling approach, a full-scale turboelectric powertrain model, and an advanced EAP control algorithm. Although successfully tested, this approach produces an emulation controller that does not guarantee asymptotic stability. Modifying the original control law and integrating adaptive control techniques into the emulation controller allows the designer to guarantee asymptotic stability. This paper introduces the idea behind the emulation controller modifications, derives the controller, proves asymptotic stability, describes the implementation of the controller on a sub-scale electro-mechanical system intended to represent a parallel hybrid-electric turbofan engine, and describes the testing of a full-scale advanced EAP control algorithm. The turbofan engine and emulation controller performance are compared to results obtained using the previous, non-adaptive control and scaling approach.

adaptive↗
NASA NTRS1993

Distributed Virtual System (DIVIRS) Project

As outlined in our continuation proposal 92-ISI-50R (revised) on contract NCC 2-539, we are (1) developing software, including a system manager and a job manager, that will manage available resources and that will enable programmers to program parallel applications in terms of a virtual configuration of processors, hiding the mapping to physical nodes; (2) developing communications routines that support the abstractions implemented in item one; (3) continuing the development of file and information systems based on the virtual system model; and (4) incorporating appropriate security measures to allow the mechanisms developed in items 1 through 3 to be used on an open network. The goal throughout our work is to provide a uniform model that can be applied to both parallel and distributed systems. We believe that multiprocessor systems should exist in the context of distributed systems, allowing them to be more easily shared by those that need them. Our work provides the mechanisms through which nodes on multiprocessors are allocated to jobs running within the distributed system and the mechanisms through which files needed by those jobs can be located and accessed.

Schorr, Herbert↗
NASA NTRS1994

DIstributed VIRtual System (DIVIRS) project

As outlined in our continuation proposal 92-ISI-. OR (revised) on NASA cooperative agreement NCC2-539, we are (1) developing software, including a system manager and a job manager, that will manage available resources and that will enable programmers to develop and execute parallel applications in terms of a virtual configuration of processors, hiding the mapping to physical nodes; (2) developing communications routines that support the abstractions implemented in item one; (3) continuing the development of file and information systems based on the Virtual System Model; and (4) incorporating appropriate security measures to allow the mechanisms developed in items 1 through 3 to be used on an open network. The goal throughout our work is to provide a uniform model that can be applied to both parallel and distributed systems. We believe that multiprocessor systems should exist in the context of distributed systems, allowing them to be more easily shared by those that need them. Our work provides the mechanisms through which nodes on multiprocessors are allocated to jobs running within the distributed system and the mechanisms through which files needed by those jobs can be located and accessed.

Schorr, Herbert↗