SEARCH · Search NASA
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
The primary deliverable for this project will be to construct a power electronics package utilizing an organic, electrically insulating substrate material and demonstrate superior thermal performance and greater reliability under thermal cycling, thermal aging, vibration, power cycling, and electrical high-potential evaluation over traditional packages.
For high reliability applications, visual inspection has been the key technique for most conventional electronic package assemblies. Now, the use of x-ray technique has become an additional inspection requirement for quality control and detection of unique defects due to manufacturing of advanced electronic array packages such as ball grid array (BGAs) and chip scale packages (CSPs).
Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.
This Perspective builds upon insights from the National Institute of Standards and Technology (NIST)-organized workshop, “Materials and Metrology Needs for Advanced Semiconductor Packaging Strategies,” held at the 35th annual Electronics Packaging Symposium in Binghamton, NY, on September 5, 2024. It outlines critical challenges and opportunities related to polymer-based “soft” materials in advanced semiconductor packaging, with emphasis on polymer science, measurement science (metrology), and the strategic development of Research-Grade Test Materials (RGTMs). These efforts, led by the NIST CHIPS team, aim to advance the fundamental understanding of structure-property-processing relationships, promote standardized guidelines and innovative methods for material characterization, and accelerate the development, qualification, and adoption of next-generation packaging materials. The Perspective also distills key insights from the panel discussion with industry experts, emphasizing the need for close collaboration among materials scientists, process engineers, and metrology experts to enable a holistic strategy, further highlighting the importance of cross-sector partnerships among industry, academia, and government to address pressing challenges in packaging materials and processes.
Package Qualification and Verification (PQV) of advanced electronic packaging and interconnect technologies and various other types of qualification hardware for the Mars Exploration Rover/Mars Science Laboratory flight projects has been performed to enhance the mission assurance. The qualification of hardware (Engineering Camera and Platinum Resistance Thermometer, PRT) under extreme cold temperatures has been performed with reference to various project requirements. The flight-like packages, sensors, and subassemblies have been selected for the study to survive three times (3x) the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations and mission phases. Qualification has been performed by subjecting above flight-like qual hardware to the environmental temperature extremes and assessing any structural failures or degradation in electrical performance due to either overstress or thermal cycle fatigue. Experiments of flight like hardware qualification test results have been described in this paper.
Heat conduction through bonded metal–polymer interfaces often limits the overall heat transfer in electronic packaging, batteries, and heat recovery systems. To design the thermal circuit in such systems, it is essential to measure the thermal interfacial resistance (TIR) across ~1 µm to 100 µm junctions. Previously reported TIR of metal–polymer junctions utilize ASTM E1530-based two-block systems that measure the TIR by applying pressure across the interface through external heating and cooling blocks. Here, we report a novel modification of the ASTM-E1530 technique that employs integrated heaters and sensors to provide an intrinsic TIR measurement of an adhesively bonded metal–polymer junction. We design the measurement technique using finite element simulations to either passively suppress or actively compensate the lateral heat diffusion through the polymer, which can minimize the systematic error to ≲5%. Through proof-of-concept experiments, we report the TIR of metal–polymer interfaces made from DuPont’s Pyralux double-side copper-clad laminates, commonly used in flexible printed circuit boards. Our TIR measurement errors are <10%. We highlight additional sources of errors due to non-idealities in the experiment and discuss possible ways to overcome them. Our measurement technique is also applicable to interfaces that are electrically insulating such as adhesively joined metal–metal junctions and sputter-coated or welded metal–polymer junctions. Altogether, the technique is capable of measuring TIR ≳10 –5 m 2 KW –1 in bonded metal–polymer foils and can be tailored for in situ measurements in flexible electronics, circuit packaging, and other hybrid metal–polymer systems.
The 2017 Electrical and Electronics Technical Team Roadmap [1] proposes aggressive research and development targets aimed at improving power electronics technology to enable the mass-market penetration of electric-drive vehicles. Achieving these aggressive targets will require a decrease in cost (year 2025 cost target: $2.70/kW) and an increase in power density (year 2025 power density target: 100 kW/L) as compared with current on-road technology. Replacing traditional silicon device-based components with more efficient and higher-temperature wide-bandgap (WBG) semiconductor device-based components will enable increased power density. However, meeting the power density target will also require innovative thermal management solutions to increase the heat fluxes dissipated and allow for compact electronics packaging. This project conducts research to develop new power electronics thermal management technologies to increase power density, enable high WBG temperature operation, and decrease cost. The performance (e.g., thermal resistance, pumping power) of the power electronics cooling technologies developed in this project are compared to the performance of current, on-road technology. One of the main challenges to achieving high power densities is associated with packaging high-temperature (up to 250 degrees C) WBG devices near lower-temperature-rated components (e.g., electrical boards and capacitors).
To facilitate the new faster, better and cheaper spacecraft designs, smaller more mass efficient avionics and instruments are using higher density electronic packaging technologies such as direct chip attach (DCA). For space flight applications, these technologies need to have demonstrated reliability and reasonably well defined fabrication and assembly processes before they will be accepted as baseline designs in new missions. As electronics shrink in size, not only can repair be more difficult, but 49 probing" circuitry can be very risky and it becomes increasingly more difficult to identify the specific source of a problem. To test and monitor these new technologies, the Direct Chip Attach Task, under NASA's Electronic Parts and Packaging Program (NEPP), chose the test methodology of boundary scan testing. The boundary scan methodology was developed for interconnect integrity and functional testing at hard to access electrical nodes. With boundary scan testing, active devices are used and failures can be identified to the specific device and lead. This technology permits the incorporation of "built in test" into almost any circuit and thus gives detailed test access to the highly integrated electronic assemblies. This presentation will describe boundary scan, discuss the development of the boundary scan test vehicle for DCA and current plans for testing of direct chip attach configurations.
NEPP program objectives are to: (1) Access the reliability of newly available electronic parts and packaging technologies for usage on NASA projects through validations, assessments, and characterizations, and the development of test methods/tools; (2)Expedite infusion paths for advanced (emerging) electronic parts and packaging technologies by evaluations of readiness for manufacturability and project usage consideration; (3) Provide NASA projects with technology selection, application, and validation guidelines for electronic parts and packaging hardware and processes; nd (4) Retain and disseminate electronic parts and packaging quality assurance, reliability validations, tools, and availability information to the NASA community.
Venus having an average surface temperature of 460 degrees Celsius (about 860 degrees Fahrenheit) and an atmosphere 150 times denser than the Earth's atmosphere, designing a robot to merely survive on the surface to do planetary exploration is an extremely difficult task. This temperature is hundreds of degrees higher than the maximum operating temperature of currently existing microcontrollers, electronic devices, and circuit boards. To meet the challenge of Venus exploration, researchers at the NASA Glenn Research Center studied methods to keep a pressurized electronics package cooled, so that the operating temperature within the electronics enclosure would be cool enough for electronics to run, to allow a mission to operate on the surface of Venus for extended periods.
The NASA Electronic Parts and Packaging (NEPP) program, and its subset the NASA Electronic Parts Assurance Group (NEPAG), are NASA's point-of-contacts for reliability and radiation tolerance of electrical, electronic, and electromechanical (EEE) parts and their packages. This presentation includes a Fiscal Year 2015 program overview.
Embedment of resistive heating elements in a cordwood module used for packaging electronic components, facilitates separation of the adhesive bond between the module, and metal heat sink and the potting material without damaging the components. Electrical power applied to the elements causes breakdown of bonding material.
Packaging Qualification and Verification (PQV) and life testing of advanced electronic packaging, mechanical assemblies (motors/actuators), and interconnect technologies (flip-chip), platinum temperature thermometer attachment processes, and various other types of hardware for Mars Exploration Rover (MER)/Mars Science Laboratory (MSL), and JUNO flight projects was performed to enhance the mission assurance. The qualification of hardware under extreme cold to hot temperatures was performed with reference to various project requirements. The flight like packages, assemblies, test coupons, and subassemblies were selected for the study to survive three times the total number of expected temperature cycles resulting from all environmental and operational exposures occurring over the life of the flight hardware including all relevant manufacturing, ground operations, and mission phases. Qualification/life testing was performed by subjecting flight-like qualification hardware to the environmental temperature extremes and assessing any structural failures, mechanical failures or degradation in electrical performance due to either overstress or thermal cycle fatigue. Experimental flight qualification test results will be described in this presentation.
The NASA Electronic Parts and Packaging (NEPP) Program's mission is to provide guidance to NASA for the selection and application of microelectronic technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission assurance needs. This viewgraph presentation reviews the NEPP program's goals and objectives, and reviews many of the missions that the NEPP program has impacted, both in and out of NASA. Also included are examples of the evaluation that the program performed.
This presentation includes NASA Electronic Parts and Packaging (NEPP) Program FY14 task overview plans and recent highlights.
This viewgraph presentation reviews NASA's Electronic Parts and Packaging (NEPP) Program. The NEPP mission is to provide guidance to NASA for the selection and and application of microelectronics technologies, to improve understanding of the risks related to the use of these technologies in the space environment and to ensure that appropriate research is performed to meet NASA mission needs. The NEPP Program focuses on the reliability aspects of electronic devices. Three principal aspects to this reliability: (1) lifetime, (2) effects of space radiation and the space environment, and (3) creation and maintenance of the assurance support infrastructure required for success.
Electronic neural networks and computers put to use in analyzing data acquired in particle-impact-noise-detection (PIND) tests of packaged electronic components. PIND tests detect loose particles in packages that cause failures during subsequent operation of packages in presence of accelerations or other effects - for example, loose electrically conductive particles that bounce into positions in which they cause short circuits. Interpretation of test data more objective and accurate. Preliminary results suggest use of neural networks result in significant improvement in quality and reliability and decrease in cost of PIND testing.
A rotor mounted flight instrumentation system developed for helicopter rotor blade research is described. The system utilizes high speed digital techniques to acquire research data from miniature pressure transducers on advanced rotor airfoils which are flight tested on an AH-1G helicopter. The system employs microelectronic pulse code modulation (PCM) multiplexer digitizer stations located remotely on the blade and in a hub mounted metal canister. As many as 25 sensors can be remotely digitized by a 2.5 mm thick electronics package mounted on the blade near the tip to reduce blade wiring. The electronics contained in the canister digitizes up to 16 sensors, formats these data with serial PCM data from the remote stations, and transmits the data from the canister which is above the plane of the rotor. Data are transmitted over an RF link to the ground for real time monitoring and to the helicopter fuselage for tape recording. The complete system is powered by batteries located in the canister and requires no slip rings on the rotor shaft.