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At least 163 records · Page 9

Electron lithography STAR design guidelines. Part 1: The STAR user design manual

The STAR system developed by NASA enables any user with a logic diagram to design a semicustom digital MOS integrated circuit. The system is comprised of a library of standard logic cells and computer programs to place, route, and display designs implemented with cells from the library. Library cells of the CMOS metal gate and CMOS silicon gate technologies were simulated using SPICE, and the results are shown and compared.

Trotter, J. D.↗

Electron lithography STAR design guidelines. Part 2: The design of a STAR for space applications

The STAR design system developed by NASA enables any user with a logic diagram to design a semicustom digital MOS integrated circuit. The system is comprised of a library of standard logic cells and computr programs to place, route, and display designs implemented with cells from the library. Also described is the development of a radiation-hard array designed for the STAR system. The design is based on the CMOS silicon gate technology developed by SANDIA National Laboratories. The design rules used are given as well as the model parameters developed for the basic array element. Library cells of the CMOS metal gate and CMOS silicon gate technologies were simulated using SPICE, and the results are shown and compared.

Trotter, J. D.↗

The cognitive bases for the design of a new class of fuzzy logic controllers: The clearness transformation fuzzy logic controller

This paper analyses the internal operation of fuzzy logic controllers as referenced to the human cognitive tasks of control and decision making. Two goals are targeted. The first goal focuses on the cognitive interpretation of the mechanisms employed in the current design of fuzzy logic controllers. This analysis helps to create a ground to explore the potential of enhancing the functional intelligence of fuzzy controllers. The second goal is to outline the features of a new class of fuzzy controllers, the Clearness Transformation Fuzzy Logic Controller (CT-FLC), whereby some new concepts are advanced to qualify fuzzy controllers as 'cognitive devices' rather than 'expert system devices'. The operation of the CT-FLC, as a fuzzy pattern processing controller, is explored, simulated, and evaluated.

Sultan, Labib↗

G4-FETs as Universal and Programmable Logic Gates

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Johnson, Travis↗

Effect of control logic modifications on airstart performance of F100 engine model derivative engines in an F-15 airplane

A series of airstarts were conducted in an F-15 airplane with two prototype Pratt and Whitney F100 Engine Model Derivative engines equipped with Digital Electronic Engine Control (DEEC) systems. The airstart envelope and the time required for airstarts were defined. Comparisons were made between the original airstart logic, and modified logic which was designed to improve the airstart capability. Spooldown airstarts with the modified logic were more successful at lower altitudes than were those with the original logic. Spooldown airstart times ranged from 33 seconds at 250 knots to 83 seconds at 175 knots. The modified logic improved the airstart time from 31% to 53%, with the most improved times at slower airspeeds. Jet fuel starter (JFS)-assisted airstarts were conducted at 7000 m and airstart times were significantly faster than unassisted airstarts. The effect of altitude on airstart times was small.

Crawford, D. B.↗

CADAT network translator

Program converts cell-net data into logic-gate models for use in test and simulation programs. Input consists of either Place, Route, and Fold (PRF) or Place-and-Route-in-Two-Dimensions (PR2D) layout data deck. Output consists of either Test Pattern Generator (TPG) or Logic-Simulation (LOGSIM) logic circuitry data deck. Designer needs to build only logic-gate-model circuit description since program acts as translator. Language is FORTRAN IV.

Pitts, E. R.↗

Methodology for object-oriented real-time systems analysis and design: Software engineering

Successful application of software engineering methodologies requires an integrated analysis and design life-cycle in which the various phases flow smoothly 'seamlessly' from analysis through design to implementation. Furthermore, different analysis methodologies often lead to different structuring of the system so that the transition from analysis to design may be awkward depending on the design methodology to be used. This is especially important when object-oriented programming is to be used for implementation when the original specification and perhaps high-level design is non-object oriented. Two approaches to real-time systems analysis which can lead to an object-oriented design are contrasted: (1) modeling the system using structured analysis with real-time extensions which emphasizes data and control flows followed by the abstraction of objects where the operations or methods of the objects correspond to processes in the data flow diagrams and then design in terms of these objects; and (2) modeling the system from the beginning as a set of naturally occurring concurrent entities (objects) each having its own time-behavior defined by a set of states and state-transition rules and seamlessly transforming the analysis models into high-level design models. A new concept of a 'real-time systems-analysis object' is introduced and becomes the basic building block of a series of seamlessly-connected models which progress from the object-oriented real-time systems analysis and design system analysis logical models through the physical architectural models and the high-level design stages. The methodology is appropriate to the overall specification including hardware and software modules. In software modules, the systems analysis objects are transformed into software objects.

Schoeffler, James D.↗

Lessons Learned and Technical Standards: A Logical Marriage for Future Space Systems Design

A comprehensive database of engineering lessons learned that corresponds with relevant technical standards will be a valuable asset to those engaged in studies on future space vehicle developments, especially for structures, materials, propulsion, control, operations and associated elements. In addition, this will enable the capturing of technology developments applicable to the design, development, and operation of future space vehicles as planned in the Space Launch Initiative. Using the time-honored tradition of passing on lessons learned while utilizing the newest information technology, NASA has launched an intensive effort to link lessons learned acquired through various Internet databases with applicable technical standards. This paper will discuss the importance of lessons learned, the difficulty in finding relevant lessons learned while engaged in a space vehicle development, and the new NASA effort to relate them to technical standards that can help alleviate this difficulty.

Gill, Paul S.↗

C-MOS bulk metal design handbook

The LSI standard cell array technique was used in the fabrication of more than 20 CMOS custom arrays. This technique consists of a series of computer programs and design automation techniques referred to as the Computer Aided Design And Test (CADAT) system that automatically translate a partitioned logic diagram into a set of instructions for driving an automatic plotter which generates precision mask artwork for complex LSI arrays of CMOS standard cells. The standard cell concept for producing LSI arrays begins with the design, layout, and validation of a group of custom circuits called standard cells. Once validated, these cells are given identification or pattern numbers and are permanently stored. To use one of these cells in a logic design, the user calls for the desired cell by pattern number. The Place, Route in Two Dimension (PR2D) computer program is then used to automatically generate the metalization and/or tunnels to interconnect the standard cells into the required function. Data sheets that describe the function, artwork, and performance of each of the standard cells, the general procedure for implementation of logic in CMOS standard cells, and additional detailed design information are presented.

Edge, T. M.↗

Optimal Membrane Cascade Design for Critical Mineral Recovery Through Logic-based Superstructure Optimization

Critical minerals and rare earth elements play an important role in our climate change initiatives, particularly in applications related with energy storage. Here, we use discrete optimization approaches to design a process for the recovery of Lithium and Cobalt from battery recycling, through membrane separation. Our contribution involves proposing a Generalized Disjunctive Programming (GDP) model for the optimal design of a multistage diafiltration cascade for Li-Co separation. By solving the resulting nonconvex mixed-integer nonlinear program model to global optimality, we investigated scalability and solution quality variations with changes in the number of stages and elements per stage. Results demonstrate the computational tractability of the nonlinear GDP formulation for design of membrane separation processes while opening the door for decom-position strategies for multicomponent separation cascades. Future work aims to extend the GDP formulation to account for stage installation and explore various decomposition techniques to enhance solution efficiency.

Ovalle, Daniel↗

System Measures Logic-Gate Delays

Many gates on chip tested automatically. Automatic testing system measures signal-propagation delays of experimental integrated-circuit array of logic gates. Includes controlling computer, counter/time, and feedback-controlled timing-waveform generator. Multiplexer included on integrated-circuit chip with logic-gate array to be tested. Delays measured by system serve as valuable data for design of fast logic and memory chips.

Blaes, Brent R.↗

2001 MAPLD International Conference Proceedings

This CD contains the proceedings from the '2001 MAPLD International Conference', held on 11-13 September 2001 at Johns Hopkins University. Sessions included the following: (1) Applications: Military and Aerospace; (2) Design 1: Processors, Logic, and Programmable Devices; (3) Reliability: Devices and The Effects of the Radiation Environment; (4) Design 2: Systems; and (5) Design 3: Fault Tolerance.

Source record↗

Cell Libraries

A NASA contract led to the development of faster and more energy efficient semiconductor materials for digital integrated circuits. Gallium arsenide (GaAs) conducts electrons 4-6 times faster than silicon and uses less power at frequencies above 100-150 megahertz. However, the material is expensive, brittle, fragile and has lacked computer automated engineering tools to solve this problem. Systems & Processes Engineering Corporation (SPEC) developed a series of GaAs cell libraries for cell layout, design rule checking, logic synthesis, placement and routing, simulation and chip assembly. The system is marketed by Compare Design Automation.

Source record↗