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At least 163 records · Page 9

Stacked-Gate FET's For Analog Memory Elements

Three-terminal, double-stacked-gate field-effect transistor (FET), developed as analog memory element. Particularly suited for use as synapse with variable connection strength in electronic neural network. Provides programmable, nonvolatile resistive connection, somewhat in manner of porous-gate FET described in "Porous-Floating-Gate Field-Effect Transistor" (NPO-17532). Resembles commercial erasable programmable read-only memory (EPROM) device, except for thickness of layers of silicon dioxide electrically isolating gates. Either p-channel or n-channel device.

Thakoor, Anilkumar P.↗

Explicit IMF B(sub y)-Effect Maximizes at Subauroral Latitudes (Dedicated to the Memory of Eigil Friis-Christensen)

The most important parameter in the coupling between solar wind and geomagnetic activity is the B(sub z)‐component of the interplanetary magnetic field (IMF). However, recent studies have shown that IMF B(sub y) is an additional, independent driver of geomagnetic activity. We use here local geomagnetic indices from a large network of magnetic stations to study how IMF B(sub y) affects geomagnetic activity at different latitudes for all solar wind and, separately, during coronal mass ejections. We show that geomagnetic activity, for all solar wind, is 20% stronger for B(sub y) > 0 than for B(sub y) < 0 at subauroral latitudes of about 60° corrected geomagnetic latitude. During coronal mass ejections, the B(sub y)‐effect is larger, about 40%, at slightly lower latitudes of about 57° (corrected geomagnetic) latitude. These results highlight the importance of the IMF B(sub y)‐component for space weather at different latitudes and must be taken into account in space weather modeling

Holappa, L.↗

Automatic Generation of Directive-Based Parallel Programs for Shared Memory Parallel Systems

The shared-memory programming model is a very effective way to achieve parallelism on shared memory parallel computers. As great progress was made in hardware and software technologies, performance of parallel programs with compiler directives has demonstrated large improvement. The introduction of OpenMP directives, the industrial standard for shared-memory programming, has minimized the issue of portability. Due to its ease of programming and its good performance, the technique has become very popular. In this study, we have extended CAPTools, a computer-aided parallelization toolkit, to automatically generate directive-based, OpenMP, parallel programs. We outline techniques used in the implementation of the tool and present test results on the NAS parallel benchmarks and ARC3D, a CFD application. This work demonstrates the great potential of using computer-aided tools to quickly port parallel programs and also achieve good performance.

Jin, Hao-Qiang↗

Automatic Generation of OpenMP Directives and Its Application to Computational Fluid Dynamics Codes

The shared-memory programming model is a very effective way to achieve parallelism on shared memory parallel computers. As great progress was made in hardware and software technologies, performance of parallel programs with compiler directives has demonstrated large improvement. The introduction of OpenMP directives, the industrial standard for shared-memory programming, has minimized the issue of portability. In this study, we have extended CAPTools, a computer-aided parallelization toolkit, to automatically generate OpenMP-based parallel programs with nominal user assistance. We outline techniques used in the implementation of the tool and discuss the application of this tool on the NAS Parallel Benchmarks and several computational fluid dynamics codes. This work demonstrates the great potential of using the tool to quickly port parallel programs and also achieve good performance that exceeds some of the commercial tools.

Yan, Jerry↗

The Automatic Parallelisation of Scientific Application Codes Using a Computer Aided Parallelisation Toolkit

The shared-memory programming model is a very effective way to achieve parallelism on shared memory parallel computers. Historically, the lack of a programming standard for using directives and the rather limited performance due to scalability have affected the take-up of this programming model approach. Significant progress has been made in hardware and software technologies, as a result the performance of parallel programs with compiler directives has also made improvements. The introduction of an industrial standard for shared-memory programming with directives, OpenMP, has also addressed the issue of portability. In this study, we have extended the computer aided parallelization toolkit (developed at the University of Greenwich), to automatically generate OpenMP based parallel programs with nominal user assistance. We outline the way in which loop types are categorized and how efficient OpenMP directives can be defined and placed using the in-depth interprocedural analysis that is carried out by the toolkit. We also discuss the application of the toolkit on the NAS Parallel Benchmarks and a number of real-world application codes. This work not only demonstrates the great potential of using the toolkit to quickly parallelize serial programs but also the good performance achievable on up to 300 processors for hybrid message passing and directive-based parallelizations.

Ierotheou, C.↗

Effects of ongoing task context and target typicality on prospective memory performance: the importance of associative cueing

Two experiments examined whether prospective memory performance is influenced by contextual cues. In our automatic activation model, any information available at encoding and retrieval should aid recall of the prospective task. The first experiment demonstrated an effect of the ongoing task context; performance was better when information about the ongoing task present at retrieval was available at encoding. Performance was also improved by a strong association between the prospective memory target as it was presented at retrieval and the intention as it was encoded. Experiment 2 demonstrated boundary conditions of the ongoing task context effect, which implicate the association between the ongoing and prospective tasks formed at encoding as the source of the context effect. The results of this study are consistent with predictions based on automatic activation of intentions.

Cues↗

Memory Optimizations for Sparse Linear Algebra on GPU Hardware

An effort to maximize memory bandwidth utilization for a sparse linear algebra kernel executing on NVIDIA® Tesla V100 and A100 Graphics Processing Units (GPUs) is described. The kernel consists of a block-sparse matrix-vector product and a series of forward/backward triangular solves. The computation is memory-bound and exhibits low arithmetic intensity. Along with a relatively small block size, the data layout poses a challenge to effectively utilize the available memory bandwidth on common GPU architectures. An earlier implementation using a warp to process a single row of the matrix was found to yield good memory performance on the V100 architecture. However, anew approach, which assigns a warp to six rows of the matrix, is proposed for the A100. In addition, two new features offered by the A100 architecture are explored.L2residency control enables a portion of theL2cache to be used for persistent data access, and the asynchronous copy instruction allows data to be loaded directly from main memory into shared memory. Demonstrations show that the new implementation improves memory bandwidth utilization from 71.5% to 81.2% of the peak available on theA100 architecture.

GPU↗

Influence of Thin-Film Adhesives in Pullout Tests Between Nickel-Titanium Shape Memory Alloy and Carbon Fiber-Reinforced Polymer Matrix Composites

Strips of nickel-titanium (NiTi) shape memory alloy (SMA) and carbon fiber-reinforced polymer matrix composite (PMC) were bonded together using multiple thin film adhesives and their mechanical strengths were evaluated under pullout test configuration. Tensile and lap shear tests were conducted to confirm the deformation of SMAs at room temperature and to evaluate the adhesive strength between the NiTi strips and the PMC. Optical and scanning electron microscopy techniques were used to examine the interfacial bonding after failure. Simple equations on composite tensile elongation were used to fit the experimental data on tensile properties. ABAQUS models were generated to show the effects of enhanced bond strength and the distribution of stress in SMA and PMC. The results revealed that the addition of thin film adhesives increased the average adhesive strength between SMA and PMC while halting the room temperature shape memory effect within the pullout specimen.

Polymer Matrix Composites↗

Soil Moisture Memory in Climate Models

Water balance considerations at the soil surface lead to an equation that relates the autocorrelation of soil moisture in climate models to (1) seasonality in the statistics of the atmospheric forcing, (2) the variation of evaporation with soil moisture, (3) the variation of runoff with soil moisture, and (4) persistence in the atmospheric forcing, as perhaps induced by land atmosphere feedback. Geographical variations in the relative strengths of these factors, which can be established through analysis of model diagnostics and which can be validated to a certain extent against observations, lead to geographical variations in simulated soil moisture memory and thus, in effect, to geographical variations in seasonal precipitation predictability associated with soil moisture. The use of the equation to characterize controls on soil moisture memory is demonstrated with data from the modeling system of the NASA Seasonal-to-Interannual Prediction Project.

Koster, Randal D.↗

Machine parts recognition using a trinary associative memory

The convergence mechanism of vectors in Hopfield's neural network in relation to recognition of partially known patterns is studied in terms of both inner products and Hamming distance. It has been shown that Hamming distance should not always be used in determining the convergence of vectors. Instead, inner product weighting coefficients play a more dominant role in certain data representations for determining the convergence mechanism. A trinary neuron representation for associative memory is found to be more effective for associative recall. Applications of the trinary associative memory to reconstruct machine part images that are partially missing are demonstrated by means of computer simulation as examples of the usefulness of this approach.

Awwal, Abdul Ahad S.↗

Application-Controlled Demand Paging for Out-of-Core Visualization

In the area of scientific visualization, input data sets are often very large. In visualization of Computational Fluid Dynamics (CFD) in particular, input data sets today can surpass 100 Gbytes, and are expected to scale with the ability of supercomputers to generate them. Some visualization tools already partition large data sets into segments, and load appropriate segments as they are needed. However, this does not remove the problem for two reasons: 1) there are data sets for which even the individual segments are too large for the largest graphics workstations, 2) many practitioners do not have access to workstations with the memory capacity required to load even a segment, especially since the state-of-the-art visualization tools tend to be developed by researchers with much more powerful machines. When the size of the data that must be accessed is larger than the size of memory, some form of virtual memory is simply required. This may be by segmentation, paging, or by paged segments. In this paper we demonstrate that complete reliance on operating system virtual memory for out-of-core visualization leads to poor performance. We then describe a paged segment system that we have implemented, and explore the principles of memory management that can be employed by the application for out-of-core visualization. We show that application control over some of these can significantly improve performance. We show that sparse traversal can be exploited by loading only those data actually required. We show also that application control over data loading can be exploited by 1) loading data from alternative storage format (in particular 3-dimensional data stored in sub-cubes), 2) controlling the page size. Both of these techniques effectively reduce the total memory required by visualization at run-time. We also describe experiments we have done on remote out-of-core visualization (when pages are read by demand from remote disk) whose results are promising.

Cox, Michael↗

Prediction of error rates in dose-imprinted memories on board CRRES by two different methods

An analysis of the expected space radiation effects on the single event upset (SEU) properties of CMOS/bulk memories onboard the Combined Release and Radiation Effects Satellite (CRRES) is presented. Dose-imprint data from ground test irradiations of identical devices are applied to the predictions of cosmic-ray-induced space upset rates in the memories onboard the spacecraft. The calculations take into account the effect of total dose on the SEU sensitivity of the devices as the dose accumulates in orbit. Estimates of error rates, which involved an arbitrary selection of a single pair of threshold linear energy transfer (LET) and asymptotic cross-section values, were compared to the results of an integration over the cross-section curves versus LET. The integration gave lower upset rates than the use of the selected values of the SEU parameters. Since the integration approach is more accurate and eliminates the need for an arbitrary definition of threshold LET and asymptotic cross section, it is recommended for all error rate predictions where experimental sigma-versus-LET curves are available.

Brucker, G. J.↗

Error bounds for multi-h phase codes

Upper and lower bounds for the probability of a decoding error event and for symbol error probability are developed for the class of time-varying phase codes known as multi-h codes. The effect of finite decoder memory is also treated. The analysis is illustrated with numerical examples, and simulation results are compared.

Wilson, S. G.↗

An iterative approach to region growing using associative memories

Region growing, often given as a classical example of the recursive control structures used in image processing which are often awkward to implement in hardware where the intent is the segmentation of an image at raster scan rates, is addressed in light of the postulate that any computation which can be performed recursively can be performed easily and efficiently by iteration coupled with association. Attention is given to an algorithm and hardware structure able to perform region labeling iteratively at scan rates. Every pixel is individually labeled with an identifier which signifies the region to which it belongs. Difficulties otherwise requiring recursion are handled by maintaining an equivalence table in hardware transparent to the computer, which reads the labeled pixels. A simulation of the associative memory has demonstrated its effectiveness.

Snyder, W. E.↗

Acoustic charge transport technology investigation for advanced development transponder

Acoustic charge transport (ACT) technology has provided a basis for a new family of analog signal processors, including a programmable transversal filter (PTF). Through monolithic integration of ACT delay lines with GaAs metal semiconductor field effect transistor (MESFET) digital memory and controllers, these devices significantly extend the performance of PTF's. This article introduces the basic operation of these devices and summarizes their present and future specifications. The production and testing of these devices indicate that this new technology is a promising one for future space applications.

Kayalar, S.↗

Experimental evaluation of multiprocessor cache-based error recovery

Several variations of cache-based checkpointing for rollback error recovery in shared-memory multiprocessors have been recently developed. By modifying the cache replacement policy, these techniques use the inherent redundancy in the memory hierarchy to periodically checkpoint the computation state. Three schemes, different in the manner in which they avoid rollback propagation, are evaluated. By simulation with address traces from parallel applications running on an Encore Multimax shared-memory multiprocessor, the performance effect of integrating the recovery schemes in the cache coherence protocol are evaluated. The results indicate that the cache-based schemes can provide checkpointing capability with low performance overhead but uncontrollable high variability in the checkpoint interval.

Janssens, Bob↗

High Density Memory Based on Quantum Device Technology

We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.

vanderWagt, Paul↗