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The experimental study of a Phase-Locked Loop (PLL) with a digital loop filter is presented in this paper.
A simple second-order digital phase-locked loop has been designed for the Viking Orbiter 1975 command system. Excluding analog-to-digital conversion, implementation of the loop requires only an adder/subtractor, two registers, and a correctable counter with control logic. The loop considers only the polarity of phase error and corrects system clocks according to a filtered sequence of this polarity. The loop is insensitive to input gain variation, and therefore offers the advantage of stable performance over long life. Predictable performance is guaranteed by extreme reliability of acquisition, yet in the steady state the loop produces only a slight degradation with respect to analog loop performance.
An s/z hybrid model for a general phase locked loop is proposed. The impact of the loop filter on the stability, gain margin, noise equivalent bandwidth, steady state error and time response is investigated. A specific digital filter is selected which maximizes the overall gain margin of the loop. This filter can have any desired number of integrators. Three integrators are sufficient in order to track a phase jerk with zero steady state error at loop update instants. This filter has one zero near z = 1.0 for each integrator. The total number of poles of the filter is equal to the number of integrators plus two.
Automatic phase-control circuit, used on space vehicles, for tracking narrowband signals coherently in high-noise environment
Rapid synchronization of phase-locked oscillators is best achieved by the swept-frequency acquisition technique, wherein the voltage-controlled oscillator /VCO/ is linearly swept through the uncertainty band. The theoretically predicted sweep rates of this technique and the observed experimental results differ by less than seven percent.
Minimum noise and maximum information bandwidths for phase locked loops in demodulated FM multiplexed subcarriers
Breadboard model of L band, phase lock receiver
Second/third order hybrid phase locked receiver for tracking frequency ramp signals
Phased-locked loop demodulator for television type PM signals on sinusoidal carrier
A sampled binary phase lock loop is proposed for periodically correcting OMEGA receiver internal clocks. The circuit is particularly simple to implement and provides a means of generating long range 3.4 KHz difference frequency lanes from simultaneous pair measurements.
In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, or root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (BLT yields 0) and in a discrete-update formulation with arbitrary BLT. Deficiencies of the continuous-update approximation in large-BLT applications are avoided in the new discrete-update formulation. A new method for direct, transient-free acquisition with third- and fourth-order loops can improve the versatility and reliability of acquisition with such loops.
In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, and root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (B(sub L)T approaches 0) and in a discrete-update formulation with arbitrary B(sub L)T. Deficiencies of the continuous-update approximation in large-B(sub L)T applications are avoided in the new discrete-update formulation.
A Carrier Aiding technique that employs cascaded phase-locked loops is described.
The Mu2e Experiment has stringent beam structure requirements; namely, it requires short (~200 ns) proton bunches separated by 1.5-2.0 $\mu$s. This beam structure will be produced using the Fermilab 8 GeV Booster, the 8 GeV Recycler Ring, and the Delivery Ring, which was formerly part of the antiproton accumulator system. Out of time beam is limited to a fraction of level of no more than $1\times 10^{-10}$, a requirement known as "extinction". Achieving this level of extinction requires a system of resonant magnets and collimators, phased such that only in time particles will pass through. The Mu2e magnet system involves two components: a 300 kHz component, timed such that the 600 kHz beam will pass through the collimators at the nodes, and a 4.5 MHz system to reduce the slewing of the in-time beam. These two systems must be precisely phase locked to the bunch rate coming from the Delivery Ring, which itself must be phased to match beam transfers coming from the Recycler. This poster describes the control system for the magnets, which is based on an Intel Arria FPGA, which handles phase locking of the magnets to the Delivery Ring, including the phase jumps required to match transfers from the Recycler.
An apparatus is provided to allow for quasi distributed sensing of strain within a test object. Strain insensitive fiber is used to deliver a light signal to a strain sensitive fiber in an optical phase locked loop sensor configuration. The use of strain insensitive delivery fiber allows for non-integrated measurements of strain without the use of expensive electronics such as those employed in ODTR techniques. The novelty of the present invention lies in the use of strain insensitive multimode fiber. The inventors had previously developed a similar sensor with strain insensitive fiber, however it was restricted to the use of single or few mode fibers. The use of an optical phase locked loop arrangement allows for the use of multimode strain insensitive fiber.
Dynamics of phase-locked loop in presence of additive stationary gaussian noise, using fokker- planck or continuous random-walk techniques
This report focuses on second-order digital phase-locked loops (DPLLs) with uniformly sampled input, an amplitude-insenstive phase extractor and a conventional loop filter.
The pulsed phase-locked-loop bolt monitor (P2L2) that uses ultrasonic waves to measure bolt preload with accuracies ranging from 1 to 3 percent (depending on the specific bolt) is described. To remeasure bolt load after installation, a thermal calibration factor compensates for bolt temperature changes, and a standard reference block allows correction for acoustic phase errors due to measurement equipment configuration such as utilization of a different transducer, couplant, or cable. Some examples of critical applications including Space Shuttle landing-gear wheels and NASA wind-tunnel fan blades are discussed.