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At least 163 records · Page 9

GPU-Accelerated Analytic Simulation of Sparse Ionization Signal Formation in Pixelated Projection Detector

This paper presents a GPU-accelerated simulation package, TRED, for next-generation neutrino detectors with pixelated charge readout, leveraging community-driven software ecosystems to ensure adaptability and extensibility. We introduce two generic contributions: (i) an effective-charge representation based on Gaussian quadrature rules, in which the linear- interpolation factors for the field response inside each voxel are absorbed into the effective charge, and (ii) a sparse, block- binned tensor representation that enables efficient FFT-based computation of induced signals on readout electrodes for sparsely activated detector volumes. The former captures structure inside a voxel without dense sampling, while the latter achieves low memory usage and scalable runtime, as demonstrated in bench- mark studies. The underlying data representation is applicable to large-scale detectors and to other computational problems involving sparse activity.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Cryogenic thermal modeling of microwave high density signaling

Superconducting quantum computers require microwave control lines running from room temperature to the mixing chamber of a dilution refrigerator. Adding more lines without preliminary thermal modeling to make predictions risks overwhelming the cooling power at each thermal stage. In this paper, we investigate the thermal load of SC-086/50-SCN-CN semi-rigid coaxial cable, which is commonly used for the control and readout lines of a superconducting quantum computer, as we increase the number of lines to a quantum processor. We investigate the makeup of the coaxial cables, verify the materials and dimensions, and experimentally measure the total thermal conductivity of a single cable as a function of the temperature from cryogenic to room temperature values. We also measure the cryogenic DC electrical resistance of the inner conductor as a function of temperature, allowing for the calculation of active thermal loads due to Ohmic heating. Fitting this data produces a numerical thermal conductivity function used to calculate the static heat loads due to thermal transfer within the wires resulting from a temperature gradient. The resistivity data is used to calculate active heat loads, and we use these fits in a cryogenic model of a superconducting quantum processor in a typical Bluefors XLD1000-SL dilution refrigerator, investigating how the thermal load increases with processor sizes ranging from 100 to 225 qubits. We conclude that the theoretical upper limit of the described architecture is approximately 200 qubits. However, including an engineering margin in the cooling power and the available space for microwave readout circuitry at the mixing chamber, the practical limit is approximately 140 qubits.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Test Beam Results of Planar Pixel Sensor for the CMS Phase 2 Inner Tracker Upgrade

Results of the test beam measurements that characterise the performance of CMS Readout Chip (CROC) sensors to be used in the High Luminosity era of the Large Hadron Collider (HL-LHC) are presented. The HL-LHC peak instantaneous luminosity of $7.5 \times 10^{34} \ \text{cm}^{-2} s^{-1}$ corresponds to an average of around 200 inelastic proton-proton collisions per beam-crossing every 25 ns. In order to efficiently reconstruct and track particles in this extreme and challenging conditions, the present CMS tracking detector will be completely replaced. The new tracking detector consists of an Inner Tracker closest to the beamline and an Outer Tracker surrounding it. These are populated with modules that comprise of readout chips and silicon sensors. The test beam measurements of these modules are vital to understand the performance of the related technologies. Using a primary 120 GeV proton beam from the Main Injector at Fermilab, data was collected at the Fermilab Test Beam Facility (FTBF) using the silicon tracker telescope that provides a precision position measurement of the track impact point with less than 5 $\mu$m uncertainty. The proton beam was incident on a 1x2 planar CROC module developed by Hamamatsu. The sensor has 100x25 $\mu m^2$ standard pixels and also a smaller number of 225x25 $\mu m^2$ longer pixels at the boundary between the two ROCs. We present characterization of these modules that includes pixel efficiency, resolution, cluster size and charge distributions.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

HLS4ML Integration with QICK

The QICK (Quantum Instrumentation Control Kit) integration aims to enhance the readout of superconducting qubits by leveraging machine learning (ML) techniques. These techniques offer high accuracy, increased speed, and better state preservation for qubit readouts. The integration process employs neural network algorithms to optimize system performance and achieve high accuracy rates. The QICK board uses an FPGA, allowing for efficient real-time processing and high-performance execution of machine learning algorithms.

Ali, Mohamud↗

Smart Pixels: In-pixel AI for on-sensor data filtering

We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as proof-of-principle for a Phase III upgrade at the Large Hadron Collider (LHC) pixel detector. The first version of the ROIC consists of two matrices of 256 smart pixels, each 25$\times$25 µm\textsuperscript{2} in size. Each pixel consists of a charge-sensitive preamplifier with leakage current compensation and three auto-zero comparators for a 2-bit flash-type ADC. The frontend is capable of synchronously digitizing the sensor charge within 25 ns. Measurement results show an equivalent noise charge (ENC) of $\sim$30e\textsuperscript{-} and a total dispersion of $\sim$100e\textsuperscript{-} The second version of the ROIC uses a fully connected two-layer neural network (NN) to process information from a cluster of 256 pixels to determine if the pattern corresponds to highly desirable high-momentum particle tracks for selection and readout. The digital NN is embedded in-between analog signal processing regions of the 256 pixels without increasing the pixel size and is implemented as fully combinatorial digital logic to minimize power consumption and eliminate clock distribution, and is active only in the presence of an input signal. The total power consumption of the neural network is $\sim$ 300 $\mu$W. The NN performs momentum classification based on the generated cluster patterns and even with a modest momentum threshold, it is capable of 54.4\% – 75.4\% total data rejection, opening the possibility of using the pixel information at 40MHz for the trigger. The total power consumption of analog and digital functions per pixel is $\sim$ 6 $\mu$W per pixel, which corresponds to $\sim$ 1 W/cm\textsuperscript{2} staying within the experimental constraints.

Parpillon, Benjamin↗

The ETROC2 prototype for CMS MTD Endcap Timing Layer (ETL) upgrade

The ETROC2 prototype for CMS MTD Endcap Timing Layer (ETL) upgrade 520__ $$aThe Endcap Timing ReadOut Chip (ETROC) is designed to process LGAD signals with time resolution down to about 40-50ps per hit. The ETROC2 is the first full size (16x16) prototype design with the front-end based on and scaled up from the ETROC1 (4x4). The readout designs at pixel and global level and the system interfaces are all new and are compatible with the final chip specifications in terms of functionality. The ETROC2 is intended as a learning chip, as a stepstone to the ETROC3 which is intended as the pre-production design. The ETROC2 design and test results will be presented.

Gong, Datao↗

Region of Interest Filter in DUNE DAQ

The Deep Underground Neutrino Experiment (DUNE) is the next generation neutrino experiment currently under construction. It consists of a broadband neutrino beam at Fermilab, a high precision near detector, and the largest liquid argon time projection chamber far detector ever designed at the Sanford Underground Research Facility (SURF). The Region of Interest (ROI) filter is designed for DUNE’s online Data Acquisition (DAQ) system to address data rate constraints and enable low energy physics in the <10 MeV range. The filter employs zero suppression on the detector signal, and by tuning the readout window and threshold the data rates can be reduced by >90%. Performance of the ROI is analyzed in LArsoft on MARLEY generated low energy MC events propagated through the detector simulation. Notably, the optimized ROI filter enables a lower trigger threshold for readout at ~5-10 MeV, allowing DUNE to explore low-energy physics, specifically focusing on solar boron 8 neutrinos which are relevant in this energy range. This advancement enhances DUNE's scientific capabilities, opening avenues for detailed analyses of previously inaccessible low-energy neutrino interactions.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

PSEC5 Physical Verification

Ultra-Fast timing detectors, having a time resolution of 10pSec or less, are becoming increasingly important for many scientific disciplines, including High Energy Physics, Nuclear Physics, Medical Imaging and more. When developing ultra-fast detectors such as MCPs, LAPPDs, LGADs, SNSPDs, it is necessary to have access to a readout system that is low power, can support many channels and is cost effective. The PSEC5 chip was an application specific integrated circuit (ASIC) developed by the pioneering group of Prof. Henry Frisch at University of Chicago and micro electronic engineers at Fermi National Accelerator Laboratory. Three boards were designed, two to implement the readout system for an LAPPD and one to only characterize the PSEC1 chip. The main goal of the project shifted to setting up a testing environment to focus on the characterization of the chip. My student and I tested and characterized this ASIC using the third chip-on-board printed circuit board. Results show the successful fabrication and operation of some of the key building blocks and lead to the suggestions on modification for the second iteration of the chip.

Rico Aniles, H. D. [Unlisted]↗

Optimizing TinyTPC Test Stand for Low Energy Event Reconstruction

Introducing dopants into liquid argon offers a promising avenue to enhance the sensitivity and performance of LAr detectors such as DUNE. To explore this opportunity, we are optimizing and deploying the TinyTPC test stand, a compact time projection chamber with LArPix readout to study the effects of photosensitive dopants on the charge detected. TinyTPC enables comparative measurements of low-energy responses under various operational configurations and provides a platform to study the behavior of pixel readouts at low energy. We ensured system reliability through continuous current and voltage monitoring, modeling the detector's electrical behavior, and indirectly estimating total resistance under testing conditions. We ran the Blanche cryostat under various thresholds and gain configurations to evaluate their potential impact to low-energy event reconstruction and advancing R&D efforts for dopant integration in neutrino detectors

Van Loenen, Drew [Franciscan U. Steubenville]↗

Quantum Zeno Control of Superconducting Qubit Coherence

The Quantum Zeno Effect (QZE) dictates how the dynamics of a quantum system can be modified through continuous or discrete measurements [1]. It has gained increasing attention in quantum computing community in recent years, both due to its inevitable implications for qubit readout as well as for its promise for enabling new methods of quantum state control such as reservoir engineering and Zeno-dragging. Here, we investigate Zeno effects implemented via weak measurements for controlling superconducting-qubit coherence during gate and readout operations in a multi-qubit setup. Building on prior observations [2] that measurement backaction can both suppress and enhance qubit relaxation, we predict and measure QZE-altered qubit coherence times by manipulating the spectral overlap of qubit spectrum with background noise sources. We also discuss modifications and opportunities for controllable QZE due to anharmonic effects in multi-level superconducting atoms. [1] S. Greenfield, A. Kamal, J. Dressel, E. Levenson-Falk, arXiv:2506.12679 (2025) [2] Thorbeck, Z. Xiao, L. Govia, A. Kamal, Phys. Rev. Lett. 132, 090602 (2024)

Seidel, Olivia [Texas U., Arlington; Fermilab]↗

Complete time-resolved X-ray shape capability for a 10 MJ implosion: Milestone Report for MRT 8818

This report documents completion of MRT 8818, which established an upgraded equatorial time-resolved X-ray imaging capability for high-yield inertial confinement fusion experiments at the National Ignition Facility (NIF) using the equatorial Dilation X-ray Imager (DIXI). The need for this work arose from the sustained increase in fusion yield at NIF, which progressively intensified the neutron and gamma-ray environment experienced by target diagnostics. Although the existing polar imaging capability, particularly the Polar Dilation X-ray Imager (PDIXI), remained viable at high yields, the equatorial capability became inadequate because of radiation-induced failure of electronic readout hardware and increasing background levels that degraded image quality and ultimately caused saturation. The work performed under MRT 8818 addressed this limitation through a combination of hardware replacement, background characterization, and targeted mitigation. The DIXI backend was converted from CCD-based electronic readout to photographic film, and the principal sources of internally generated background were investigated using prior analyses, dedicated tests, and comparison with PDIXI performance on high-yield shots. This effort led to implementation of two principal improvements: a multilayer optical coating to suppress broadband radiation-induced background generated in the fiber-optic extension cylinder, and replacement of Kodak TMAX 400 film with Agfa Copex Rapid to reduce background generated directly in the film. These upgrades were completed in 2025 and performance assessment based on DT shot data since then, comparing with Polar DIXI and scaling of these experiments to 10 MJ indicates an expected signal-to-background ratio of approximately 34 for a single pinhole image, substantially exceeding the MRT 8818 completion criterion of SNR > 5.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

CMS Endcap Timing Layer: System Validation and Assembly

The High-Luminosity Large Hadron Collider (HL-LHC) will operate at unprecedented luminosities, resulting in up to 200 simultaneous interactions per bunch crossing. To mitigate the resulting pileup challenges, the CMS experiment is implementing the MIP Timing Detector (MTD), designed to provide precise timing information with a resolution of 30 – 40 picoseconds per track. The MTD consists of the Barrel Timing Layer (BTL) and the Endcap Timing Layer (ETL), each optimized for different regions of the detector. The ETL, comprising two double-sided disks, utilizes Low-Gain Avalanche Diode (LGAD) sensors coupled with the Endcap Timing Readout Chip (ETROC) to achieve high-precision timing measurements in the forward region. Significant progress has been made toward the realization of the ETL through extensive system-level validation of the ETROC readout chain and the development of scalable module assembly procedures. This presentation will provide a comprehensive overview of the ETL and highlight recent advances in system validation and module assembly, emphasizing their roles in ensuring the detector readiness for HL-LHC operation.

Lee, Dongyub [Kyungpook Natl. U.] (ORCID:000000034↗

Digital Silicon Photomultiplier Chip Testing

Silicon Photomultipliers (SiPMs) are highly sensitive photodetectors. Traditional analog SiPMs require complex external readout electronics. Digital SiPMs (dSiPMs) include digital readout circuitry directly on-chip, offering superior timing resolution, reduced power consumption and compact size, pixel-level masking for active noise reduction. The primary objectives of this study are to, verify digital logic integrity of the shift registers used for controlling the pixel masking circuit, and determine the dark count rate of individual pixels as a function of bias voltage and clock frequency. I observe and explain behavior of the shift register and counting circuit.

Graham, Bennett [U. Chicago (main)]↗

Graphical User Interface for a Biasing Board for the PSEC6

The PSEC6 is an application-specific integrated circuit (ASIC) designed for a readout system for a large area picosecond photodetector (LAPPD). The PSEC6 is currently in fabrication and pending testing. The testing system for the PSEC5, the previous iteration of the ASIC, required expensive and non-portable equipment, because the ASIC needs twelve adjustable reference voltages. The new testing system consists of an low-cost, open-source, cross-platform graphical user interface (GUI), a digital system, and a biasing board. The digital system is the interface between the GUI and biasing board, and can be implemented on a microcontroller or field-programmable gate array (FPGA). The biasing board contains twelve digital-to-analog converters (DACs) that are configurable via the GUI, which gives users the ability to write voltage values to all or specific DACs. The GUI was developed in C on Linux using the widget library GTK4 and cross-compiled for Windows compatibility. I2C and SPI protocols were implemented on an Adafruit Feather ESP32-S3 microcontroller to write commands to the DACs and PSEC6. A hardware implementation of the I2C protocol is in development on an FPGA. Since LAPPDs will be used by the Accelerator Neutrino Neutron Interaction Experiment (ANNIE) at Fermilab, the PSEC6 testing system in this internship project can potentially benefit future neutrino research. The project is relevant to the Department of Energy’s microelectronics mission, because the PSEC6 is an ASIC that will handle fast time signals arriving from the detector for readout. It also provided experience with building a cross-platform user interface, practicing digital design and implementation in hardware description language (HDL), and using simulations to inform new design iterations.

Guerrero, Sasha Camila [North Central Coll.]↗

Quality Control of Silicon Sensor Modules for Particle Detectors

The High-Luminosity Large Hadron Collider (HL-LHC) will produce a higher rate of particle collisions than the current Large Hadron Collider (LHC), requiring important upgrades to the Compact Muon Solenoid (CMS) to handle an increased amount of data. An important upgrade is the Phase-2 Outer Tracker Upgrade, which consists of 13,000 silicon sensor modules made of two parallel silicon sensors and readout electronics. These modules undergo careful quality control checks both during and after module assembly to ensure precise and reliable detector performance. This project focuses on precision testing for quality control of silicon sensor modules at Fermilab. Hands-on work includes visual inspection, current-voltage testing, module testing, and ultraviolet (UV) light exposure of modules showing abnormal current-voltage behavior. The ultraviolet exposure process improves the abnormal sensor readout data by placing the selected sensor side of the module directly under the UV light inside a controlled box. In addition to laboratory testing and ultraviolet experiments, I developed a Python-based data tool that connects to a module database and allows selected testing conditions and module information to be retrieved and displayed efficiently. These different testing procedures, experimental processes, and computational tools support the broader goal of identifying module issues and improving modules that will be used in the CMS Outer Tracker Phase-2 Upgrade.

Siddiqui, Hooriya [DuPage Coll.] (ORCID:0009000151↗

Understanding the temperature and humidity dependence of the SiPM characteristics

A miniature version of the ICAL experiment at the India-based Neutrino Observatory, the mini-ICALis in operation at the IICHEP, Madurai. The commissioning work of a Cosmic Muon Veto detector (CMVD)on top of the mini-ICAL is continued using extruded plastic scintillators with embeddedWLS fibers and the SiPM as a photo-transducer. The CMVD is being built to study thefeasibility of a cosmic muon veto for a shallow-depth neutrino experiment. The SiPM is calibratedusing an ultrafast LED driver andthe same calibration techniques will be used during the data taking period with a simplified LED in thesame readout PCB. An experimental setup wasdesigned to characterise the SiPMs in a temperature controlled environment. The readout electronicsinvolves trans-impedance amplifiers and a voltage followers of combined gain 1.24 mV/$\mu$A and adigital storage oscilloscope for the data collection with a minimal distortion of SiPM signal.Various characteristics of the Hamamatsu SiPM (S13360-2050VE), e.g. signal shape, optically correlatedand uncorrelated noise, recovery time etc were studied as a function of $V_{ov}$, number of photoelectrons,the ambient temperature and the humidity. This paper will cover the details of those results.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

60 Co γ Irradiation of a CMS CROC v2 to 1.6 Grad

This paper reports the irradiation of the production version of the readout chip for the CMS HL-LHC pixel detector, CROC~v2, to 1.6~Grad using γ s from a 60 Co source at Sandia National Laboratory. The CROC~v2 was kept powered, configured, and maintained as close as possible to its nominal operating temperature of -20~ o C during irradiation. Internal chip voltages, pixel response, and diagnostic ring oscillators were continuously monitored, and thresholds were optimized frequently. The CROC~v2 performed according to specifications at 1.6~Grad. Where available, these results will be compared with those for this and earlier iterations of the RD53 readout chip irradiated to a few Grad with lower-energy X-ray sources.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Low-Jitter Clock Receivers for Fast Timing Applications

Precision timing is a key requirement for emerging 4D particle tracking, Positron Emission Tomography (PET), beam and fusion plasma diagnostics, and other systems. Time-to-Digital Converters (TDCs) are commonly used to provide digital estimates of the relative timing between events, but the jitter performance of a TDC can be no better than the performance of the circuits that acquire the pulses and deliver them to the TDC. Several clock receiver and distribution circuits were evaluated, and a differential amplifier with resistive loads driving a pseudo-differential clock distribution network, developed using design guidelines for radiation tolerance and cryogenic compatibility, was fabricated as part of three prototypes: an analog front-end testbed chip for high-precision timing pixel readout, a dedicated TDC evaluation chip, and a Low-Gain Avalanche Detector (LGAD) readout circuit. Based on TDC measurements of the prototypes, we infer that the jitter added by the clock receiver and distribution circuits is less than 2.25 ps-rms. This performance meets the requirements of many future precision timing systems. The clock receiver and on-chip pseudo-differential driver were fabricated in commercial 28-nm CMOS technology and occupy 2288 µm 2 .

47 OTHER INSTRUMENTATION↗