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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9

Assemblers: A Modular, Reconfigurable Manipulator for Autonomous in-Space Assembly

This paper presents a modular, reconfigurable robotic manipulator for autonomous in-space assembly. On-orbit and planetary surface assembly is a challenging domain that encompasses various technological thrusts to support human exploration, science, and technology demonstration missions. The system architecture presented here addresses the need for robotic assembly of structures in locations that prohibit constant human oversight and/or teleoperation. This system is capable of scheduling, reconfiguring itself, and executing structural assembly tasks with the ability to assess construction and correct errors during the assembly as needed. An example concept of operations is presented. Details of the mechanical and electrical design of the robotic modules as well as the dynamic modeling approach, control algorithms, and sensing and perception systems are also provided.

robotics↗

NASA Advanced Reconfigurable Electrified Aircraft Laboratory (AREAL)

The rapid maturation of electrified aircraft and the underlying technologies has outpaced the development of corresponding standards and guidelines. This is especially true with respect to the design and test of high voltage power systems and equipment. To expedite the development of these standards and guidelines, the National Aeronautics and Space Administration (NASA) Revolutionary Vertical Lift Technology (RVLT) Project has designed and built the Advanced Reconfigurable Electrified Aircraft Laboratory (AREAL). AREAL is a 200 kW High Voltage DC (HVDC) test facility that can be reconfigured to test various electrical power system (EPS) architectures and/or different types of Utilization Equipment (UE). This paper will cover AREAL and its capabilities, the testing planned within AREAL, and how the tests performed within AREAL will inform developing HVDC Power System standards, test methods and guidelines, and models.

Aerospace↗

Catastrophic Fault Recovery with Self-Reconfigurable Chips

Mission critical systems typically employ multi-string redundancy to cope with possible hardware failure. Such systems are only as fault tolerant as there are many redundant strings. Once a particular critical component exhausts its redundant spares, the multi-string architecture cannot tolerate any further hardware failure. This paper aims at addressing such catastrophic faults through the use of 'Self-Reconfigurable Chips' as a last resort effort to 'repair' a faulty critical component.

fault tolerance↗

Reconfigurable Cascaded Thermal Neuristors for Neuromorphic Computing

While the complementary metal-oxide semiconductor (CMOS) technology is the mainstream for the hardware implementation of neural networks, an alternative route is explored based on a new class of spiking oscillators called “thermal neuristors”, which operate and interact solely via thermal processes. Utilizing the insulator-to-metal transition (IMT) in vanadium dioxide, a wide variety of reconfigurable electrical dynamics mirroring biological neurons is demonstrated. Notably, inhibitory functionality is achieved just in a single oxide device, and cascaded information flow is realized exclusively through thermal interactions. To elucidate the underlying mechanisms of the neuristors, a detailed theoretical model is developed, which accurately reflects the experimental results. In conclusion, this study establishes the foundation for scalable and energy-efficient thermal neural networks, fostering progress in brain-inspired computing.

36 MATERIALS SCIENCE↗

Dynamic Temporal Graph Sequence Data for Resilience-Oriented Distribution Network Reconfiguration

This dataset comprises temporal dynamic graph sequences generated from power grid simulations focused on grid reconfiguration to enhance resilience. The simulations model failure propagation under varying conditions, with nodes assigned distinct failure probabilities. For each time step, the dataset captures the evolution of node states (functional or failed) and features critical to grid operations, such as pv_output, load_profile, load_dispatch, dg_output, loss, and voltage. Node types include sources, normal loads, and nodes with specific equipment like PVs, micro turbines, or shunt capacitors. The dataset is structured to support the training of dynamic graph neural networks, facilitating research on node feature prediction and edge dynamics under failure scenarios. Three distinct configurations are included, providing a robust foundation for modeling power grid resilience.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗

Evaluation of the Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Array

The current implementation of the Telecommunications Protocol Processing Subsystem Using Reconfigurable Interoperable Gate Arrays (TRIGA) is equipped with CFDP protocol and CCSDS Telemetry and Telecommand framing schemes to replace the CPU intensive software counterpart implementation for reliable deep space communication. We present the hardware/software co-design methodology used to accomplish high data rate throughput. The hardware CFDP protocol stack implementation is then compared against the two recent flight implementations. The results from our experiments show that TRIGA offers more than 3 orders of magnitude throughput improvement with less than one-tenth of the power consumption.

protocol processing hardware↗

Temperature-adaptive Circuits on Reconfigurable Analog Arrays

This paper describes a new reconfigurable analog array (MA) architecture and integrated circuit (IC) used to map analog circuits that can adapt to extreme temperatures under programmable control. Algorithm-driven adaptation takes place on the RAA IC. The algorithms are implemented in a separate Field Programmable Gate Array (FPGA) IC, co-located with the RAA in the extreme temperature environment. The experiments demonstrate circuit adaptation over a wide temperature range, from extremely low temperature of -180 C to high 120 C.

self recovery↗

SpaceCube v2.0 Space Flight Hybrid Reconfigurable Data Processing System

This paper details the design architecture, design methodology, and the advantages of the SpaceCube v2.0 high performance data processing system for space applications. The purpose in building the SpaceCube v2.0 system is to create a superior high performance, reconfigurable, hybrid data processing system that can be used in a multitude of applications including those that require a radiation hardened and reliable solution. The SpaceCube v2.0 system leverages seven years of board design, avionics systems design, and space flight application experiences. This paper shows how SpaceCube v2.0 solves the increasing computing demands of space data processing applications that cannot be attained with a standalone processor approach.The main objective during the design stage is to find a good system balance between power, size, reliability, cost, and data processing capability. These design variables directly impact each other, and it is important to understand how to achieve a suitable balance. This paper will detail how these critical design factors were managed including the construction of an Engineering Model for an experiment on the International Space Station to test out design concepts. We will describe the designs for the processor card, power card, backplane, and a mission unique interface card. The mechanical design for the box will also be detailed since it is critical in meeting the stringent thermal and structural requirements imposed by the processing system. In addition, the mechanical design uses advanced thermal conduction techniques to solve the internal thermal challenges.The SpaceCube v2.0 processing system is based on an extended version of the 3U cPCI standard form factor where each card is 190mm x 100mm in size The typical power draw of the processor card is 8 to 10W and scales with application complexity. The SpaceCube v2.0 data processing card features two Xilinx Virtex-5 QV Field Programmable Gate Arrays (FPGA), eight memory modules, a monitor FPGA with analog monitoring, Ethernet, configurable interconnect to the Xilinx FPGAs including gigabit transceivers, and the necessary voltage regulation. The processor board uses a back-to-back design methodology for common parts that maximizes the board real estate available. This paper will show how to meet the IPC 6012B Class 3A standard with a 22-layer board that has two column grid array devices with 1.0mm pitch. All layout trades such as stack-up options, via selection, and FPGA signal breakout will be discussed with feature size results. The overall board design process will be discussed including parts selection, circuit design, proper signal termination, layout placement and route planning, signal integrity design and verification, and power integrity results. The radiation mitigation techniques will also be detailed including configuration scrubbing options, Xilinx circuit mitigation and FPGA functional monitoring, and memory protection.Finally, this paper will describe how this system is being used to solve the extreme challenges of a robotic satellite servicing mission where typical space-rated processors are not sufficient enough to meet the intensive data processing requirements. The SpaceCube v2.0 is the main payload control computer and is required to control critical subsystems such as autonomous rendezvous and docking using a suite of vision sensors and object avoidance when controlling two robotic arms.

Xilinx FPGA↗

Adapting the Reconfigurable SpaceCube Processing System for Multiple Mission Applications

This paper will detail the use of SpaceCube in multiple space flight applications including the Hubble Space Telescope Servicing Mission 4 (HST-SM4), an International Space Station (ISS) radiation test bed experiment, and the main avionics subsystem for two separate ISS attached payloads. Each mission has had varying degrees of data processing complexities, performance requirements, and external interfaces. We will show the methodology used to minimize the changes required to the physical hardware, FPGA designs, embedded software interfaces, and testing.This paper will summarize significant results as they apply to each mission application. In the HST-SM4 application we utilized the FPGA resources to accelerate portions of the image processing algorithms more than 25 times faster than a standard space processor in order to meet computational speed requirements. For the ISS radiation on-orbit demonstration, the main goal is to show that we can rely on the commercial FPGAs and processors in a space environment. We describe our FPGA and processor radiation mitigation strategies that have resulted in our eight PowerPCs being available and error free for more than 99.99 of the time over the period of four years. This positive data and proven reliability of the SpaceCube on ISS resulted in the Department of Defense (DoD) selecting SpaceCube, which is replacing an older and slower computer currently used on ISS, as the main avionics for two upcoming ISS experiment campaigns. This paper will show how we quickly reconfigured the SpaceCube system to meet the more stringent reliability requirements

SpaceCube↗

Spacecube: A Family of Reconfigurable Hybrid On-Board Science Data Processors

SpaceCube is a family of Field Programmable Gate Array (FPGA) based on-board science data processing systems developed at the NASA Goddard Space Flight Center (GSFC). The goal of the SpaceCube program is to provide 10x to 100x improvements in on-board computing power while lowering relative power consumption and cost. SpaceCube is based on the Xilinx Virtex family of FPGAs, which include processor, FPGA logic and digital signal processing (DSP) resources. These processing elements are leveraged to produce a hybrid science data processing platform that accelerates the execution of algorithms by distributing computational functions to the most suitable elements. This approach enables the implementation of complex on-board functions that were previously limited to ground based systems, such as on-board product generation, data reduction, calibration, classification, eventfeature detection, data mining and real-time autonomous operations. The system is fully reconfigurable in flight, including data parameters, software and FPGA logic, through either ground commanding or autonomously in response to detected eventsfeatures in the instrument data stream.

reconfigurable computing↗

Identification and Reconfigurable Control of Impaired Multi-Rotor Drones

The paper presents an algorithm for control and safe landing of impaired multi-rotor drones when one or more motors fail simultaneously or in any sequence. It includes three main components: an identification block, a reconfigurable control block, and a decisions making block. The identification block monitors each motor load characteristics and the current drawn, based on which the failures are detected. The control block generates the required total thrust and three axis torques for the altitude, horizontal position and/or orientation control of the drone based on the time scale separation and nonlinear dynamic inversion. The horizontal displacement is controlled by modulating the roll and pitch angles. The decision making algorithm maps the total thrust and three torques into the individual motor thrusts based on the information provided by the identification block. The drone continues the mission execution as long as the number of functioning motors provide controllability of it. Otherwise, the controller is switched to the safe mode, which gives up the yaw control, commands a safe landing spot and descent rate while maintaining the horizontal attitude.

Unmanned aerial system↗

Meso-Scale Digital Materials: Modular, Reconfigurable, Lattice-Based Structures

We present a modular, reconfigurable system for building large structures. This system uses discrete lattice elements, called digital materials, to reversibly assemble ultralight structures that are 99.7% air and yet maintain sufficient specific stiffness for a variety of structural applications and loading scenarios. Design, manufacturing, and characterization of modular building blocks are described, including struts, nodes, joints, and build strategies. Simple case studies are shown using the same building blocks in three different scenarios: a bridge, a boat, and a shelter. Field implementation and demonstration is supplemented by experimental data and numerical simulation. A simplified approach for analyzing these structures is presented which shows good agreement with experimental results.

Reconfigurable↗

Phase-change Reconfigurable Optical WavEfront Synthesis System (PROWESS)

We report the design, fabrication, and testing of electrically tunable metasurface k-space filters based on the low-loss, high-contrast phase-change material GSST and a transparent Si electrode heating architecture. A 10x10 array of PCM elements integrated with Si heaters was fabricated via foundry processes, and used to actively control the crystallinity of a metasurface consisting of GSST nano antennae. By selectively varying the structural state of individual PCM elements, specific k-vectors of transmitted light can effectively be filtered out, resulting in improved imaging quality by reducing the scattered light that reaches a detector. Optimized doping profiles in the Si heaters allow for uniform, low power, reliable and repeatable switching of the GSST state. Compared to other k-space filters, this new architecture is completely transparent to the wavelength of interest and can be actively reconfigured in real time with high performance, low power consumption and a small footprint. The 10x10 array device is a proof-of-concept demonstration that can enable high-resolution arbitrary wavefront synthesis and correction in the future, with key applications in optical communications, beam steering, remote sensing, and adaptive optics.

phase change material↗

Advancing Metasurfaces Towards New Frontiers: Nonvolatile Reconfigurable Optics

The applications of adaptive optics extend across multiple sectors, encompassing areas such as LiDAR, biological and chemical sensing, and free-space communications. In this study, we report on the design, fabrication, testing, and modeling of electrically reconfigurable metasurfaces using a low-loss high contrast phase change material, Ge2Sb2Se4Te integrated with an IR-transparent silicon microheater. Through this work, we introduce a reliable architecture for switching PCM-based metasurfaces within an integrated circuit configuration which is compatible with standard foundry fabrication processes. We demonstrate the capability of controlling the transmission of electromagnetic waves through the precise stimulation of PCM-based pixels, each spanning a few hundred microns, over numerous cycles. By leveraging PCM-based pixels, we unlock the potential to create metasurfaces encompassing a diverse range of functionalities such as dielectric filters, metalens, or beam steering devices, which is governed by the design of the meta-atoms. Further, we perform an in-depth investigation into the failure mechanism utilizing techniques such as Fourier transform IR spectroscopy (FTIR), transmission electron microscopy (TEM), energy dispersive spectroscopy (EDS), and thermal modeling. According to our results, due to a sharp temperature rise at the PCM/heater interface, we observe severe delamination of the PCM from the heater. More uniform PCM deposition, better adhesion at the PCM/heater interface, and a more uniform temperature distribution in the device could potentially mitigate the failure and lead to a longer life-time. By addressing these challenges, we aim to unlock the full potential of PCM-based devices and advance the field of adaptive optics.

Phase change material↗