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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Enhancing ICARUS and REDTOP Software and Hardware: Event Generator Interface Development and Calorimeter Tile Prototype

ICARUS (Imaging Cosmic And Rare Underground Signals) is a liquid argon time projection chamber (LArTPC) detector that pursues the sterile neutrino, which relies on accurate simulations of neutrino-argon interactions. REDTOP (Rare Eta Decays To Observe new Physics) is a proposed low-energy, high-intensity meson factory designed to explore rare $\eta$/$\eta'$ meson decays and probe physics beyond the Standard Model. As a next-generation experiment, this requires both accurate simulations and innovative detector technologies. This project contributes to both ICARUS, from a simulation perspective, and REDTOP, from both a simulation and detection perspective, through the event generation of lepton-nucleon interactions and the physical enhancement of the calorimeter technology within the REDTOP detector. We developed an interface between ACHILLES (A CHIcago Land Lepton Event Simulator), a theory-driven lepton-level event generator, and GENIE, a robust event generator framework used for neutrino physics. By incorporating the precise theoretical cross-section calculations of ACHILLES into the experimental realism of GENIE, the interface allows for improved accuracy of neutrino-nucleon simulations, which can be adapted for the proton beam specifications of the REDTOP meson factory as well as for the ICARUS experiment. In parallel, we developed an improved prototype for the ADRIANO2 (A Dual Readout Integrally Active Non-segmented Option) dual-readout calorimeter tiles for the REDTOP detector. To improve the efficiency of the lead-glass tiles trapping Cherenkov light for energy reconstruction and particle identification, we optimized the application of a highly reflective coating. Through viscosity and thickness control, masking, and a custom spray technique, we refined the coating process to reduce surface defects and improve light yield. Together, these efforts strengthen the ICARUS neutrino program and REDTOP's capability of detecting rare decay events.

Visser, Erin [Michigan State U.] (ORCID:0009000184↗
DOE OSTI2025

Harnessing the Power of AI: Status and Expansion of Current Domestic Transport Security Through Flexible Embedded Hardware

As applications of Artificial Intelligence (AI) continue to expand, there are increasing opportunities to leverage applied AI methodologies with mobile transportation focused embedded systems. Current applications of AI in transportation focus on a variety of areas, including fuel efficiency, safety, security, and other broad fields of optimization or detection. To leverage these AI workflows and methodologies in the field, teams must utilize complex embedded systems capable of implementing these AI-enabled algorithms in real-time. In this paper, we will investigate how these algorithms can be integrated into existing technologies leveraging vehicle data - such as the Controller Area Network Transport Security Tracking and Reporting Unit (C-STAR). The C-STAR technology is an embedded platform with onboard computation capable of running next generation algorithms in vehicle systems AI, such as preventative maintenance, driver authentication, and transport security. As deployed in the field, the C-STAR has a limited AI functionality –this paper will directly discuss how a device like C-STAR can be utilized and the advantages of integrating these new technologies. We will open with relevant background information and transportation projects that leverage AI, focusing specifically on those around transport security such as vehicle identification, anomaly detection, and deterrence. We will then extend this into potential opportunities and scaling for AI methodologies using platforms like the C-STAR. Finally, we will speak directly to the challenges of deploying AI-powered workflows, such as computing power needs, bandwidth, hallucinations, and other regulatory considerations.

Cook, Adian [ORNL] (ORCID:0000000160825395)↗
DOE OSTI2025

Reconfigurable neuromorphic components and algorithms for next-generation artificial intelligence

Digital transistor-based general-purpose hardware (e.g., central processing units) is the dominant solution to support both traditional computing (logic, arithmetic, etc.) as well as modern artificial intelligence. State-of-the-art research has shown feasibility of post-digital physics-based neuromorphic hardware, which is hypothesized to support artificial intelligence algorithms with orders-of-magnitude improved time/energy efficiencies. But such research has not been widely deployed mainly because of such novel hardware’s extreme application-specificity, and the dominance of low-cost general-purpose (but inefficient) digital hardware. To make use of the novel algorithms and the superlative performance of physics-based hardware, we need to identify scientific principles that can enable generality in physics-based hardware. This work resulted in two important broad outcomes – first, we demonstrate fully reconfigurable neuromorphic components, and second, we demonstrate a viable artificial intelligence learning algorithm that can exploit the functioning of neuromorphic hardware. We demonstrate up to five orders of magnitude improvement in energy efficiency compared to the best general-purpose digital hardware.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2025

Design and Demonstration of a NH3-Fueled Two-Stroke Uniflow Engine for Greenhouse Gas Reduction

The maritime shipping industry is growing increasingly interested in both low and non-carbon-containing fuels to meet future greenhouse gas emission targets. Specifically of interest is ammonia, as it has a relatively high volumetric energy density compared to other future fuels, such as hydrogen, making it more economical to transport. The robust engine architecture of low-speed two-stroke marine engines makes them an ideal candidate for ammonia fuel, overcoming many of the issues surrounding its poor ignitability and low flame speed. If emissions and fueling system challenges can be addressed, retrofits of current low-speed two-stroke dual-fuel engines represent a viable pathway for bringing ammonia engines to market. This study explores these technical hurdles by describing the design, analysis, and experimental validation of a single cylinder research engine converted to operate on ammonia fuel. The engine is a reduced-scale uniflow two-stroke marine engine with two previous hardware configurations available – diesel and high-pressure CNG dual-fuel. A concept study was used to evaluate possible ammonia-fueled engine architectures and the associated tradeoffs and design considerations. With the chosen architecture, low-pressure dual fuel, 1D and 3D analysis tools were used to inform hardware selection and to determine hardware configurations which minimized ammonia-slip. In addition to these considerations the hardware and engine configuration were designed to provide a versatile and robust testing platform. This includes options to test both gaseous and liquid ammonia injection, as well as a wide range of performance parameters such as AFR, swirl, valve timing, SOI, and many others. Design constraints imposed by the existing engine hardware necessitated an iterative loop between design and analysis toolsets, ultimately converging on a final design for the ammonia-conversion hardware. The engine was rebuilt with the new hardware and evaluated in an engine test cell. A new control strategy developed and flashed onto a prototyping electronic control unit allowed for full control over all engine parameters. An initial calibration was developed, providing test data for validation of the engine 1D and 3D models. The impact of the design choices on engine operability and the ability to meet program targets is discussed as well as opportunities for further optimization of the ammonia-conversion hardware, informed by the validated models.

Kaul, Brian [ORNL] (ORCID:0000000184813620)↗
DOE OSTI2024

Impedance Scan of Inverter-Based Resources and Diesel Generator for Stability Analysis

Impedance-based methods are widely used for power system stability analysis with inverter-based resources (IBRs), e.g., assessing dynamic interactions between the power grid and an IBR, control interactions between multiple IBRs, and the sub-synchronous oscillation and damping phenomenon. Since it is difficult to get a numerical model 100% matching with the hardware IBR, using the hardware inverter directly to obtain its output impedance has become a prominent approach nowadays. Therefore, this article presents the impedance scan using hardware IBRs, and also a hardware diesel generator as it still stays with the grid before the grid completely goes to renewable. The devices under test (DuTs) for the impedance scan includes two 3-..phi.., 480 V, 60 Hz commercial grid-forming IBRs (one of 250 kVA and another of 125 kVA rating) in series with ..delta..-Y transformers, one 3-..phi.., 480 V, 60 Hz commercial grid-following IBR (of 125 kVA rating), and a 3-..phi.., 480 V, 60 Hz commercial diesel generator (of 187.5 kVA rating). Using voltage signals perturbed with sub-, inter-, and higher harmonic components, and measuring the current response, the positive-sequence impedances are computed via an offline-based post-analysis. Moreover, best-fit transfer functions are estimated that closely resemble the measured data points of the positive-sequence impedances. Based on the observations from various outcomes of the hardware experiments, this article also provides some fundamental insights on the equivalent positive-sequence impedance of a combination of multiple hardware components by comparing the estimated and the empirically computed impedances. A comparative insight on the damping capability of the DuTs using the positive-sequence impedances of the hardware is also discussed.

current measurement↗
DOE OSTI2024

Impedance Scan of Inverter-Based Resources and Diesel Generator for Stability Analysis: Preprint

Impedance-based methods are widely used for power system stability analysis with inverter-based resources (IBRs), e.g., assessing dynamic interactions between the power grid and an IBR, control interactions between multiple IBRs, and the sub-synchronous oscillation and damping phenomenon. Since it is difficult to get a numerical model 100% matching with the hardware IBR, using the hardware inverter directly to obtain its output impedance has become a prominent approach nowadays. Therefore, this article presents the impedance scan using hardware IBRs, and also a hardware diesel generator as it still stays with the grid before the grid completely goes to renewable. The devices under test (DuTs) for the impedance scan includes two 3-..phi.., 480 V, 60 Hz commercial grid-forming IBRs (one of 250 kVA and another of 125 kVA rating) in series with ..delta..-Y transformers, one 3-..phi.., 480 V, 60 Hz commercial grid-following IBR (of 125 kVA rating), and a 3-..phi.., 480 V, 60 Hz commercial diesel generator (of 187.5 kVA rating). Using voltage signals perturbed with sub-, inter-, and higher harmonic components, and measuring the current response, the positive-sequence impedances are computed via an offline- based post-analysis. Moreover, best-fit transfer functions are estimated that closely resemble the measured data points of the positive-sequence impedances. Based on the observations from various outcomes of the hardware experiments, this article also provides some fundamental insights on the equivalent positive- sequence impedance of a combination of multiple hardware components by comparing the estimated and the empirically computed impedances. A comparative insight on the damping capability of the DuTs using the positive-sequence impedances of the hardware is also discussed.

grid following inverter↗
DOE OSTI2024

Neuromorphic intermediate representation: A unified instruction set for interoperable brain-inspired computing

Abstract Spiking neural networks and neuromorphic hardware platforms that simulate neuronal dynamics are getting wide attention and are being applied to many relevant problems using Machine Learning. Despite a well-established mathematical foundation for neural dynamics, there exists numerous software and hardware solutions and stacks whose variability makes it difficult to reproduce findings. Here, we establish a common reference frame for computations in digital neuromorphic systems, titled Neuromorphic Intermediate Representation (NIR). NIR defines a set of computational and composable model primitives as hybrid systems combining continuous-time dynamics and discrete events. By abstracting away assumptions around discretization and hardware constraints, NIR faithfully captures the computational model, while bridging differences between the evaluated implementation and the underlying mathematical formalism. NIR supports an unprecedented number of neuromorphic systems, which we demonstrate by reproducing three spiking neural network models of different complexity across 7 neuromorphic simulators and 4 digital hardware platforms. NIR decouples the development of neuromorphic hardware and software, enabling interoperability between platforms and improving accessibility to multiple neuromorphic technologies. We believe that NIR is a key next step in brain-inspired hardware-software co-evolution, enabling research towards the implementation of energy efficient computational principles of nervous systems. NIR is available atneuroir.org

Science & Technology - Other Topics↗
DOE OSTI2026

Hybrid Oscillator-Qubit Quantum Processors: Instruction Set Architectures, Abstract Machine Models, and Applications

This tutorial offers a pedagogical guide to hybrid quantum processors that integrate discrete-variable (DV) qubits and continuous-variable (CV) oscillators. Aimed at computer scientists, engineers, and physicists, it provides an overview of the experimental, algorithmic, and architectural aspects of this novel and rapidly developing hardware model. Experimental realizations of this model include superconducting, trapped-ion, and neutral-atom platforms. By combining DV and CV components, hybrid oscillator-qubit processors enable a powerful new paradigm that offers complementary strengths for quantum control, error correction, computation, and simulation. Working toward the goal of a full-stack system connecting applications to CV-DV hardware, we define and formulate abstract machine models and instruction set architectures. These essential abstractions enable codesign of hardware and software, and resource estimation for exploring the potential of current and future hardware for computational and simulation tasks. Using these abstractions, we present both new and existing examples that illustrate the benefits of hybrid CV-DV processors relative to traditional DV-only hardware in computation as well as quantum simulation of physical models. Examples include algorithms for transferring states between DV and CV systems, performing the quantum Fourier transform, and simulation of lattice gauge theories. Relative to qubit-only hardware, the bosonic degrees of freedom natively available in hybrid architectures can substantially reduce the circuit complexity of simulations for physical models containing bosons. A key technique is the extension of quantum signal processing ideas to CV-DV systems. This work is intended to serve as a timely and comprehensive guide to this relatively unexplored yet promising approach to quantum computation and to provide a road map to guide future development.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2025

LLM-Inference-Bench: Inference Benchmarking of Large Language Models on AI Accelerators

Large Language Models (LLMs) have propelled groundbreaking advancements across several domains and are commonly used for text generation applications. However, the computational demands of these complex models pose significant challenges, requiring efficient hardware acceleration. Benchmarking the performance of LLMs across diverse hardware platforms is crucial to understanding their scalability and throughput characteristics. We introduce LLM-Inference-Bench, a comprehensive benchmarking suite to evaluate the hardware inference performance of LLMs. We thoroughly analyze diverse hardware platforms, including GPUs from Nvidia and AMD and specialized AI accelerators, Intel Habana and SambaNova. Our evaluation includes several LLM inference frameworks and models from LLaMA, Mistral, and Qwen families with 7B and 70B parameters. Our benchmarking results reveal the strengths and limitations of various models, hardware platforms, and inference frameworks. We provide an interactive dashboard to help identify configurations for optimal performance for a given hardware platform.

Chitty-Venkata, Krishna Teja↗