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Advancing Dust Tolerant Mechanisms for a Sustained Exploration of the Moon

Introduction: “I think dust is probably one of our greatest inhibitors to a nominal operation on the Moon. I think we can overcome other physio-logical or physical or mechanical problems except dust.”– Gene Cernan, Apollo 17 Technical Debrief The Apollo missions revealed the impact of lu-nar dust on mechanisms. Lunar dust particles are jagged and electrostatically charged, giving them the ability to bind or damage mechanisms and alter thermal properties. Reports documented clogged equipment and jammed mechanisms in every mission, regardless of surface duration, as well as clogged mechanisms in the Extravehicular Mobility Suit (EMS), including zippers, wrist and hose locks, faceplates, and sunshades [1-2]. Several astronauts remarked they could not have sustained surface activity much longer because clogged joints would have frozen up completely [2]. Effective dust mitigation strategies are need-ed to support longer duration stays on the lunar surface [3-4]. State of the Art: Technology for mechanisms able to operate in dusty enviroments is advancing rapidly due to the needs of both Mars rovers and the Artemis program. Vacuum-tight connectors are essential for spacesuits and habitats, and their performance can be dependent on cleaning technologies, which have proven difficult on the lunar surface. Several TRL 3-5 technologies are undergoing tests with the expectation to reach TRL 6 within 1-2 years. Some mechanisms will be infused and tested on the VIPER (Volatiles Inves-tigating Polar Exploration Rover) mission planned for mid-2020s. NASA Funded Efforts: NASA has recognized the need for dust tolerant mechanisms, and has partnered with industry to advance the state-of-the-art. At NASA GRC, KSC, and JSC, the Dust Tolerant Mechanisms Project is working to devel-op advanced actuator seals for rotary joints and rotary bearing technologies for long-term sus-tained operation in lunar dust environments. An-other NASA project at NASA GRC, partnered with GSFC, JPL, and KSC is Motors for Dusty & Ex-treme Cold Environments (MDECE). MDECE is developing an unheated magnetically-geared mo-tor that can operate continuously for a long dura-tion at an ambient temperature of -243 ºC (33 K). NASA GRC has the capability to characterize the effects of dust on seals, mechanisms, and other mating surfaces and components under lunar conditions [5]. Through the SBIR/STTR program, NASA has funded several companies to advance dust toler-ant mechanisms via the Dust Tolerant Mecha-nisms sub-topic with applications in surface mobil-ity, spacesuits, connectors, joints, and more. LSIC and Community Efforts: The Lunar Surface Innovation Consortium (LSIC) Dust Miti-gation focus group has fostered collaborations across NASA, industry, and academia to develop solutions that minimizes the impact of lunar dust on robotic and human systems. Community ef-forts have included topical meetings on dust tol-erant mechanisms, featured technology presenta-tions, and feedback to NASA on potential gaps and needs. Testing: In 2021, NASA released NASA-STD-1008 [6]. This NASA Technical Standard estab-lishes minimum requirements and provides guid-ance for testing systems and hardware to be ex-posed to dust in planetary environments. The standard has specific sections dedicated to Mechanisms Testing (e.g. bearings, gears) as well as Seals and Mating Surfaces Testing (e.g. hatches, docking systems). Gaps and Needs: NASA is tracking dust tol-erant mechanisms as a gap in a cross-directorate analysis of capability areas needed to enable fu-ture human space-flight architectures. Two high-priority gap areas include additional facilities for testing mechanisms in lunar-surface conditions, and a better understanding of vulnerabilities to the smallest, nanometer-scale dust particles. Conclusion: Understanding and mitigating lu-nar dust is critical to successful, sustained opera-tions on the lunar surface – whether autonomous or otherwise. This presentation will discuss both the state-of-the-art and open needs in lunar dust tolerant mechanisms, technology impacts, mitiga-tion approaches, testing, LSIC community efforts, and more. References: [1] Gaier, J. R. (2020). The Im-pact of Dust on Lunar Surface Equipment During Apollo. Lunar Dust 2020. [2] GRC, & Gaier, J. R. (2005). The Effects of Lunar Dust on EVA Sys-tems During the Apollo Missions. [3] Johansen, M. R. (2020). An Update on NASA’s Lunar Dust Mitigation Strategy. Lunar Dust 2020. [4] ASI, CSA, ESA, JAXA, & NASA. (2016). Dust Mitiga-tion Gap Assessment Report. [5] Jimenez, N. et al (2022), LPSC Abstract 2572. [6] NASA-STD-1008, 2021.

J I Nunez↗
NASA NTRS1997

Development and Operation of a Material Identification and Discrimination Imaging Spectroradiometer

Many imaging applications require quantitative determination of a scene's spectral radiance. This paper describes a new system capable of real-time spectroradiometric imagery. Operating at a full-spectrum update rate of 30Hz, this imager is capable of collecting a 30 point spectrum from each of three imaging heads: the first operates from 400 nm to 950 nm, with a 2% bandwidth; the second operates from 1.5 micro-m to 5.5 micro-m with a 1.5% bandwidth; the third operates from 5 micro-m to 12 micro-m, also at a 1.5% bandwidth. Standard image format is 256 x 256, with 512 x 512 possible in the VIS/NIR head. Spectra of up to 256 points are available at proportionately lower frame rates. In order to make such a tremendous amount of data more manageable, internal processing electronics perform four important operations on the spectral imagery data in real-time. First, all data in the spatial/spectral cube of data is spectro-radiometrically calibrated as it is collected. Second, to allow the imager to simulate sensors with arbitrary spectral response, any set of three spectral response functions may be loaded into the imager including delta functions to allow single wavelength viewing; the instrument then evaluates the integral of the product of the scene spectral radiances and the response function. Third, more powerful exploitation of the gathered spectral radiances can be effected by application of various spectral-matched filtering algorithms to identify pixels whose relative spectral radiance distribution matches a sought-after spectral radiance distribution, allowing materials-based identification and discrimination. Fourth, the instrument allows determination of spectral reflectance, surface temperature, and spectral emissivity, also in real-time. The spectral imaging technique used in the instrument allows tailoring of the frame rate and/or the spectral bandwidth to suit the scene radiance levels, i.e., frame rate can be reduced, or bandwidth increased to improve SNR when viewing low radiance scenes. The unique challenges of design and calibration are described. Pixel readout rates of 160 MHz, for full frame readout rates of 1000 Hz (512 x 512 image) present the first challenge; processing rates of nearly 600 million integer operations per second for sensor emulation, or over 2 billion per second for matched filtering, present the second. Spatial and spectral calibration of 66,536 pixels (262,144 for the 512 x 512 version) and up to 1,000 spectral positions mandate novel decoupling methods to keep the required calibration memory to a reasonable size. Large radiometric dynamic range also requires care to maintain precision operation with minimum memory size.

Dombrowski, Mark↗
NASA NTRS1994

A combined electron beam/optical lithography process step for the fabrication of sub-half-micron-gate-length MMIC chips

Advanced radar and communication systems rely heavily on state-of-the-art microelectronics. Systems such as the phased-array radar require many transmit/receive (T/R) modules which are made up of many millimeter wave - microwave integrated circuits (MMIC's). The heart of a MMIC chip is the Gallium Arsenide (GaAs) field-effect transistor (FET). The transistor gate length is the critical feature that determines the operating frequency of the radar system. A smaller gate length will typically result in a higher frequency. In order to make a phased array radar system economically feasible, manufacturers must be capable of producing very large quantities of small-gate-length MMIC chips at a relatively low cost per chip. This requires the processing of a large number of wafers with a large number of chips per wafer, minimum processing time, and a very high chip yield. One of the bottlenecks in the fabrication of MIMIC chips is the transistor gate definition. The definition of sub-half-micron gates for GaAs-based field-effect transistors is generally performed by direct-write electron beam lithography (EBL). Because of the throughput limitations of EBL, the gate-layer fabrication is conventionally divided into two lithographic processes where EBL is used to generate the gate fingers and optical lithography is used to generate the large-area gate pads and interconnects. As a result, two complete sequences of resist application, exposure, development, metallization and lift-off are required for the entire gate structure. We have baselined a hybrid process, referred to as EBOL (electron beam/optical lithography), in which a single application of a multi-level resist is used for both exposures. The entire gate structure, (gate fingers, interconnects and pads), is then formed with a single metallization and lift-off process. The EBOL process thus retains the advantages of the high-resolution E-beam lithography and the high throughput of optical lithography while essentially eliminating an entire lithography/metallization/lift-off process sequence. This technique has been proven to be reliable for both trapezoidal and mushroom gates and has been successfully applied to metal-semiconductor and high-electron-mobility field-effect transistor (MESFET and HEMT) wafers containing devices with gate lengths down to 0.10 micron and 75 x 75 micron gate pads. The yields and throughput of these wafers have been very high with no loss in device performance. We will discuss the entire EBOL process technology including the multilayer resist structure, exposure conditions, process sensitivities, metal edge definition, device results, comparison to the standard gate-layer process, and its suitability for manufacturing.

Sewell, James S.↗
NASA NTRS1998

Minimum Climb to Cruise Noise Trajectories Modeled for the High Speed Civil Transport

The proposed U.S. High Speed Civil Transport (HSCT) will revolutionize commercial air travel by providing economical supersonic passenger service to destinations worldwide. Unlike the high-bypass turbofan engines that propel today's subsonic airliners, HSCT engines will have much higher jet exhaust speeds. Jet noise, caused by the turbulent mixing of high-speed exhaust with the surrounding air, poses a significant challenge for HSCT engine designers. To resolve this challenge, engineers have designed advanced mixer rejector nozzles that reduce HSCT jet noise to airport noise certification levels by entraining and mixing large quantities of ambient air with the engines' jet streams. Although this works well during the first several minutes of flight, far away from the airport, as the HSCT gains speed and climbs, poor ejector inlet recovery and ejector ram drag contribute to poor thrust, making it advantageous to turn off the ejector. Doing so prematurely, however, can cause unacceptable noise levels to propagate to the ground, even when the aircraft is many miles from the airport. This situation lends itself ideally to optimization, where the aircraft trajectory, throttle setting, and ejector setting can be varied (subject to practical aircraft constraints) to minimize the noise propagated to the ground. A method was developed at the NASA Lewis Research Center that employs a variation of the classic energy state approximation: a trajectory analysis technique historically used to minimize climb time or fuel burned in many aircraft problems. To minimize the noise on the ground at any given throttle setting, high aircraft altitudes are desirable; but the HSCT may either climb quickly to high altitudes using a high, noisy throttle setting or climb more slowly at a lower, quieter throttle setting. An optimizer has been programmed into NASA's existing aircraft and noise analysis codes to balance these options by dynamically choosing the best altitude-velocity path and throttle setting history. The noise level standard, or metric, used in the optimizer should be one that accurately reflects the subjective annoyance levels of ground-based observers under the flight path. A variety of noise metrics are available, many of which are practical for airport-vicinity noise certification. Unlike airport noise, however, the HSCT's climb noise will be characterized by relatively low noise levels, long durations, and low-frequency spectra. The noise metrics used in these calculations are based on the recommendations of researchers at the NASA Langley Research Center, who have correlated the flyover noise annoyance levels of actual laboratory subjects with a variety of measurements. Analysis of data from this optimizer has shown that significant reductions in noise may be obtained with trajectory optimization. And since throttling operations are performed in the subsonic portion of the climb path (where thrust is plentiful), only small penalties in HSCT range or fuel performance occur.

Berton, Jeffrey J.↗