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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9
All sourcesNASA NTRSDOE OSTI
NASA NTRS1986

The effect of processing conditions on the GaAs/plasma-grown insulator interface

The effect of processing conditions on the interface state density was evaluated from C-V measurements on metal-oxide-semiconductor capacitors. The optimum processing conditions for the minimum surface state density was found to be related to the postoxidation annealing temperature and time, and was independent of chemical treatments prior to oxidation. Annealing at the optimum condition (i.e., at 350 C for 1 h in either nitrogen or hydrogen gas, with or without an aluminum pattern on the oxide) reduces the fast surface state density by about one order of magnitude. By using a nitrogen/oxygen plasma, the static dielectric constant of the oxide decreased as the N/O ratio was increased, and nitrogen was incorporated into the oxide. In addition, the fast surface state density was reduced as a result of this nitridation process.

Hshieh, F. I.↗
DOE OSTI2025

A General Solution Route to Nanoporous Metal Oxide Films

Metal oxide semiconductors are of interest as efficient, stable, and low-cost photoanode materials for photoelectrochemical water splitting, but their characteristically poor charge transport properties remain a fundamental challenge to practical use. Nanoporous metal oxide films that feature open bicontinuous networks of nanocrystals and nanopores can overcome such inefficient charge transport to enable high-performance photoanodes. Here, this paper describes a general method to make high-quality nanoporous films of metal oxides by spin coating and calcining molecular inks that contain a porosity-generating block copolymer. Phase-pure nanoporous films of BiFeO 3 , FeWO 4 , WO 3 , Fe 2 O 3 , and TiO 2 serve to demonstrate the versatility of the approach. It is demonstrated that the crystallite size, film porosity, and film thickness can be independently tuned by adjusting the ink composition and film processing conditions. The method is extended to fabricate core–shell nanoporous films consisting of a nanoporous film coated in a thin shell of a second metal oxide, using WO 3 –BiVO 4 and BiFeO 3 –BiVO 4 as examples. Given its simplicity and flexibility, this solution-phase route should prove useful for making nanoporous films of many different materials for a variety of applications, including energy conversion and storage, catalysis, and chemical sensing.

coating materials↗
NASA NTRS2008

Radiation effects assessment of MRAM devices

The Magneto-resistive Random Access Memory (MRAM) from Freescale Semiconductor, MR2A16A, was subjected to heavy ion single event testing. Test results show that this device is sensitive to Single Event Latchup (SEL). The sensitivity of the MRAM was attributed to the complementary metal oxide semiconductor (CMOS) process in which the active portion of this device is constructed. Therefore, the device must be used with caution and may require mitigation techniques if used in a space environment. There was no indication that the MRAM technology itself, the memory element construction, is subject to damage from heavy ions.

McClure, Steve↗
DOE OSTI2020

High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition

Abstract New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm 2 V −1 s −1 , due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm 2 V –1 s –1 and a subthreshold slope of 0.29 V dec –1 . Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐ k gate insulator (ALD Al 2 O 3 ), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.

Allemang, Christopher R.↗
NASA NTRS1986

Overcash, D. R.

The objectives of this investigation were to determine the characteristics of semiconductor devices at low temperatures. The output characteristics of several currently available semiconductor devices and devices fabricated at Marshall Space Flight Center were measured over a range of gate voltages. Large variations in low-temperature performance, not only from type to type, but from field effect transistor (FET) to FET of the same type were obtained. By increasing the carrier concentrations at low temperatures through extra heavy doping, metal oxide semiconductor field effect transistor (MOSFET) device was fabricated that operated at 4.2K. To verify the low-temperature operation of a heavily doped device, this procedure was repeated. Their noise spectrum was analyzed at 4.2K. Suggestions were made as to possible fabrication methods, techniques, and other semiconductor materials that might improve the device charactersitics at low temperatures. A procedure for using an electric field to drift dopants through the insulating oxide to produce a very thin, heavily doped region under the gate of a MOSFET was initiated. Capacitance s a function of voltage plots was suggested as a method for determining the level of dopant drift.

Source record↗
DOE OSTI2025

Quantitative characterization of ZrO2 gate dielectric interface with tellurium

Tellurium (Te) has recently emerged as a promising p-type semiconductor that can be processed at low temperatures, compatible with back end of line CMOS integration. Characterization of tellurium–dielectric interfaces is essential for further device advancements. Here, the interface quality of Te with ZrO2 gate dielectric is studied in a metal-oxide semiconductor capacitor structure. The interface trap density (Dit) is measured as a function of atomic layer deposition (ALD) temperature, without the use of a seed layer. Given the low thermal budget of Te, the ALD temperature is shown to be particularly important. The lowest Dit of 5 × 1012 states/cm2 eV is obtained at a low ALD process temperature of 120 °C. To further assess the impact of Dit on device performance, field-effect transistors (FETs) were fabricated. The subthreshold swing and effective hole mobility of the FETs were analyzed in relation to Dit, emphasizing the importance of a defect-minimized interface for enhancing Te transistor performance.

Byeon, Kyeong-Jae↗
DOE OSTI2020

The Role of Cation Coordination in the Electrical and Optical Properties of Amorphous Transparent Conducting Oxides

Amorphous oxide semiconductor materials have demonstrated numerous advantages without compromise of electrical properties as compared to their crystalline counterparts, yet understanding of the fundamental principles allowing this has remained elusive. To study the origins of enhanced optoelectronic properties, we apply high-throughput, combinatorial sputtering, structural and spectral mapping, and computationally intensive ab initio molecular dynamics simulations with density functional theory to a ternary, post-transition metal oxide system, namely, zinc tin oxide. The deposited thin films exhibit a high figure of merit, achieving carrier densities in the range of 1019 to 1020 cm–3 and carrier mobilities up to 35 cm2/Vs. These results highlight the role of local distortions and cation coordination in determining the microscopic origins of carrier generation and transport. In particular, we identify the strong likelihood of Sn undercoordination in both Zn-poor and Zn-rich phases leading to the high carrier concentrations observed. This not only diverges from the still widespread historical indictment of oxygen vacancies controlling carrier population in crystalline oxides but also provides a comprehensive framework to describe the unique structure–property relationships using specific structural and electronic descriptors in disordered phase materials.

CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSICS,M↗
NASA NTRS1990

Neutron and gamma irradiation effects on power semiconductor switches

The performance characteristics of high power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Schwarze, G. E.↗
NASA NTRS1990

Neutron and gamma irradiation effects on power semiconductor switches

The performance characteristics of high-power semiconductor switches subjected to high levels of neutron fluence and gamma dose must be known by the designer of the power conditioning, control and transmission subsystem of space nuclear power systems. Location and the allowable shielding mass budget will determine the level of radiation tolerance required by the switches to meet performance and reliability requirements. Neutron and gamma ray interactions with semiconductor materials and how these interactions affect the electrical and switching characteristics of solid state power switches is discussed. The experimental measurement system and radiation facilities are described. Experimental data showing the effects of neutron and gamma irradiation on the performance characteristics are given for power-type NPN Bipolar Junction Transistors (BJTs), and Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs). BJTs show a rapid decrease in gain, blocking voltage, and storage time for neutron irradiation, and MOSFETs show a rapid decrease in the gate threshold voltage for gamma irradiation.

Schwarze, G. E.↗
DOE OSTI2020

Diazo coupling for surface attachment of small molecules to TiO 2 nanoparticles

Robust surface attachment of molecular species to metal oxide semiconductors is desirable for many applications. In this work, we report the interfacial diazo coupling of surface-bound amines with aromatics to bind them to the surface of TiO 2 nanoparticles via a robust siloxane anchor and a diazo link. The technique shows potential for the inexpensive, stable, modular and tunable attachment of molecules to metal oxide surfaces.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2020

Design, Analysis, Comparison, and Experimental Validation of Insulated Metal Substrates for High-Power Wide-Bandgap Power Modules

Direct bonded copper (DBC) substrates used in power modules have limited heat spreading and manufacturing capability due to ceramic properties and manufacturing technology. The ceramic and copper bonding is also subject to high mechanical stress due to coefficient of thermal expansion mismatch between the copper and the ceramic. For wide-bandgap (WBG) devices, it is of interest exploring new substrate technologies that can overcome some of the challenges of direct bonded copper substrates. In this technical paper, the design, analysis, and comparison of insulated metal substrates (IMSs) for high-power wide-bandgap semiconductor-based power modules are discussed. This paper starts with technical description and discussion of state-of-the-art DBC substrates with different ceramic insulators such as aluminum nitride (AlN), Al 2 O 3 , and Si 3 N 4 . Next, an introduction of IMSs and their material properties, and a design approach for SiC (silicon carbide) metal-oxide-semiconductor field-effect transistor (MOSFET)-based power modules for high-power applications is provided. The influence of dielectric thickness on the power handling capability of the substrate are also discussed. The designed IMS and DBC substrates were characterized in terms of steady-state and transient thermal performance using finite element simulation. Finally, the performance of the IMS and DBC are validated in an experimental setup under different loading and cooling temperature conditions. We report the simulation and experimental results showed that the IMS can provide high steady-state thermal performance for high-power modules based on SiC MOSFETs. Furthermore, the IMS provided enhanced transient thermal performance, which provided a reduced junction temperature when the module is operated at low fundamental output frequencies in traction drive systems.

42 ENGINEERING↗
DOE OSTI2022

Radiation detector using a graphene amplifier layer

A radiation field is detected or imaged using one or more junction devices in which a two-dimensional conductor layer is capacitively coupled to a semiconductor absorber layer. In the junction devices, pixel-level amplification and read-out are accomplished through the photogating of the devices by absorption within the absorber layer while it is in a state of deep depletion. When the two-dimensional conductor is graphene, we refer to a device operating in that manner as a deeply depleted graphene-oxide-semiconductor (D 2 GOS) detector.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
NASA NTRS1991

Development of silicon carbide semiconductor devices for high temperature applications

The semiconducting properties of electronic grade silicon carbide crystals, such as wide energy bandgap, make it particularly attractive for high temperature applications. Applications for high temperature electronic devices include instrumentation for engines under development, engine control and condition monitoring systems, and power conditioning and control systems for space platforms and satellites. Discrete prototype SiC devices were fabricated and tested at elevated temperatures. Grown p-n junction diodes demonstrated very good rectification characteristics at 870 K. A depletion-mode metal-oxide-semiconductor field-effect transistor was also successfully fabricated and tested at 770 K. While optimization of SiC fabrication processes remain, it is believed that SiC is an enabling high temperature electronic technology.

Matus, Lawrence G.↗
NASA NTRS2016

Silicon-Carbide Power MOSFET Performance in High Efficiency Boost Power Processing Unit for Extreme Environments

Silicon-Carbide device technology has generated much interest in recent years. With superior thermal performance, power ratings and potential switching frequencies over its Silicon counterpart, Silicon-Carbide offers a greater possibility for high powered switching applications in extreme environment. In particular, Silicon-Carbide Metal-Oxide- Semiconductor Field-Effect Transistors' (MOSFETs) maturing process technology has produced a plethora of commercially available power dense, low on-state resistance devices capable of switching at high frequencies. A novel hard-switched power processing unit (PPU) is implemented utilizing Silicon-Carbide power devices. Accelerated life data is captured and assessed in conjunction with a damage accumulation model of gate oxide and drain-source junction lifetime to evaluate potential system performance at high temperature environments.

Ikpe, Stanley A.↗
DOE OSTI2022

Scalable Al 2 O 3 –TiO 2 Conductive Oxide Interfaces as Defect Reservoirs for Resistive Switching Devices

Abstract Resistive switching devices herald a transformative technology for memory and computation, offering considerable advantages in performance and energy efficiency. Here, a simple and scalable material system of conductive oxide interfaces is employed, and their unique properties are leveraged for a new type of resistive switching device. An Al 2 O 3 –TiO 2 ‐based valence‐change resistive switching device, where the conductive oxide interface serves both as the bottom electrode and as a reservoir of defects for switching, is demonstrated. The amorphous–polycrystalline Al 2 O 3 –TiO 2 conductive interface is obtained following the technological path of simplifying the fabrication of the 2D electron gases (2DEGs), making them scalable for practical mass integration. Physical analysis of the device chemistry and microstructure with comprehensive electrical analysis of its switching behavior and performance is combined. The origin of the resistive switching is pinpointed to the conductive oxide interface, which serves both as the bottom electrode and as a reservoir of oxygen vacancies. The latter plays a key role in valence‐change resistive switching devices. The new device, based on scalable and complementary metal–oxide–semiconductor (CMOS)‐technology‐compatible fabrication processes, opens new design spaces toward increased tunability and simplification of the device selection challenge.

36 MATERIALS SCIENCE↗
DOE OSTI2023

Reconfigurable Cascaded Thermal Neuristors for Neuromorphic Computing

While the complementary metal-oxide semiconductor (CMOS) technology is the mainstream for the hardware implementation of neural networks, an alternative route is explored based on a new class of spiking oscillators called “thermal neuristors”, which operate and interact solely via thermal processes. Utilizing the insulator-to-metal transition (IMT) in vanadium dioxide, a wide variety of reconfigurable electrical dynamics mirroring biological neurons is demonstrated. Notably, inhibitory functionality is achieved just in a single oxide device, and cascaded information flow is realized exclusively through thermal interactions. To elucidate the underlying mechanisms of the neuristors, a detailed theoretical model is developed, which accurately reflects the experimental results. In conclusion, this study establishes the foundation for scalable and energy-efficient thermal neural networks, fostering progress in brain-inspired computing.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Indirect tunneling enabled spontaneous time-reversal symmetry breaking and Josephson diode effect in TiN/Al 2 ⁢O 3 /Hf 0.8 ⁢Zr 0.2 ⁢O 2 /Nb tunnel junctions

Josephson diode (JD) effect in Josephson tunnel junctions (JTJs) has attracted a great deal of attention due to its importance for developing superconducting-circuitry-based quantum technologies. Even though the preparation of high-quality JTJs by techniques employed in the semiconductor industry has been demonstrated, which was an important milestone because JTJs are the building blocks of superconducting electronics even before the quantum era, the JD effect has not been accomplished in them, nor has the highly desirable electrical control of the effect. We report here the fabrication of JTJs featuring a composite tunnel barrier of Al 2 ⁢O 3 and Hf 0.8 ⁢Zr 0.2 ⁢O 2 using complementary-metal-oxide-semiconductor compatible atomic layer deposition. These JTJs were found to show the JD effect in nominally zero magnetic fields with nonreciprocity controllable via an electric training current, yielding a surprisingly large diode efficiency. The quasiparticle tunneling, through which the Josephson coupling in a JTJ is established, was found to show theoretically expected gap features but no nonreciprocity. We attribute these observations to the simultaneous presence of positive and negative local Josephson couplings in the JTJs, with the negative Josephson coupling originating from indirect tunneling, which results in spontaneous time-reversal symmetry breaking. Finally, the double-minima washboard potential for the ensemble-averaged phase difference in the resistively and capacitively shunted junction model is shown to fully account for the experimentally observed JD effect.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
NASA NTRS1979

Local atomic and electronic structure of oxide/GaAs and SiO2/Si interfaces using high-resolution XPS

The chemical structures of thin SiO2 films, thin native oxides of GaAs (20-30 A), and the respective oxide-semiconductor interfaces, have been investigated using high-resolution X-ray photoelectron spectroscopy. Depth profiles of these structures have been obtained using argon ion bombardment and wet chemical etching techniques. The chemical destruction induced by the ion profiling method is shown by direct comparison of these methods for identical samples. Fourier transform data-reduction methods based on linear prediction with maximum entropy constraints are used to analyze the discrete structure in oxides and substrates. This discrete structure is interpreted by means of a structure-induced charge-transfer model.

Grunthaner, F. J.↗