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At least 163 records · Page 9

Characterization of Low-Temperature, Co-Fired Ceramic-Manufactured Electrostatic Thruster-Closeout Report

The goal of the project was to evaluate prototypes of an experimental thruster developed by the University of Arkansas (UA), Fayetteville, AR. The design under evaluation is a radio frequency (RF) electrostatic thruster that was fabricated using the low-temperature, co-fired ceramic (LTCC) materials and fabrication process. This materials system is analogous to printed circuit board (PCB) technology with the most significant difference being that the laminate is replaced by a ceramic material and the copper layer is replaced by printed sinterable silver paste. LTCC designs are baked after fabrication and assembled to realize an entirely monolithic structure with internal conductors, vias, and cavities. In this process, the LTCC electrostatic thruster (LTCC-ET) that is the subject of the present work becomes a monolithic ceramic thruster capable of withstanding temperatures in excess of 500 ºC. The UA and NASA Marshall Space Flight Center (MSFC) jointly performed prototype testing on the LTCC-ET under a NASA Cooperative Agreement Notice (CAN) award. The LTCC-ET was tested at MSFC in May 2018 over a 1-week period. There were two goals for the test program: (1) Testing to determine the operating parameters required to create plasma ignition in the test articles. This was explored by setting a propellant flowrate and increasing RF power until plasma ignition was observed. Testing was conducted with both argon and krypton. (2) Investigate the thrust and specific impulse (Isp) performance of the thruster as a function of propellant flowrate and grid voltage. This goal was not met during the project as technical challenges in maintaining stable plasma ignition arose due to stress and heating of the RF power feed. In summary, a prototype thruster design (consisting of three packaged units) was fabricated by UA and tested for the first time under vacuum conditions at MSFC to experimentally determine basic performance metrics and functionality. It was found that the design was not sufficiently optimized or robust enough in its initial iteration to support a significant test campaign or characterization program. It was concluded that the propellant outlet channels must be reduced in size with the flowpaths adjusted to increase propellant residence time in the thruster, and that the RF connector must be replaced with a version capable of handling higher power throughput and heating. However, even in its unoptimized form, a plasma could be produced in the LTCCET, demonstrating the efficacy of the design approach. The design is especially compelling due to its low cost to manufacture and, more importantly, its scalability of size and power throughput. Low cost and scalability are also important in that additional functionalities, such as thrust vectoring and plume charge neutralization, can be integrated into future designs with minimal additional cost. This project has matured the LTCC-ET development Technology Readiness Level (TRL) from 1 to 2. The low-cost RF plasma source portion of the LTCC device was matured from TRL 2 to 4 through the demonstration of RF plasma ignition under vacuum conditions.

Huang, P.-H. A.↗

Circuit-lead trimming template

Template for use in trimming leads on production wiring boards is low-cost means for eliminating rejections for short leads and improving lead-strength uniformity. Template is simply unclad piece of printed-circuit board material that is drilled using same drill control tape used in making original production board. Revisions in component layout of board can therefore be made simultaneously in template.

Ofarrell, K.↗

RF front end interface and AGC modification

Preliminary results indicate that the new front end automatic gain control (AGC) combination perform satisfactorily. Side by side bench tests with Trimble 10A and Texas Instruments 9900 LORAN-C receivers have proven that the proper time differences are being obtained. Further optimization of the AGC circuit will occur as software to track all of the stations in a LORAN-C chain is developed. The AGC circuit was designed to sample up to six separate LORAN-C stations. Along with expanded station tracking software, a more sophisticated search routine is also under development. A printed circuit board for the AGC is planned and will be enclosed with the RF front end in a sealed enclosure to reduce interference from the other digital circuits of the microcomputer.

Yost, S. R.↗

Printable Spacecraft: Flexible Electronic Platforms for NASA Missions

Atmospheric confetti. Inchworm crawlers. Blankets of ground penetrating radar. These are some of the unique mission concepts which could be enabled by a printable spacecraft. Printed electronics technology offers enormous potential to transform the way NASA builds spacecraft. A printed spacecraft's low mass, volume and cost offer dramatic potential impacts to many missions. Network missions could increase from a few discrete measurements to tens of thousands of platforms improving areal density and system reliability. Printed platforms could be added to any prime mission as a low-cost, minimum resource secondary payload to augment the science return. For a small fraction of the mass and cost of a traditional lander, a Europa flagship mission might carry experimental printed surface platforms. An Enceladus Explorer could carry feather-light printed platforms to release into volcanic plumes to measure composition and impact energies. The ability to print circuits directly onto a variety of surfaces, opens the possibility of multi-functional structures and membranes such as "smart" solar sails and balloons. The inherent flexibility of a printed platform allows for in-situ re-configurability for aerodynamic control or mobility. Engineering telemetry of wheel/soil interactions are possible with a conformal printed sensor tape fit around a rover wheel. Environmental time history within a sample return canister could be recorded with a printed sensor array that fits flush to the interior of the canister. Phase One of the NIAC task entitled "Printable Spacecraft" investigated the viability of printed electronics technologies for creating multi-functional spacecraft platforms. Mission concepts and architectures that could be enhanced or enabled with this technology were explored. This final report captures the results and conclusions of the Phase One study. First, the report presents the approach taken in conducting the study and a mapping of results against the proposed Phase One objectives. Then an overview of the general field of printed electronics is provided, including manufacturing approaches, commercial drivers, and the current state of integrated systems. The bulk of the report contains the results and findings of Phase One organized into four sections: a survey of components required for a printable spacecraft, technology roadmaps considerations, science mission and engineering applications, and potential risks and challenges of the technology.

Spacecraft↗

Printed Antennas Made Reconfigurable by Use of MEMS Switches

A class of reconfigurable microwave antennas now undergoing development comprise fairly conventional printed-circuit feed elements and radiating patches integrated with novel switches containing actuators of the microelectromechanical systems (MEMS) type. In comparison with solid-state electronic control devices incorporated into some prior printed microwave antennas, the MEMS-based switches in these antennas impose lower insertion losses and consume less power. Because the radio-frequency responses of the MEMS switches are more nearly linear, they introduce less signal distortion. In addition, construction and operation are simplified because only a single DC bias line is needed to control each MEMS actuator.

Simons, Rainee N.↗

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Electric aircrafts↗

Lightweight, Durable, and Multifunctional Electrical Insulation Material Systems for High Voltage Applications

Newly developed multilayer structures of well-known polymer insulation materials significantly improved dielectric breakdown voltage, VB, or dielectric strength, K, if well-bonded, when compared to those of single material insulations or the commercial SOA systems, such as Teflon-Kapton-Teflon (TKT), at the same overall thickness. To date, the greatest improvement of the new structures from a few candidate materials, including various types of Kapton PIs and PFA or PET as bond layer (BL), was about 61% higher than that of the Kapton PI alone films, 40.1 vs. 24.9 kV, which was translated to 86.3% decrease in insulation thickness, thus significant volume and weight reduction of the final system. However, it was of interest to note that most improvements of the multilayer structures occurred at thicker overall thicknesses, above ~ 0.15 mm. Extensive analyses also showed that K of the multilayer structures increased with (i) decreasing individual layer thickness regardless of material type, (ii) increasing total accumulated thickness of PI or overall PI/BL ratio, and (iii) increasing number of interface or total number of layers, but only above the aforementioned overall thickness limit. Increases in VB of the multilayer structures were directly correlated with damage evolution and failure mode. With further material-design-process optimizations of the multilayer structures, it was expected to achieve other multifunctionalities, such as high partial discharge (PD) resistance, improved durability, EMI shielding, and high thermal dissipation in addition to high dielectric strength. These new structures can be used in various high voltage and high temperature applications, such as future hybrid or all electric aircraft wiring and power transmission as well as many other non-aerospace high power cables, electronic parts and components, printed circuit board, and so forth. The multilayer insulation system can be easily processed and manufactured with various conductor types via calendaring, compression-molding, stamping, laminating, vacuum-bagging and autoclaving, or 3D printing, even for complex 3-D components. Based on their unique structural configurations and potential capabilities, the new insulation system was identified as micro-multilayer multifunctional electrical insulation (MMEI). Patent application of the MMEI concept and current design configurations was filed for a 1-year provisional application (OAI-58834, Serial No.: 62/659,234), pending conversion to a U.S. utility application. This paper presents details of the MMEI structures, their dielectric performance analyses, potential mechanisms, and commercial scaleup feasibility assessment.

Multifunctional↗

Digital Pulse-Width-Modulation Circuit

Digital pulse-width-modulation circuit provides programmable duration from 1 microsecond to full on, at repetition rate of 1 kHz. Designed for use in controlling CO2 laser, also used in applications in which precision and flexibility of digital control of pulse durations needed. Circuit incorporates low-power Schottky transistor/transistor-logic (TTL) devices in critical high-speed parts. Designed in TTL to make it compatible with Pro-Log 7914 (or equivalent) decoder input/output (I/O) utility printed-circuit card.

Wenzler, Carl J.↗

System architecture of a gallium arsenide one-gigahertz digital IC tester

The design for a 1-GHz digital integrated circuit tester for the evaluation of custom GaAs chips and subsystems is discussed. Technology-related problems affecting the design of a GaAs computer are discussed, with emphasis on the problems introduced by long printed-circuit-board interconnect. High-speed interface modules provide a link between the low-speed microprocessor and the chip under test. Memory-multiplexer and memory-shift register architectures for the storage of test vectors are described in addition to an architecture for local data storage consisting of a long chain of GaAs shift registers. The tester is constructed around a VME system card cage and backplane, and very little high-speed interconnect exists between boards. The tester has a three part self-test consisting of a CPU board confidence test, a main memory confidence test, and a high-speed interface module functional test.

Fouts, Douglas J.↗

Wide-bandwidth high-resolution search for extraterrestrial intelligence

A third antenna was added to the system. It is a terrestrial low-gain feed, to act as a veto for local interference. The 3-chip design for a 4 megapoint complex FFT was reduced to finished working hardware. The 4-Megachannel circuit board contains 36 MByte of DRAM, 5 CPLDs, the three large FFT ASICs, and 74 ICs in all. The Austek FDP-based Spectrometer/Power Accumulator (SPA) has now been implemented as a 4-layer printed circuit. A PC interface board has been designed and together with its associated user interface and control software allows an IBM compatible computer to control the SPA board, and facilitates the transfer of spectra to the PC for display, processing, and storage. The Feature Recognizer Array cards receive the stream of modulus words from the 4M FFT cards, and forward a greatly thinned set of reports to the PC's in whose backplane they reside. In particular, a powerful ROM-based state-machine architecture has been adopted, and DRAM has been added to permit integration modes when tracking or reobserving source candidates. The general purpose (GP) array consists of twenty '486 PC class computers, each of which receives and processes the data from a feature extractor/correlator board set. The array performs a first analysis on the provided 'features' and then passes this information on to the workstation. The core workstation software is now written. That is, the communication channels between the user interface, the backend monitor program and the PC's have working software.

Horowitz, Paul↗

Design of Advanced Atmospheric Water Vapor Differential Absorption Lidar (DIAL) Detection System

The measurement of atmospheric water vapor is very important for understanding the Earth's climate and water cycle. The lidar atmospheric sensing experiment (LASE) is an instrument designed and operated by the Langley Research Center for high precision water vapor measurements. The design details of a new water vapor lidar detection system that improves the measurement sensitivity of the LASE instrument by a factor of 10 are discussed. The new system consists of an advanced, very low noise, avalanche photodiode (APD) and a state-of-the-art signal processing circuit. The new low-power system is also compact and lightweight so that it would be suitable for space flight and unpiloted atmospheric vehicles (UAV) applications. The whole system is contained on one small printed circuit board (9 x 15 sq cm). The detection system is mounted at the focal plane of a lidar receiver telescope, and the digital output is read by a personal computer with a digital data acquisition card.

Refaat, Tamer F.↗

Silver Ink For Jet Printing

Metallo-organic ink containing silver (with some bismuth as adhesion agent) applied to printed-circuit boards and pyrolized in air to form electrically conductive patterns. Ink contains no particles of silver, does not have to be mixed during use to maintain homogeneity, and applied to boards by ink-jet printing heads. Consists of silver neodecanoate and bismuth 2-ethylhexanoate dissolved in xylene and/or toluene.

Vest, R. W.↗

Stable Polyurethane Coatings for Electronic Circuits

Alkane-based polyurethanes resist deterioration while maintaining good dielectric properties. Weight loss after prolonged immersion in hot water far less for alkane-based polyurethanes than for more common ether based polyurethanes, at any given oxygen content. Major uses of polyurethanes are as connector potting materials and conformal coatings for printed circuit boards.

Morris, D. E.↗

Advanced Atmospheric Water Vapor DIAL Detection System

Measurement of atmospheric water vapor is very important for understanding the Earth's climate and water cycle. The remote sensing Differential Absorption Lidar (DIAL) technique is a powerful method to perform such measurement from aircraft and space. This thesis describes a new advanced detection system, which incorporates major improvements regarding sensitivity and size. These improvements include a low noise advanced avalanche photodiode detector, a custom analog circuit, a 14-bit digitizer, a microcontroller for on board averaging and finally a fast computer interface. This thesis describes the design and validation of this new water vapor DIAL detection system which was integrated onto a small Printed Circuit Board (PCB) with minimal weight and power consumption. Comparing its measurements to an existing DIAL system for aerosol and water vapor profiling validated the detection system.

Refaat, Tamer F.↗

Reliability of CGA/LGA/HDI Package Board/Assembly (Final Report)

Package manufacturers are now offering commercial-off-the-shelf column grid array (COTS CGA) packaging technologies in high-reliability versions. Understanding the process and quality assurance (QA) indicators for reliability are important for low-risk insertion of these advanced electronics packages. The previous reports, released in January of 2012 and January of 2013, presented package test data, assembly information, and reliability evaluation by thermal cycling for CGA packages with 1752, 1517, 1509, and 1272 inputs/outputs (I/Os) and 1-mm pitch. It presented the thermal cycling (-55C either 100C or 125C) test results for up to 200 cycles. This report presents up to 500 thermal cycles with quality assurance and failure analysis evaluation represented by optical photomicrographs, 2D real time X-ray images, dye-and-pry photomicrographs, and optical/scanning electron Microscopy (SEM) cross-sectional images. The report also presents assembly challenge using reflowing by either vapor phase or rework station of CGA and land grid array (LGA) versions of three high I/O packages both ceramic and plastic configuration. A new test vehicle was designed having high density interconnect (HDI) printed circuit board (PCB) with microvia-in-pad to accommodate both LGA packages as well as a large number of fine pitch ball grid arrays (BGAs). The LGAs either were assembled onto HDI PCB as an LGA or were solder paste print and reflow first to form solder dome on pads before assembly. Both plastic BGAs with 1156 I/O and ceramic LGAs were assembled. It also presented the X-ray inspection results as well as failures due to 200 thermal cycles. Lessons learned on assembly of ceramic LGAs are also presented.

Ghaffaroam. Reza↗

Embedded passives emulator FY2003 interim report

The National Aeronautics and Space Administration Electronic Parts and Packaging (NEPP) Program has been evaluating state-of-the-art Embedded Passive Technology for the printed circuit board (PCB) industry for the past several years and has conducted its own testing on embedded passive coupons (resistors and capacitors). This document is a progress report of the work performed through fiscal year 2008 by NASA and the Navy to convert an existing PWB (printed wiring board) design to a design that incorporates embedded passive components. The work is being performed through a memorandum of understanding (MOU) between the NEPP Program (NASA) and the Naval Surface Warfare Center (NSWC) Crane Emerging Critical Interconnect Technology (ECIT) Program. NSWC Crane’s ECIT Program has funding to convert two PCB designs from the military and aerospace industry to a PCB design with embedded passives. ECIT will provide a design team that will take a well characterized design and convert it to an embedded design. They will also provide electrical modeling and layout expertise as well as build the PWB in their facility in Indiana. NEPP, through the Jet Propulsion Laboratory (JPL), will assemble any passives deemed not suitable for embedding and the active components and electrically test the new design to the existing (non-embedded) design

Gerke, David↗

Testing interconnected VLSI circuits in the Big Viterbi Decoder

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Onyszchuk, I. M.↗

SpaceHab 1 maintenance experiment

The SpaceHab 1 flight on STS-57 served as a test platform for evaluation of two space station payloads. The first payload evaluated a space station maintenance concept using a sweep signal generator and a 48-channel logic analyzer to perform fault detection and isolation. Crew procedures files, test setup diagram files, and software to configure the test equipment were created on the ground and uplinked on the astronauts' voice communication circuit to perform tests in flight. In order to use these files, the portable computer was operated in a multi-window configuration. The test data transmitted to the ground allowing the ground staff to identify the cause of the fault and provide the crew with the repair procedures and diagrams. The crew successfully repaired the system under test. The second payload investigated hand soldering and de-soldering of standard components on printed circuit (PC) boards in zero gravity. It also used a new type of intra-vehicular foot restraints which uses the neutral body posture in zero-g to provide retention of the crew without their conscious attention.

Bohannon, Jackie W.↗