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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9

Radiation cooler for 10 micrometer wavelength engineering model receiver model no. 7172, serial no. 201

The design, fabrication, and testing of a radiative cooler are described. This cooler is an engineering model suitable for bench testing in the laboratory as a part of the 10-micrometer wavelength engineering model receiver, and conforms to the standard radiative cooler configuration, except that the inner stage and its support system were redesigned to accommodate the larger, heavier SAT detector. This radiative cooler will cool the detector to cryogenic temperature levels when the receiver is in a space environment or in a suitable thermal vacuum chamber. Equipment specifications are given along with the results of thermal tests, vibration tests, and electrical integrity tests.

Source record↗

Serial-to-parallel color-TV converter

Solid analog-to-digital converter eliminates flicker and problems with time base stability and gain variation in sequential color TV cameras. Device includes 3-bit delta modulator; two-field memory; timing, switching, and sync network; and three 3-bit delta demodulators

Doak, T. W.↗

Serial-data correlator/code translator

System, consisting of sampling flip flop, memory (either RAM or ROM), and memory buffer, correlates sampled data with predetermined acceptance code patterns, translates acceptable code patterns to nonreturn-to-zero code, and identifies data dropouts.

Morgan, L. E.↗

28-Bit serial word simulator/monitor

Modular interface unit transfers data at high speeds along four channels. Device expedites variable-word-length communication between computers. Operation eases exchange of bit information by automatically reformatting coded input data and status information to match requirements of output.

Durbin, J. W.↗

Serial data correlator/code translator

A system for analyzing asynchronous signals containing bits of information for ensuring the validity of said signals, by sampling each bit of information a plurality of times, and feeding the sampled pieces of bits of information into a sequence controlled is described. The sequence controller has a plurality of maps or programs through which the sampled pieces of bits are stepped so as to identify the particular bit of information and determine the validity and phase of the bit. The step in which the sequence controller is clocked is controlled by a storage register. A data decoder decodes the information fed out of the storage register and feeds such information to shift registers for storage.

Morgan, L. E.↗

Supercomputing on massively parallel bit-serial architectures

Research on the Goodyear Massively Parallel Processor (MPP) suggests that high-level parallel languages are practical and can be designed with powerful new semantics that allow algorithms to be efficiently mapped to the real machines. For the MPP these semantics include parallel/associative array selection for both dense and sparse matrices, variable precision arithmetic to trade accuracy for speed, micro-pipelined train broadcast, and conditional branching at the processing element (PE) control unit level. The preliminary design of a FORTRAN-like parallel language for the MPP has been completed and is being used to write programs to perform sparse matrix array selection, min/max search, matrix multiplication, Gaussian elimination on single bit arrays and other generic algorithms. A description is given of the MPP design. Features of the system and its operation are illustrated in the form of charts and diagrams.

Iobst, Ken↗

Algorithms and software for solving finite element equations on serial and parallel architectures

The primary objective was to compare the performance of state-of-the-art techniques for solving sparse systems with those that are currently available in the Computational Structural Mechanics (MSC) testbed. One of the first tasks was to become familiar with the structure of the testbed, and to install some or all of the SPARSPAK package in the testbed. A brief overview of the CSM Testbed software and its usage is presented. An overview of the sparse matrix research for the Testbed currently employed in the CSM Testbed is given. An interface which was designed and implemented as a research tool for installing and appraising new matrix processors in the CSM Testbed is described. The results of numerical experiments performed in solving a set of testbed demonstration problems using the processor SPK and other experimental processors are contained.

Chu, Eleanor↗

Algorithms and software for solving finite element equations on serial and parallel architectures

Over the past 15 years numerous new techniques have been developed for solving systems of equations and eigenvalue problems arising in finite element computations. A package called SPARSPAK has been developed by the author and his co-workers which exploits these new methods. The broad objective of this research project is to incorporate some of this software in the Computational Structural Mechanics (CSM) testbed, and to extend the techniques for use on multiprocessor architectures.

George, Alan↗

Serial Escape System For Aircraft Crews

Emergency escape system for aircraft and aerospace vehicles ejects up to seven crewmembers, one by one, within 120 s. Intended for emergencies in which disabled craft still in stable flight at no more than 220 kn (113 m/s) equivalent airspeed and sinking no faster than 110 ft/s (33.5 m/s) at altitudes up to 50,000 ft (15.2 km). Ejection rockets load themselves from magazine after each crewmember ejected. Jumpmaster queues other crewmembers and helps them position themselves on egress ramp. Rockets pull crewmembers clear of aircraft structure. Provides orderly, controlled exit and avoids ditching at sea or landing in rough terrain.

Wood, Kenneth E.↗

General-Purpose Serial Interface For Remote Control

Computer controls remote television camera. General-purpose controller developed to serve as interface between host computer and pan/tilt/zoom/focus functions on series of automated video cameras. Interface port based on 8251 programmable communications-interface circuit configured for tristated outputs, and connects controller system to any host computer with RS-232 input/output (I/O) port. Accepts byte-coded data from host, compares them with prestored codes in read-only memory (ROM), and closes or opens appropriate switches. Six output ports control opening and closing of as many as 48 switches. Operator controls remote television camera by speaking commands, in system including general-purpose controller.

Busquets, Anthony M.↗

Preliminary study of a serial-parallel redundant manipulator

The manipulator design discussed here results from the examination of some of the reasons why redundancy is necessary in general purpose manipulation systems. A spherical joint design actuated in-parallel, having the many advantages of parallel actuation, is described. In addition, the benefits of using redundant actuators are discussed and illustrated in the design by the elimination of loci of singularities from the usable workspace with the addition of only one actuator. Finally, what is known by the authors about space robotics requirements is summarized and the relevance of the proposed design matched against these requirements. The design problems outlined here are viewed as much from the mechanical engineering aspect as from concerns arising from the control and the programming of manipulators.

Hayward, Vincent↗

Linear and circular digital spectral analysis of serial data

Two methods of digital spectral analysis of unevenly sampled data are developed and illustrated here. One method uses a linear function of time (or space), the other uses circular functions. The circular method turns out to be essentially equivalent to a least-squares sine-wave analysis. The linear, anharmonic method uses only the field of real numbers and elementary algebraic operations, and hence it can be made computationally very fast and accurate. Both methods are very general, properly handling all kinds of time series ranging from simple series consisting only of the times of events to complicated series consisting of pulses with long duty cycles. The two methods are here applied to the analysis of annual mean relative sunspot numbers.

Stothers, Richard B.↗

New dynamic FET logic and serial memory circuits for VLSI GaAs technology

The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

Eldin, A. G.↗

A comparative study of serial and parallel aeroelastic computations of wings

A procedure for computing the aeroelasticity of wings on parallel multiple-instruction, multiple-data (MIMD) computers is presented. In this procedure, fluids are modeled using Euler equations, and structures are modeled using modal or finite element equations. The procedure is designed in such a way that each discipline can be developed and maintained independently by using a domain decomposition approach. In the present parallel procedure, each computational domain is scalable. A parallel integration scheme is used to compute aeroelastic responses by solving fluid and structural equations concurrently. The computational efficiency issues of parallel integration of both fluid and structural equations are investigated in detail. This approach, which reduces the total computational time by a factor of almost 2, is demonstrated for a typical aeroelastic wing by using various numbers of processors on the Intel iPSC/860.

Byun, Chansup↗

On extending parallelism to serial simulators

This paper describes an approach to discrete event simulation modeling that appears to be effective for developing portable and efficient parallel execution of models of large distributed systems and communication networks. In this approach, the modeler develops submodels using an existing sequential simulation modeling tool, using the full expressive power of the tool. A set of modeling language extensions permit automatically synchronized communication between submodels; however, the automation requires that any such communication must take a nonzero amount off simulation time. Within this modeling paradigm, a variety of conservative synchronization protocols can transparently support conservative execution of submodels on potentially different processors. A specific implementation of this approach, U.P.S. (Utilitarian Parallel Simulator), is described, along with performance results on the Intel Paragon.

Nicol, David↗

Tools to Rapidly and Effectively Parallelise Serial FORTRAN Codes Using Either MPI or OpenMP

Significant progress has been made in hardware and software technologies, as a result the use of efficient standard message passing communication calls in parallel application codes has greatly assisted in reducing execution times. In addition, the introduction of OpenMP, an industrial standard for shared memory programming with directives addresses the issue of portability and also provides a means to deliver respectable performance. In general however, the manual parallelisation of a user's application code using either message passing or directives is still a very costly and error-prone process.

Jin, Hao-Qiang↗

Chip for CCSDS Compatible Serial Data Streams

A configurable service processor for telemetry ground stations is totally implemented in VLSI/ASIC hardware and finds use in spacecraft systems and other communications systems that operate according to CCSDS and CCSDS-like protocols. The service processor performs the traditional functions of data extraction at very high data and packet rates.

Jason T Dowling↗