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At least 163 records · Page 9

Waveguide-coupled resonator filters on AlN on silicon

In the effort to continually reduce the size and cost of wireless communications products the level of integration has improved dramatically in recent years. In order to reduce future generations of wireless systems to single chip form, there is a need for on-chip filtering capabilities. In this paper, the first report of an experimental waveguide-coupled resonator filter for cellular radio applications is presented. Measured results indicate a typical insertion loss of 26 dB at a center frequency of 132 MHz using a 2 um AlN film on (001) less than 110 greater than Si. In addition, a laser probe analysis has been conducted and a theoretical analysis of the first order reflection coefficients is presented.

Liaw, H. M.↗

Integration of Passive Components for Spacecraft Avionics

The NASA roadmap outlining future deep space missions to Europa and other outer planetary destinations calls for continued reductions in the mass and volume of the spacecraft avionics. Spacecraft power electronics, including the power switches and converters, remain difficult to miniaturize due to the need for large numbers of discrete passive components such as resistors, capacitors, inductors and transformers. As part of the System-on-a-chip program at the Center for Integrated Space Microsystems and at the University of Arkansas, we are working to develop integrated or embedded passive components geared specifically for use in power management and distribution (PMAD) in future avionics over the next five to ten years. This will not only enable a scaling down of the power subsystems, but will make possible new architectures such as "distributed" PMAD. Additional information is contained in the original extended abstract.

Brandon, E. J.↗

Ultra Low Power, Radiation Tolerant UHF Radio Technologies for In Situ Communication Applications

For future deep space missions, significant reductions in the mass and power requirements for short-range telecommunication systems will be critical in enabling a wide variety of new mission concepts. These possibilities include penetrators, gliders, miniature rovers, and sensor networks. Under joint funding from NASA's Cross Enterprise and JPL's Telecommunications and Mission technology programs, recent development activity has focused on the design of ultralow mass and power transceiver systems and subsystems suitable for operation in a flight environment. For these efforts, the functionality of the transceiver has been targeted towards a specific Mars communications scenario. However, the overall architecture is well suited to any short or medium range application where a remote probe will aperiodically communicate with a base station, possibly an orbiter, for the eventual purpose of relaying science information back to Earth. In 2001, these sponsors have been augmented with collaborative expertise and funding from JPL's Center for Integrated Space Microsystems in order to migrate existing concepts and designs to a System on a Chip (SOAC) solution. Additional information is contained in the original extended abstract.

Lay, N. E.↗

Electrically Isolating Thermally Coupled Device for Noise Suppression of Circuits in Deep Space

Mixed mode rad hard avionics Systems on a Chip (SoC) designed for deep space applications such as Europa orbiters and Europa Landers will require data isolation circuits to block noise. This paper presents the simulation performance for a novel rad hard SOI CMOS compatible thermal transducer used for on-chip data isolation in SoC. The research presented involves the use of commercially available computer aided design tools to model the transient electrothermal behavior of the transducer. Both one- and two-dimensional analyses of a prototype thermal transducer were performed. Results indicate that thermal-based data isolator technology can pass a data bit in under a microsecond and, as a measurement of feasibility, I(exp 2)C bus specifications can be met.

Mantooth, A.↗

High Electron Mobility Transistor Structures on Sapphire Substrates Using CMOS Compatible Processing Techniques

System-on-a-chip (SOC) processes are under intense development for high-speed, high frequency transceiver circuitry. As frequencies, data rates, and circuit complexity increases, the need for substrates that enable high-speed analog operation, low-power digital circuitry, and excellent isolation between devices becomes increasingly critical. SiGe/Si modulation doped field effect transistors (MODFETs) with high carrier mobilities are currently under development to meet the active RF device needs. However, as the substrate normally used is Si, the low-to-modest substrate resistivity causes large losses in the passive elements required for a complete high frequency circuit. These losses are projected to become increasingly troublesome as device frequencies progress to the Ku-band (12 - 18 GHz) and beyond. Sapphire is an excellent substrate for high frequency SOC designs because it supports excellent both active and passive RF device performance, as well as low-power digital operations. We are developing high electron mobility SiGe/Si transistor structures on r-plane sapphire, using either in-situ grown n-MODFET structures or ion-implanted high electron mobility transistor (HEMT) structures. Advantages of the MODFET structures include high electron mobilities at all temperatures (relative to ion-implanted HEMT structures), with mobility continuously improving to cryogenic temperatures. We have measured electron mobilities over 1,200 and 13,000 sq cm/V-sec at room temperature and 0.25 K, respectively in MODFET structures. The electron carrier densities were 1.6 and 1.33 x 10(exp 12)/sq cm at room and liquid helium temperature, respectively, denoting excellent carrier confinement. Using this technique, we have observed electron mobilities as high as 900 sq cm/V-sec at room temperature at a carrier density of 1.3 x 10(exp 12)/sq cm. The temperature dependence of mobility for both the MODFET and HEMT structures provides insights into the mechanisms that allow for enhanced electron mobility as well as the processes that limit mobility, and will be presented.

Mueller, Carl↗

Mass Spectrometry for Planetary Probes: Past, Present and Future

Atmospheric entry probes present a unique opportunity for performing quantitative analysis of extra-terrestrial atmospheres in cases where remote sensing alone may not be sufficient and measurements with balloons or aircraft is not practical. An entry probe can provide a complete vertical profile of atmospheric parameters including chemical composition, which cannot be obtained with most other techniques. There are, however, unique challenges associated with building instruments for an entry probe, as compared to orbiters, landers, or rovers. Conditions during atmospheric entry are extreme, there are inherent time constraints due to the short duration of the experiment, and the instrument experiences rapid environmental changes in temperature and pressure as it descends. In addition, there are resource limitations, i.e. mass, power, size and bandwidth. Finally, the demands on the instrument design are determined in large part by conditions (pressure, temperature, composition) unique to the particular body under study, and as a result there is no one-size-fits-all instrument for an atmospheric probe. Many of these requirements can be more easily met by miniaturizing the probe instrument. Our experience building mass spectrometers for atmospheric entry probes leads us to believe that the time is right for a fundamental change in the way spaceflight mass spectrometers are built. The emergence over the past twenty years of Micro-electro- mechanical Systems (MEMS), utilizing lithographic semiconductor fabrication techniques to produce instrument systems in miniature, holds great promise for application to spaceflight mass spectrometry. A highly miniaturized, high performance and low-power mass spectrometer would be an enormous benefit to future entry probe missions, allowing, for example, parallel measurements (e.g., multiple simultaneous gas chromatographic analyses and direct atmospheric leaks.) Such an instrument would also enable mass spectrometry on board small multiple entry probes. In the development of a MEMS Mass Spectrometer, the challenge facing us is to move beyond the proof-of-concept, where research dollars tend to focus, and carry out the detailed work of developing a high performance mass spectrometer system on a chip which meets the unique technical requirements for an atmospheric entry probe described above.

Niemann, Hasso B.↗

Reconfigurable, Bi-Directional Flexfet Level Shifter for Low-Power, Rad-Hard Integration

Two prototype Reconfigurable, Bi-directional Flexfet Level Shifters (ReBiLS) have been developed, where one version is a stand-alone component designed to interface between external low voltage and high voltage, and the other version is an embedded integrated circuit (IC) for interface between internal low-voltage logic and external high-voltage components. Targeting stand-alone and embedded circuits separately allows optimization for these distinct applications. Both ReBiLS designs use the commercially available 180-nm Flex fet Independently Double-Gated (IDG) SOI CMOS (silicon on insulator, complementary metal oxide semiconductor) technology. Embedded ReBiLS circuits were integrated with a Reed-Solomon (RS) encoder using CMOS Ultra-Low-Power Radiation Tolerant (CULPRiT) double-gated digital logic circuits. The scope of the project includes: creation of a new high-voltage process, development of ReBiLS circuit designs, and adjustment of the designs to maximize performance through simulation, layout, and manufacture of prototypes. The primary technical objectives were to develop a high-voltage, thick oxide option for the 180-nm Flexfet process, and to develop a stand-alone ReBiLS IC with two 8-channel I/O busses, 1.8 2.5 I/O on the low-voltage pins, 5.0-V-tolerant input and 3.3-V output I/O on the high-voltage pins, and 100-MHz minimum operation with 10-pF external loads. Another objective was to develop an embedded, rad-hard ReBiLS I/O cell with 0.5-V low-voltage operation for interface with core logic, 5.0-V-tolerant input and 3.3-V output I/O pins, and 100-MHz minimum operation with 10- pF external loads. A third objective was to develop a 0.5- V Reed-Solomon Encoder with embedded ReBilS I/O: Transfer the existing CULPRiT RS encoder from a 0.35-micron bulk-CMOS process to the ASI 180-nm Flexfet, rad-hard SOI Process. 0.5-V low-voltage core logic. 5.0-V-tolerant input and 3.3-V output I/O pins. 100-MHz minimum operation with 10- pF external loads. The stand-alone ReBiLS chip will allow system designers to provide efficient bi-directional communication between components operating at different voltages. Embedding the ReBiLS cells into the proven Reed-Solomon encoder will demonstrate the ability to support new product development in a commercially viable, rad-hard, scalable 180-nm SOI CMOS process.

DeGregorio, Kelly↗

Fault Tolerance in ZigBee Wireless Sensor Networks

Wireless sensor networks (WSN) based on the IEEE 802.15.4 Personal Area Network standard are finding increasing use in the home automation and emerging smart energy markets. The network and application layers, based on the ZigBee 2007 PRO Standard, provide a convenient framework for component-based software that supports customer solutions from multiple vendors. This technology is supported by System-on-a-Chip solutions, resulting in extremely small and low-power nodes. The Wireless Connections in Space Project addresses the aerospace flight domain for both flight-critical and non-critical avionics. WSNs provide the inherent fault tolerance required for aerospace applications utilizing such technology. The team from Ames Research Center has developed techniques for assessing the fault tolerance of ZigBee WSNs challenged by radio frequency (RF) interference or WSN node failure.

Alena, Richard↗

COTS MEMS Flow-Measurement Probes

As an alternative to conventional tubing instrumentation for measuring airflow, designers and technicians at Glenn Research Center have been fabricating packaging components and assembling a set of unique probes that contain commercial off-the-shelf (COTS) microelectromechanical systems (MEMS) sensor chips. MEMS sensor chips offer some compelling advantages over standard macroscopic measurement devices. MEMS sensor technology has matured through mass production and use in the automotive and aircraft industries. At present, MEMS are the devices of choice for sensors in such applications as tire-pressure monitors, altimeters, pneumatic controls, cable leak detectors, and consumer appliances. Compactness, minimality of power demand, rugged construction, and moderate cost all contribute to making MEMS sensors attractive for instrumentation for future research. Conventional macroscopic flow-measurement instrumentation includes tubes buried beneath the aerodynamic surfaces of wind-tunnel models or in wind-tunnel walls. Pressure is introduced at the opening of each such tube. The pressure must then travel along the tube before reaching a transducer that generates an electronic signal. The lengths of such tubes typically range from 20 ft (approx.= 6 m) to hundreds of feet (of the order of 100 m). The propagation of pressure signals in the tubes damps the signals considerably and makes it necessary to delay measurements until after test rigs have reached steady-state operation. In contrast, a MEMS pressure sensor that generates electronic output can take readings continuously under dynamic conditions in nearly real time. In order to use stainless-steel tubing for pressure measurements, it is necessary to clean many tubes, cut them to length, carefully install them, delicately deburr them, and splice them. A cluster of a few hundred 1/16-in.- (approx.=1.6-mm-) diameter tubes (such clusters are common in research testing facilities) can be several inches (of the order of 10 cm) in diameter and could weigh enough that two technicians are needed to handle it. Replacing hard tubing with electronic chips can eliminate much of the bulk. Each sensor would fit on the tip of a 1/16-in. tube with room to spare. The Lucas NovaSensor P592 piezoresistive silicon pressure sensor was chosen for this project because of its cost, availability, and tolerance to extreme ambient conditions. The sensor chip is 1 mm square by 0.6 mm thick (about 0.039 by 0.039 by 0.024 in.) and includes 0.12-mm (approx.=0.005-in.) wire connection tabs. The figure shows a flow-angularity probe that was built by use of three such MEMS chips. It is planned to demonstrate this MEMS probe as an alternative to a standard tube-type "Cobra" probe now used routinely in wind tunnels and aeronautical hardware. This MEMS probe could be translated across a flow field by use of a suitable actuator, so that its accuracy and the shortness of its response time could be exploited to obtain precise dynamic measurements of a sort that cannot be made by use of conventional tubing-based instrumentation.

Redding, Chip↗

Integrated power passives

A multi-layer film-stack and method for forming the multilayer film-stack is given where a series of alternating layers of conducting and dielectric materials are deposited such that the conducting layers can be selectively addressed. The use of the method to form integratable high capacitance density capacitors and complete the formation of an integrated power system-on-a-chip device including transistors, conductors, inductors, and capacitors is also given.

Xie, Huikai↗

A 0.18 micrometer CMOS Thermopile Readout ASIC Immune to 50 MRAD Total Ionizing Dose (SI) and Single Event Latchup to 174MeV-cm(exp 2)/mg

Radiation hardened by design (RHBD) techniques allow commercial CMOS circuits to operate in high total ionizing dose and particle fluence environments. Our radiation hard multi-channel digitizer (MCD) ASIC (Figure 1) is a versatile analog system on a chip (SoC) fabricated in 180nm CMOS. It provides 18 chopper stabilized amplifier channels, a 16- bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The MCD was evaluated at Goddard Space Flight Center and Texas A&M University's radiation effects facilities and found to be immune to single event latchup (SEL) and total ionizing dose (TID) at 174 MeV-cm(exp 2)/mg and 50 Mrad (Si) respectively.

radiation hardened by design↗

Effects of Angular Frequency During Clinorotation on Mesenchymal Stem Cell Morphology and Migration

Background/Objectives: Ground-based microgravity simulation can reproduce the apparent effects of weightlessness in spaceflight using clinostats that continuously reorient the gravity vector on a specimen, creating a time-averaged nullification of gravity. In this work, we investigated the effects of clinorotation speed on the morphology, cytoarchitecture, and migration behavior of human mesenchymal stem cells (hMSCs). Methods: We compared cell responses at clinorotation speeds of 0, 30, 60, and 75 rpm over 8 hours in a recently developed lab-on-chip-based clinostat system. Time lapse light microscopy was used to visualize changes in cell morphology during and after cessation of clinorotation. Cytoarchitecture was assessed by actin and vinculin staining, and chemotaxis was examined using time lapse light microscopy of cells in NGF (100 ng/ml) gradients. Results: Among clinorotated groups, cell area distributions indicated a greater inhibition of cell spreading with higher angular frequency (p is less than 0.005), though average cell area at 30 rpm after 8 hours became statistically similar to control (p = 0.794). Cells at 75rpm clinorotation remained viable and were able to re-spread after clinorotation. In chemotaxis chambers clinorotation did not alter migration patterns in elongated cells, but most clinorotated cells exhibited cell retraction, which strongly compromised motility.

microgravity↗

Preliminary Radiation Testing of a State-of-the-Art Commercial 14nm CMOS Processor/System-on-a-Chip

Hardness assurance test results of Intel state-of-the-art 14nm “Broadwell” U-series processor / System-on-a-Chip (SoC) for total ionizing dose (TID) are presented, along with exploratory results from trials at a medical proton facility. Test method builds upon previous efforts [1] by utilizing commercial laptop motherboards and software stress applications as opposed to more traditional automated test equipment (ATE).

microprocessor↗

Reconfigurable Very Long Instruction Word (VLIW) Processor

Future NASA missions will depend on radiation-hardened, power-efficient processing systems-on-a-chip (SOCs) that consist of a range of processor cores custom tailored for space applications. Aries Design Automation, LLC, has developed a processing SOC that is optimized for software-defined radio (SDR) uses. The innovation implements the Institute of Electrical and Electronics Engineers (IEEE) RazorII voltage management technique, a microarchitectural mechanism that allows processor cores to self-monitor, self-analyze, and selfheal after timing errors, regardless of their cause (e.g., radiation; chip aging; variations in the voltage, frequency, temperature, or manufacturing process). This highly automated SOC can also execute legacy PowerPC 750 binary code instruction set architecture (ISA), which is used in the flight-control computers of many previous NASA space missions. In developing this innovation, Aries Design Automation has made significant contributions to the fields of formal verification of complex pipelined microprocessors and Boolean satisfiability (SAT) and has developed highly efficient electronic design automation tools that hold promise for future developments.

Velev, Miroslav N.↗

Proton Testing of AMD Ryzen 3 2200G Microprocessors

Single-Event Effects (SEE) testing was conducted on the AMD Ryzen 3 2200G microprocessor with integrated graphics. Testing was conducted at Massachusetts General Hospital's (MGH) Francis H. Burr Proton Therapy Center on June 2nd, 2019.

radiation tesing↗

A Low-Power High-Speed Smart Sensor Design for Space Exploration Missions

In this paper, an ultra-fast low-power smart vision system-on-a-chip design is proposed to provide effective solutions for real time machine vision applications by taking advantages of advances in integrated sensing/processing designs, electronic neural networks, advanced microprocessors, and sub-micron VLSI systemns-on-a-chip (SOAC) technology.

space↗

A GNSS Receiver for Small-Sats Enabling Precision POD, Radio Occultations and Reflections

A low cost, low power, and low mass GNSS receiver (called Cion) has been developed and is currently flying on the CICERO cubesats. The receiver was designed in less than a year by JPL for Tyvak and GeoOptics for use in the GeoOptics CICERO constellation and leverages 25 years of JPL GNSS reciever design experience. Cion uses a commercial off-the-shelf (COTS) computer along with existing space qualified RF down-converters, software, and firmware to produce atmospheric Radio Occultation (RO) data. By combining a FPGA with dual core ARM processor and an embedded system controller, the Xilinx Zynq processor is an enabling technology that provides a customizable digital signal processing platform integrated into the computer (System on a chip) and enables off-the-shelf hardware to become the main engine behind this software defined radio. Using Linux for the on-board computer allows for fast development times and liberal use of existing open source software libraries. The parts of the receiver that require realtime implementation are performed in the Field Programmable Gate Array (FPGA), which can also be reprogrammed in flight. While the Zynq is not rad hard, the silicon on insulator (SOI) technology is rad tolerant ‘by accident’, allowing for its use in many space-based applications. Early results show that the Cion is working as designed, has demonstrated the first known GLONASS occultations, and obtains high quality atmospheric profiles with excellent lower troposphere penetration (near Earth’s surface).

Young, Larry↗

Radiation specification and testing of heterogenous microprocessor SOCs

Modern commercial microprocessor devices include multiple processor architectures, buses, basic peripherals, and application hardware such as Graphics Processing Units (GPUs) and Digital Signal Processors (DSPs) in one device. Developing RHBD versions of similar devices risks sacrificing processing performance for system-wide radiation requirements. The heterogenous structure of modern commercial system on a chip (SOC) devices, in design and performance goals for subsystems, suggests a similar approach to specifying Radiation Hardened by Design (RHBD) requirements.

Ballast, Jon↗