Search NASA⌕ Search

SEARCH · Search NASA

Results for “500 °C”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

TEM Characterization of Nanostructured Grade 91 Neutron Irradiated to 6 DPA at 300 °C and 500 °C

Previously, samples of coarse grained (CG, grain diameter > 1 µm), ultra-fine grained (UFG, 1 µm> grain diameter> 100 nm), and nanocrystalline (NC, 100 nm> grain diameter) grade 91 steel were neutron irradiated in the Advanced Test Reactor (ATR) at Idaho National Laboratory (INL). Grade 91 is a ferritic/martensitic steel alloy with a nominal composition of Fe-9%Cr-1%Mo by weight, and it is being studied for applications in advanced nuclear reactor designs including as a fuel cladding material in gas cooled reactors. To assess the viability of this alloy for nuclear applications, the role of grain boundary size has not been sufficiently explored as a mechanism for developing radiation-tolerant materials. To achieve an UFG microstructure the material was processed using equal channel angular pressing (ECAP), and the NC microstructure was achieved through high pressure torsion (HPT). Such samples of various geometries for different types of characterization were irradiated to a dose of 6 displacements per atom (DPA) at separate temperature conditions of 300 °C and 500 °C. Thus, there were a total of 6 experimental conditions, three grain sizes (CG, UFG, and NC), each irradiated at two different temperature conditions (300 °C and 500 °C).

36 - MATERIALS SCIENCE↗
DOE OSTI2025

Swelling and Fission Gas Release of U-10Mo and U-17Mo Following Neutron Irradiation at 250 – 500°C

The performance of metallic fuel alloys, U-10Mo and U-17Mo, was examined using the MiniFuel test system in the High Flux Isotope Reactor. Approximately 0.8 mm thick disks were irradiated at target temperatures of 250°C, 350°C, 450°C, and 500°C up to three different fission densities, culminating at a maximum fission density of 6.8 × 10 20 cm −3 . Fission rates decayed from 3 – 6 × 10 13 cm −3 s −1 to 2 – 4 × 10 13 cm −3 s −1 over the course of the longest, eight cycle, irradiation as the 235 U was consumed and the 239 Pu concentration accumulated. Actual irradiation temperature on the last day of irradiation was measured via dilatometry using the SiC passive thermometry recovered from the MiniFuel subcapsules and compared favorably with the thermal calculations using as-built geometry and test conditions. Furthermore, average simulated temperatures were within 50°C of the target temperatures, except for the 500°C irradiation, for which the temperature variation was 62°C, 32°C, and 90°C in the in two, four, and eight cycle irradiations, respectively. Fission gas release (FGR) measurements showed no release above recoil for any U-17Mo fuels or for the U-10Mo fuel irradiated at 250°C. Finally, significant (40%–80%) FGR was found for the medium- to highest-burnup U-10Mo samples irradiated at target temperatures 350°C–500°C. Significant FGR correlated with sample thickness swelling, which was as high as 13%–35% for high-release samples and below 7% for all other (low–gas release) samples.

FGR↗
NASA NTRS2016

Experimentally Observed Electrical Durability of 4H-SiC JFET ICs Operating from 500 C to 700 C

Prolonged 500 degrees Celsius to 700 degrees Celsius electrical testing data from 4H-SiC junction field effect transistor (JFET) integrated circuits (ICs) are combined with post-testing microscopic studies in order to gain more comprehensive understanding of the durability limits of the present version of NASA Glenn's extreme temperature microelectronics technology. The results of this study support the hypothesis that T ≥ 500 degrees Celsius durability-limiting IC failure initiates with thermal-stress-related crack formation where dielectric passivation layers overcoat micron-scale vertical features including patterned metal traces.

high temperature↗
NASA NTRS2004

2.45 GHz Rectenna Designed for Wireless Sensors Operating at 500 C

High temperature wireless sensors that operate at 500 C are required for aircraft engine monitoring and performance improvement These sensors would replace currently used hard-wired sensors and lead to a substantial reduction in mass. However, even if the sensor output data is transmitted wirelessly to a receiver in the cooler part of the engine, and the associated cables are eliminated, DC power cables are still required to operate the sensors and power the wireless circuits. To solve this problem, NASA is developing a rectenna, a circuit that receives RF power and converts it to DC power. The rectenna would be integrated with the wireless sensor, and the RF transmitter that powers the rectenna would be located in the cooler part of the engine. In this way, no cables to or from the sensors are required. Rectennas haw been demonstrated at ambient room temperature, but to date, no high temperature rectennas haw been reported. In this paper, we report the first rectenna designed for 2.45 GHz operation at 500 C. The circuit consists of a microstrip dipole antenna, a stripline impedance matching circuit, and a stripline low pass filter to prevent transmission of higher harmonics created by the rectifying diode fabricated on an Alumina substrate. The rectifying diode is the gate to source junction of a 6H Sic MESFET and the capacitor and load resistor are chip elements that are each bonded to the Alumina substrate. Each element and the hybrid, rectenna circuit haw been characterized through 500 C.

Ponchak, George E.↗
NASA NTRS2017

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Spry, David J.↗
DOE OSTI2024

High temperature stability of regrown and alloyed Ohmic contacts to AlGaN/GaN heterostructure up to 500 °C

This Letter reports the stability of regrown and alloyed Ohmic contacts to AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) for high temperature applications up to 500 °C. Transfer length method (TLM) measurements from 25 to 500 °C in air show that the regrown contacts appear to be stable up to 500 °C during short term (approximately 1 h) testing, while alloyed contacts appear to decrease in contact resistance from 300 to 500 °C though increases in the error bounds due to increase sheet resistance make it difficult to conclude definitely. Additionally, longer term testing shows both technologies remain stable at least up to 48 h at 500 °C, after which the large increase in sheet resistance makes the measurement uncertainty too large to conclude definitively. Advanced microscopy images indicate both the regrown and alloyed contact regions remain structurally intact after prolonged high temperature exposure with no visible degradation in crystallinity or metal composition.

Physics↗
NASA NTRS2017

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Silicon Carbid↗
DOE OSTI2020

High temperature operation to 500 °C of AlGaN graded polarization-doped field-effect transistors

AlGaN polarization-doped field-effect transistors were characterized by DC and pulsed measurements from room temperature to 500 °C in ambient. DC current-voltage characteristics demonstrated only a 70% reduction in on-state current from 25 to 500 °C and full gate modulation, regardless of the operating temperature. Near ideal gate lag measurement was realized across the temperature range that is indicative of a high-quality substrate and sufficient surface passivation. The ability for operation at high temperature is enabled by the high Schottky barrier height from the Ni/Au gate contact, with values of 2.05 and 2.76 eV at 25 and 500 °C, respectively. The high barrier height due to the insulatorlike aluminum nitride layer leads to an ION/IOFF ratio of 1.5 × 10 9 and 6 × 10 3 at room temperature and 500 °C, respectively. Transmission electron microscopy was used to confirm the stability of the heterostructure even after an extended high-temperature operation with only minor interdiffusion of the Ni/Au Schottky contact. The use of refractory metals in all contacts will be key to ensure a stable extended high-temperature operation.

36 MATERIALS SCIENCE↗
NASA NTRSDate not supplied

A 96% Alumina based Packaging System for 500°C Test of SiC Integrated Circuits

With the development of silicon carbide (SiC) sensors and electronic devices for operation at 500°C, compatible packaging technologies are needed for long term high temperature test and deployment of these sensors and electronic devices. 96% Al2O3ceramic is an excellent electrically insulating material with acceptable dielectric constant and low dielectric loss over wide temperature and frequency ranges. This paper presents a packaging system for low power integrated circuits including a prototype 8-I/O chip-level package and printed circuit board (PCB) based on 96% Al2O3ceramic substrates and Au thick-film metallization for 500°C applications. The details related to designs of packages and PCBs, packaging materials, and specific packaging step recipes including wire -bonding and die-attach, are presented. Some test results of this prototype packaging approach applied to SiC integrated circuits at 500°C are reviewed.

High Temperature, Packaging, Alumina, Thick Film↗
NASA NTRS1998

Evaluation of Advanced Solid Lubricant Coatings for Foil Air Bearings Operating at 25 and 500 C

The tribological properties of one chrome oxide and one chrome carbide based solid lubricant coating were evaluated in a partial-arc foil bearing at 25 and 500 C. Start/stop bearing operation up to 20,000 cycles were run under 10 kPa (1.5 psi) static deadweight load. Bearing friction (torque) was measured during the test. Specimen wear and SEM/EDS surface analyses were conducted after testing to understand and elucidate the tribological characteristics observed. The chrome oxide coating which contains both (Ag) and (BaF2/CaF2) for low and high temperature lubrication, exhibited low friction in sliding against Al2O3 coated foils at 25 and 500 C. The chrome carbide coating, which lacked a low temperature lubricant but contained BaF2/CaF2 as a high temperature lubricant, exhibited high friction at 25 C and low friction at 500 C against both bare and Al2O3 coated superalloy foil surfaces. Post test surface analyses suggest that improved tribological performance is exhibited when a lubricant film from the coating transfers to the foil surface.

DellaCorte, Christopher↗
NASA NTRS2018

Yearlong 500 C Operational Demonstration of Up-Scaled 4H-SiC JFET Integrated Circuits

This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fold increase in 500 C-durable circuit complexity from the 24 transistor ring oscillator ICs reported at HiTEC 2016. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for combustion engine sensing and control, planetary exploration, deep-well drilling monitoring, and other harsh-environment applications.

Silicon carbides↗
NASA NTRS2008

Stable Electrical Operation of 6H-SiC JFETs and ICs for Thousands of Hours at 500 C

The fabrication and testing of the first semiconductor transistors and small-scale integrated circuits (ICs) to achieve up to 3000 h of stable electrical operation at 500 C in air ambient is reported. These devices are based on an epitaxial 6H-SiC junction field-effect transistor process that successfully integrated high temperature ohmic contacts, dielectric passivation, and ceramic packaging. Important device and circuit parameters exhibited less than 10% of change over the course of the 500 C operational testing. These results establish a new technology foundation for realizing durable 500 C ICs for combustion-engine sensing and control, deep-well drilling, and other harsh-environment applications.

Neudeck, Philip G.↗
NASA NTRSDate not supplied

Early Burn-In Parasitic Conduction in 500 °C Durable SiC JFET ICs

All prior reports of long-term 500 °C operation of SiC JFET-R ICs have noted the existence of an initial “burn-in” period of changes in measured electrical characteristics for the first few hundred hours oven-testing. This work reports measurements of “burn-in parasitic MOSFET conduction” that can substantially impact the performance of some circuits during initial heat-up of JFET ICs, but then subsequently disappears after a few hours of operation at 500 °C. The behavior appears generally consistent with the known MOS phenomenon of bias-temperature driven redistribution of mobile ionic contamination. Approaches for further mitigating this initial burn-in conduction mechanism are discussed.

silicon carbide↗
NASA NTRSDate not supplied

Early Burn-In Parasitic Conduction in 500 °C Durable SiC JFET ICs

All prior reports of long-term 500 °C operation of SiC JFET-R ICs have noted the existence of an initial “burn-in” period of changes in measured electrical characteristics for the first few hundred hours oven-testing. This work reports measurements of “burn-in parasitic MOSFET conduction” that can substantially impact the performance of some circuits during initial heat-up of JFET ICs, but then subsequently disappears after a few hours of operation at 500 °C.

silicon carbide↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

JFET↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Microelectronics↗