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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records

Asynchronous Communication of TLNS3DMB Boundary Exchange

This paper describes the recognition of implicit serialization due to coarse-grain, synchronous communication and demonstrates the conversion to asynchronous communication for the exchange of boundary condition information in the Thin-Layer Navier Stokes 3-Dimensional Multi Block (TLNS3DMB) code. The implementation details of using asynchronous communication is provided including buffer allocation, message identification, and barrier control. The IBM SP2 was used for the tests presented.

Hammond, Dana P.↗

A formal model of asynchronous communication and its use in mechanically verifying a biphase mark protocol

In this paper we present a formal model of asynchronous communication as a function in the Boyer-Moore logic. The function transforms the signal stream generated by one processor into the signal stream consumed by an independently clocked processor. This transformation 'blurs' edges and 'dilates' time due to differences in the phases and rates of the two clocks and the communications delay. The model can be used quantitatively to derive concrete performance bounds on asynchronous communications at ISO protocol level 1 (physical level). We develop part of the reusable formal theory that permits the convenient application of the model. We use the theory to show that a biphase mark protocol can be used to send messages of arbitrary length between two asynchronous processors. We study two versions of the protocol, a conventional one which uses cells of size 32 cycles and an unconventional one which uses cells of size 18. We conjecture that the protocol can be proved to work under our model for smaller cell sizes and more divergent clock rates but the proofs would be harder.

Moore, J. Strother↗

Computer In The Loop: A Paradigm For Software Augmentation Of Terrestrial Medical Support In Asynchronous Communication Environments

As humans plan for missions beyond the reach of real-time communication supported by terrestrially-based crews (i.e., increasingly earth-independent spaceflight missions), we need to consider how to maximize this effectiveness despite asynchronous communication with Earth. Medical events – especially those involving the sparing of life, limb, or eyesight - often need to be acted on immediately, in real-time. Often the expertise necessary to successfully complete such action covers an enormous range of training that is unrealistic to expect from crews engaged in exploration spaceflight. Thus, the medical support paradigm for asynchronous environments must account for both the limitations and coordinate seamlessly among ground-based expertise, the need for real-time interventions, and the limited crew time and knowledge resources.

D R Levin↗

Asynchronous Communication Scheme For Hypercube Computer

Scheme devised for asynchronous-message communication system for Mark III hypercube concurrent-processor network. Network consists of up to 1,024 processing elements connected electrically as though were at corners of 10-dimensional cube. Each node contains two Motorola 68020 processors along with Motorola 68881 floating-point processor utilizing up to 4 megabytes of shared dynamic random-access memory. Scheme intended to support applications requiring passage of both polled or solicited and unsolicited messages.

Madan, Herb S.↗

Fast Asynchronous Data Communication Via Fiber Optics

Transmitter and receiver devised for asynchronous digital communication via optical fiber at rates above 100 Mb/s. Transmitter converts parallel data to serial for high-speed transmission; receiver recovers clock signal and converts data back to parallel. No phase-lock loops used. New receiver design avoids over-sampling altogether. Local sampling oscillator operating nominally at clock frequency generates N clock signals of equally spaced phase, used to clock incoming data into N separate shift registers.

Bergman, Larry A.↗

Enabling Communication Between Astronauts and Ground Teams for Space Exploration Missions

Over the last four years, Playbook’s Mission Log has evolved to become an enabling capability for analog missions that simulate deep space, exploration missions with communication transmission latency. Playbook is a planning and execution web-application for mission operations, aggregating multiple sources of information for astronauts to execute the mission in one place: timeline, procedures, chat interface. Playbook’s Mission Log provides a multimedia chat software interface with unique features and functionalities that support asynchronous communication between analog astronauts and ground support teams. This paper describes the iterative design the Mission Log has undergone based on user observations and solicited feedback. Key features include indicators that help users cope with asynchronous communication as well as aids that assist teams coordinate work. Future work and capabilities are outlined, which build upon the increased use of the Mission Log as a communication and coordination tool for space exploration.

communication↗

Low latency messages on distributed memory multiprocessors

Many of the issues in developing an efficient interface for communication on distributed memory machines are described and a portable interface is proposed. Although the hardware component of message latency is less than one microsecond on many distributed memory machines, the software latency associated with sending and receiving typed messages is on the order of 50 microseconds. The reason for this imbalance is that the software interface does not match the hardware. By changing the interface to match the hardware more closely, applications with fine grained communication can be put on these machines. Based on several tests that were run on the iPSC/860, an interface that will better match current distributed memory machines is proposed. The model used in the proposed interface consists of a computation processor and a communication processor on each node. Communication between these processors and other nodes in the system is done through a buffered network. Information that is transmitted is either data or procedures to be executed on the remote processor. The dual processor system is better suited for efficiently handling asynchronous communications compared to a single processor system. The ability to send data or procedure is very flexible for minimizing message latency, based on the type of communication being performed. The test performed and the proposed interface are described.

Rosing, Matthew↗

Reliable communication in the presence of failures

The design and correctness of a communication facility for a distributed computer system are reported on. The facility provides support for fault-tolerant process groups in the form of a family of reliable multicast protocols that can be used in both local- and wide-area networks. These protocols attain high levels of concurrency, while respecting application-specific delivery ordering constraints, and have varying cost and performance that depend on the degree of ordering desired. In particular, a protocol that enforces causal delivery orderings is introduced and shown to be a valuable alternative to conventional asynchronous communication protocols. The facility also ensures that the processes belonging to a fault-tolerant process group will observe consistant orderings of events affecting the group as a whole, including process failures, recoveries, migration, and dynamic changes to group properties like member rankings. A review of several uses for the protocols is the ISIS system, which supports fault-tolerant resilient objects and bulletin boards, illustrates the significant simplification of higher level algorithms made possible by our approach.

Birman, Kenneth P.↗

A Methodology for the Design and Verification of Globally Asynchronous/Locally Synchronous Architectures

Recent advanced in model-checking have made it practical to formally verify the correctness of many complex synchronous systems (i.e., systems driven by a single clock). However, many computer systems are implemented by asynchronously composing several synchronous components, where each component has its own clock and these clocks are not synchronized. Formal verification of such Globally Asynchronous/Locally Synchronous (GA/LS) architectures is a much more difficult task. In this report, we describe a methodology for developing and reasoning about such systems. This approach allows a developer to start from an ideal system specification and refine it along two axes. Along one axis, the system can be refined one component at a time towards an implementation. Along the other axis, the behavior of the system can be relaxed to produce a more cost effective but still acceptable solution. We illustrate this process by applying it to the synchronization logic of a Dual Fight Guidance System, evolving the system from an ideal case in which the components do not fail and communicate synchronously to one in which the components can fail and communicate asynchronously. For each step, we show how the system requirements have to change if the system is to be implemented and prove that each implementation meets the revised system requirements through modelchecking.

Miller, Steven P.↗

Asynchronous file transfer to IBM PC's

The Asynchronous File Transfer System is used for interactively selecting and tramsmitting text files from the Langley Research Center's Business Data Systems Division (BDSD) host processor to an IBM Personal Computer. The IBM asynchronous communications support package is used for handling the communications on the personal computer. An application program (NATURAL, COBOL, etc.) is used for selecting and formatting the records to be transmitted, and three subroutine modules residing on the BDSD host processor are used for interfacing the application program and the communications software. Each record transmitted to the Personal Computer must be in the standard ASCII format. This record format is directly accessible by BASIC and many of the personal computer software packages provide utility programs for converting them to the format required for the particular package in question.

Hoerger, J.↗

A formal language for the specification and verification of synchronous and asynchronous circuits

A formal hardware description language for the intended application of verifiable asynchronous communication is described. The language is developed within the logical framework of the Nqthm system of Boyer and Moore and is based on the event-driven behavioral model of VHDL, including the basic VHDL signal propagation mechanisms, the notion of simulation deltas, and the VHDL simulation cycle. A core subset of the language corresponds closely with a subset of VHDL and is adequate for the realistic gate-level modeling of both combinational and sequential circuits. Various extensions to this subset provide means for convenient expression of behavioral circuit specifications.

Russinoff, David M.↗

CIFO 3.0

The Ada Runtime Environment Working Group has, since 1985, developed and published the Catalog of Interface Features and Options (CFIO) for Ada runtime environments. These interfaces, expressed in legal Ada, provide 'hooks' into the runtime system to export both functionality and enhanced performance beyond that of 'vanilla' Ada implementations. Such enhancements include high- and low-level scheduling control, asynchronous communications facilities, predictable storage management facilities, and fast interrupt response. CIFO 3.0 represents the latest release, which incorporates the efforts of the European real time community as well as new interfaces and expansions of previous catalog entries. This presentation will give both an overview of the Catalog's contents and an 'insider's' view of the Catalog as a whole.

Rogers, Pat↗

Specification and verification of gate-level VHDL models of synchronous and asynchronous circuits

We present a mathematical definition of hardware description language (HDL) that admits a semantics-preserving translation to a subset of VHDL. Our HDL includes the basic VHDL propagation delay mechanisms and gate-level circuit descriptions. We also develop formal procedures for deriving and verifying concise behavioral specifications of combinational and sequential devices. The HDL and the specification procedures have been formally encoded in the computational logic of Boyer and Moore, which provides a LISP implementation as well as a facility for mechanical proof-checking. As an application, we design, specify, and verify a circuit that achieves asynchronous communication by means of the biphase mark protocol.

Russinoff, David M.↗

An Analysis of Performance Enhancement Techniques for Overset Grid Applications

The overset grid methodology has significantly reduced time-to-solution of high-fidelity computational fluid dynamics (CFD) simulations about complex aerospace configurations. The solution process resolves the geometrical complexity of the problem domain by using separately generated but overlapping structured discretization grids that periodically exchange information through interpolation. However, high performance computations of such large-scale realistic applications must be handled efficiently on state-of-the-art parallel supercomputers. This paper analyzes the effects of various performance enhancement techniques on the parallel efficiency of an overset grid Navier-Stokes CFD application running on an SGI Origin2000 machine. Specifically, the role of asynchronous communication, grid splitting, and grid grouping strategies are presented and discussed. Results indicate that performance depends critically on the level of latency hiding and the quality of load balancing across the processors.

Djomehri, J. J.↗

Performance Enhancement Strategies for Multi-Block Overset Grid CFD Applications

The overset grid methodology has significantly reduced time-to-solution of highfidelity computational fluid dynamics (CFD) simulations about complex aerospace configurations. The solution process resolves the geometrical complexity of the problem domain by using separately generated but overlapping structured discretization grids that periodically exchange information through interpolation. However, high performance computations of such large-scale realistic applications must be handled efficiently on state-of-the-art parallel supercomputers. This paper analyzes the effects of various performance enhancement strategies on the parallel efficiency of an overset grid Navier-Stokes CFD application running on an SGI Origin2000 machinc. Specifically, the role of asynchronous communication, grid splitting, and grid grouping strategies are presented and discussed. Details of a sophisticated graph partitioning technique for grid grouping are also provided. Results indicate that performance depends critically on the level of latency hiding and the quality of load balancing across the processors.

Djomehri, M. Jahed↗

Training for Mars

Spaceflight training for Apollo era and Space Shuttle missions was designed to train crew on specific tasks for their short duration missions. The training mottos included "practice, practice, practice" and "hammering it in." However, training for longer duration ISS (International Space Station) missions has been more challenging. There is clear documentation that tasks and skills trained pre-flight are not all retained throughout the mission, and this lack of training retention is augmented with real-time ground support. NASA does not currently have a training design that supports semi-autonomous to autonomous mission operations. The current design of a manned Mars mission calls for a 32-month long mission and asynchronous communication involving long delays.

Barshi, Immanuel↗