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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS2010

High-Speed Ring Bus

The high-speed ring bus at the Jet Propulsion Laboratory (JPL) allows for future growth trends in spacecraft seen with future scientific missions. This innovation constitutes an enhancement of the 1393 bus as documented in the Institute of Electrical and Electronics Engineers (IEEE) 1393-1999 standard for a spaceborne fiber-optic data bus. It allows for high-bandwidth and time synchronization of all nodes on the ring. The JPL ring bus allows for interconnection of active units with autonomous operation and increased fault handling at high bandwidths. It minimizes the flight software interface with an intelligent physical layer design that has few states to manage as well as simplified testability. The design will soon be documented in the AS-1393 standard (Serial Hi-Rel Ring Network for Aerospace Applications). The framework is designed for "Class A" spacecraft operation and provides redundant data paths. It is based on "fault containment regions" and "redundant functional regions (RFR)" and has a method for allocating cables that completely supports the redundancy in spacecraft design, allowing for a complete RFR to fail. This design reduces the mass of the bus by incorporating both the Control Unit and the Data Unit in the same hardware. The standard uses ATM (asynchronous transfer mode) packets, standardized by ITU-T, ANSI, ETSI, and the ATM Forum. The IEEE-1393 standard uses the UNI form of the packet and provides no protection for the data portion of the cell. The JPL design adds optional formatting to this data portion. This design extends fault protection beyond that of the interconnect. This includes adding protection to the data portion that is contained within the Bus Interface Units (BIUs) and by adding to the signal interface between the Data Host and the JPL 1393 Ring Bus. Data transfer on the ring bus does not involve a master or initiator. Following bus protocol, any BIU may transmit data on the ring whenever it has data received from its host. There is no centralized arbitration or bus granting. The JPL design provides for autonomous synchronization of the nodes on the ring bus. An address-synchronous latency adjust buffer (LAB) has been designed that cannot get out of synchronization and needs no external input. Also, a priority-driven cable selection behavior has been programmed into each unit on the ring bus. This makes the bus able to connect itself up, according to a maximum redundancy priority system, without the need for computer intervention at startup. Switching around a failed or switched-off unit is also autonomous. The JPL bus provides a map of all the active units for the host computer to read and use for fault management. With regard to timing, this enhanced bus recognizes coordinated timing on a spacecraft as critical and addresses this with a single source of absolute and relative time, which is broadcast to all units on the bus with synchronization maintained to the tens of nanoseconds. Each BIU consists of up to five programmable triggers, which may be programmed for synchronization of events within the spacecraft of instrument. All JPL-formatted data transmitted on the ring bus are automatically time-stamped.

Wysocky, Terry↗
NASA NTRS2001

Determination of an Optimal Commercial Data Bus Architecture for a Flight Data System

NASA/Marshall Space Flight Center (MSFC) is continually looking for methods to reduce cost and schedule while keeping the quality of work high. MSFC is NASA's lead center for space transportation and microgravity research. When supporting NASA's programs several decisions concerning the avionics system must be made. Usually many trade studies must be conducted to determine the best ways to meet the customer's requirements. When deciding the flight data system, one of the first trade studies normally conducted is the determination of the data bus architecture. The schedule, cost, reliability, and environments are some of the factors that are reviewed in the determination of the data bus architecture. Based on the studies, the data bus architecture could result in a proprietary data bus or a commercial data bus. The cost factor usually removes the proprietary data bus from consideration. The commercial data bus's range from Versa Module Eurocard (VME) to Compact PCI to STD 32 to PC 104. If cost, schedule and size are prime factors, VME is usually not considered. If the prime factors are cost, schedule, and size then Compact PCI, STD 32 and PC104 are the choices for the data bus architecture. MSFC's center director has funded a study from his discretionary fund to determine an optimal low cost commercial data bus architecture. The goal of the study is to functionally and environmentally test Compact PCI, STD 32 and PC 104 data bus architectures. This paper will summarize the results of the data bus architecture study.

Crawford, Kevin↗
NASA NTRS1988

DATAC bus monitor

The Digital Autonomous Terminal Access Communications (DATAC) bus is a multiple transmitter data bus developed to interconnect various aircraft systems. A typical DATAC bus installation for the NASA B-737 aircraft is shown. A bus monitor unit was developed for the DATAC data bus. The bus monitor unit consists of two systems: A Zilog Z8002 based S100 bus microcomputer system that connects to a DATAC terminal and receives data appearing on the bus, and an IMB PC-compatible computer used to display and interpret that data. Test results of the existing bus monitor have indicated areas for improvement. The most obvious improvement is to increase the speed of the data transfers between the S100 and the MS-DOS systems.

Novacki, Stanley M., III↗
NASA NTRS1995

A decentralized software bus based on IP multicas ting

We describe decentralized reconfigurable implementation of a conference management system based on the low-level Internet Protocol (IP) multicasting protocol. IP multicasting allows low-cost, world-wide, two-way transmission of data between large numbers of conferencing participants through the Multicasting Backbone (MBone). Each conference is structured as a software bus -- a messaging system that provides a run-time interconnection model that acts as a separate agent (i.e., the bus) for routing, queuing, and delivering messages between distributed programs. Unlike the client-server interconnection model, the software bus model provides a level of indirection that enhances the flexibility and reconfigurability of a distributed system. Current software bus implementations like POLYLITH, however, rely on a centralized bus process and point-to-point protocols (i.e., TCP/IP) to route, queue, and deliver messages. We implement a software bus called the MULTIBUS that relies on a separate process only for routing and uses a reliable IP multicasting protocol for delivery of messages. The use of multicasting means that interconnections are independent of IP machine addresses. This approach allows reconfiguration of bus participants during system execution without notifying other participants of new IP addresses. The use of IP multicasting also permits an economy of scale in the number of participants. We describe the MULITIBUS protocol elements and show how our implementation performs better than centralized bus implementations.

Callahan, John R.↗
NASA NTRS2003

Network Extender for MIL-STD-1553 Bus

An extender system for MIL-STD-1553 buses transparently couples bus components at multiple developer sites. The bus network extender is a relatively inexpensive system that minimizes the time and cost of integration of avionic systems by providing a convenient mechanism for early testing without the need to transport the usual test equipment and personnel to an integration facility. This bus network extender can thus alleviate overloading of the test facility while enabling the detection of interface problems that can occur during the integration of avionic systems. With this bus extender in place, developers can correct and adjust their own hardware and software before products leave a development site. Currently resident at Johnson Space Center, the bus network extender is used to test the functionality of equipment that, although remotely located, is connected through a MILSTD- 1553 bus. Inasmuch as the standard bus protocol for avionic equipment is that of MIL-STD-1553, companies that supply MIL-STD-1553-compliant equipment to government or industry and that need long-distance communication support might benefit from this network bus extender

Marcus, Julius↗
NASA NTRS1982

Test program to develop vibroacoustics test criteria for the Galileo bus

In order to define random vibration test requirements for Galileo bus-mounted hardware, an extensive vibroacoustics test program was conducted on hardware available from the previous Voyager spacecraft development program. The Galileo test program consisted of acoustic tests on three configurations of the Voyager Dynamic Test Model bus and shaker random vibration tests on two flight-like bus equipment bay assemblies and one dummy equipment bay assembly. The primary goal of the acoustic tests was to define vibration levels at locations on the bus structure representative of inputs to bus equipment bay assemblies and to obtain response data on bus bay subassemblies for correlation with the vibration tests response data. The primary purpose of the vibration tests was to determine if the vibration tests excited subassembly responses at least as severely as the bus acoustic tests.

Kern, D. L.↗
NASA NTRS2003

A High Efficiency DC Bus Regulator/RPC for Spacecraft Applications

DC bus voltage regulation may be required in future high powered spacecraft due to the length of the busses or because they are not generated at precise voltage levels. In these cases the regulation range is often only a few percent increase or decrease, but conventional DC voltage regulators switch all the power passing through them, and this level of power switched determines the size and losses in the regulator. A recently developed concept used a low power DC-DC converter in series with the bs to raise or lower the bus voltage over a small range. This partial power processing technique combines the small size and power losses of the low power converter with the ability to regulate, (over a small range) a high power bus. The Series Connected Buck Boost Regulator (SCBBR) described herein provides bus regulation with an efficiency of 98%. The circuit also provides bus switching and overcurrent limiting functions of a Remote Power Controller (RPC). This paper described the circuit design and performance of a breadboard SCBBR configured as a bus voltage regulator providing plus of minus 40% voltage regulation range, bus switching, and overload limiting.

Birchenough, Arthur G.↗
NASA NTRS1979

Forecast analysis of optical waveguide bus performance

Elements to be considered in the design of a data bus include: architecture; data rate; modulation, encoding, detection; power distribution requirements; protocol, work structure; bus reliability, maintainability; interterminal transmission medium; cost; and others specific to application. Fiber- optic data bus considerations for a 32 port transmissive star architecture, are discussed in a tutorial format. General optical-waveguide bus concepts, are reviewed. The electrical and optical performance of a 32 port transmissive star bus, and the effects of temperature on the performance of optical-waveguide buses are examined. A bibliography of pertinent references and the bus receiver test results are included.

Ledesma, R.↗
NASA NTRS1982

Systems evaluation of thermal bus concepts

Thermal bus concepts, to provide a centralized thermal utility for large, multihundred kilowatt space platforms, were studied and the results are summarized. Concepts were generated, defined, and screened for inclusion in system level thermal bus trades. Parametric trade studies were conducted in order to define the operational envelope, performance, and physical characteristics of each. Two concepts were selected as offering the most promise for thermal bus development. All of four concepts involved two phase flow in order to meet the required isothermal nature of the thermal bus. Two of the concepts employ a mechanical means to circulate the working fluid, a liquid pump in one case and a vapor compressor in another. Another concept utilizes direct osmosis as the driving force of the thermal bus. The fourth concept was a high capacity monogroove heat pipe. After preliminary sizing and screening, three of these concepts were selected to carry into the trade studies. The monogroove heat pipe concept was deemed unsuitable for further consideration because of its heat transport limitations. One additional concept utilizing capillary forces to drive the working fluid was added. Parametric system level trade studies were performed. Sizing and weight calculations were performed for thermal bus sizes ranging from 5 to 350 kW and operating temperatures in the range of 4 to 120 C. System level considerations such as heat rejection and electrical power penalties and interface temperature losses were included in the weight calculations.

Stalmach, D. D.↗
NASA NTRS2007

1393 Ring Bus at JPL: Description and Status

Completed Ring Bus IC V&V Phase - Ring Bus Test Plan Completed for SIM Project - Applicable to Other Projects Implemented a Avionics Bus Based upon the IEEE 1393 Standard - Excellent Starting Point for a General Purpose High-Speed Spacecraft Bus - Designed to Meet SIM Requirements for - Real-time deterministic, distributed systems. - Control system requirements - Fault detection and recovery Other JPL Projects Considering Implementation F'light Software Ring Bus Driver Module Began in 2006, Continues Participating in Standard Revision. Search for Earth-like planets orbiting nearby stars and measure the masses and orbits of the planets it finds. Survey 2000 nearby stars for planetary systems to learn whether our Solar System is unusual, or typical. Make a new catalog of star position 100 times more accurate than current measurements. Learn how our galaxy formed and will evolve by studying the dynamics of its stars. Critically test models of exactly how stars shine, including exotic objects like black holes, neutron stars and white dwarfs.

time synchronization↗
NASA NTRS1973

Data bus system development program

Two data bus systems were designed fabricated, Data Bus System I and Data Bus System II. The technical features of the delivered hardware include the following: (1) 5 MHz selfclocking data bus; (2) bidirectional communications utilizing Manchester Code at data rates in excess of 20,000 words per second; (3) utilization of MSI COS/MOS technology (4) probability of accepting an erroneous data bit less than 1 in 10 to the 25th power (5) low power consumption (50 to 1 reduction in quiescent current over P/MOS) (6) compatibility with projected high density packaging. Three distinct types of data bus remote terminals were developed: the subsystem interface unit, the combination of an electronic interface unit and a standard interface unit-serial, and an SIU/Preprocessor.

Harrison, J. S. J.↗
NASA NTRS1979

TMS communications software. Volume 2: Bus interface unit

A data bus communication system to support the space shuttle's Trend Monitoring System (TMS) and to provide a basis for evaluation of the bus concept is described. Installation of the system included developing both hardware and software interfaces between the bus and the specific TMS computers and terminals. The software written for the microprocessor-based bus interface units is described. The software implements both the general bus communications protocol and also the specific interface protocols for the TMS computers and terminals.

Gregor, P. J.↗
NASA NTRS1986

Implementation of Ada protocols on Mil-STD-1553 B data bus

Standardization activity of data communication in avionic systems started in 1968 for the purpose of total system integration and the elimination of heavy wire bundles carrying signals between various subassemblies. The growing complexity of avionic systems is straining the capabilities of MIL-STD-1553 B (first issued in 1973), but a much greater challenge to it is posed by Ada, the standard language adopted for real-time, computer embedded-systems. Hardware implementation of Ada communication protocols in a contention/token bus or token ring network is proposed. However, during the transition period when the current command/response multiplex data bus is still flourishing and the development environment for distributed multi-computer Ada systems is as yet lacking, a temporary accomodation of the standard language with the standard bus could be very useful and even highly desirable. By concentrating all status informtion and decisions at the bus controller, it was found to be possible to construct an elegant and efficient harware impelementation of the Ada protocols at the bus interface. This solution is discussed.

Ruhman, Smil↗
NASA NTRS1991

A contention-based bus-control scheme for multiprocessor systems

The authors study contention-based bus-control schemes for scheduling processors in using a bit-parallel shared bus. The protocol is designed under the requirements that each processor exhibit a random access behavior, that there be no centralized bus control in the system, and that access be granted in real time. The proposed scheme is based on splitting algorithms used in conventional contention-resolution schemes, and utilizes two-state information obtained from collision detection. Two versions of the bus-control scheme are studied. The static one resolves contentions of N requesting processors in an average of O(logW/2N) iterations, where W is the number of bits in the bit-parallel bus. An adaptive version resolves contentions in an average time that is independent of N.

Juang, Jie-Yong↗
NASA NTRS1996

Advanced Intelligent System Application to Load Forecasting and Control for Hybrid Electric Bus

The primary motivation for this research emanates from providing a decision support system to the electric bus operators in the municipal and urban localities which will guide the operators to maintain an optimal compromise among the noise level, pollution level, fuel usage etc. This study is backed up by our previous studies on study of battery characteristics, permanent magnet DC motor studies and electric traction motor size studies completed in the first year. The operator of the Hybrid Electric Car must determine optimal power management schedule to meet a given load demand for different weather and road conditions. The decision support system for the bus operator comprises three sub-tasks viz. forecast of the electrical load for the route to be traversed divided into specified time periods (few minutes); deriving an optimal 'plan' or 'preschedule' based on the load forecast for the entire time-horizon (i.e., for all time periods) ahead of time; and finally employing corrective control action to monitor and modify the optimal plan in real-time. A fully connected artificial neural network (ANN) model is developed for forecasting the kW requirement for hybrid electric bus based on inputs like climatic conditions, passenger load, road inclination, etc. The ANN model is trained using back-propagation algorithm employing improved optimization techniques like projected Lagrangian technique. The pre-scheduler is based on a Goal-Programming (GP) optimization model with noise, pollution and fuel usage as the three objectives. GP has the capability of analyzing the trade-off among the conflicting objectives and arriving at the optimal activity levels, e.g., throttle settings. The corrective control action or the third sub-task is formulated as an optimal control model with inputs from the real-time data base as well as the GP model to minimize the error (or deviation) from the optimal plan. These three activities linked with the ANN forecaster proving the output to the GP model which in turn produces the pre-schedule of the optimal control model. Some preliminary results based on a hypothetical test case will be presented for the load forecasting module. The computer codes for the three modules will be made available fe adoption by bus operating agencies. Sample results will be provided using these models. The software will be a useful tool for supporting the control systems for the Electric Bus project of NASA.

Momoh, James↗
NASA NTRS1999

The Design of a Fault-Tolerant COTS-Based Bus Architecture

In this paper, we report our experiences and findings on the design of a fault-tolerant bus architecture comprised of two COTS buses, the IEEE 1394 and the 12C. This fault-tolerant bus is the backbone system bus for the avionics architecture of the X2000 program at the Jet Propulsion Laboratory. COTS buses are attractive because of the availability of low cost commercial products. However, they are not specifically designed for highly reliable applications such as long-life deep-space missions. The X2000 design team has devised a multi-level fault tolerance approach to compensate for this shortcoming of COTS buses. First, the approach enhances the fault tolerance capabilities of the IEEE 1394 and 12 C buses by adding a layer of fault handling hardware and software. Second, algorithms are developed to enable the IEEE 1394 and the 12 C buses assist each other to isolate and recovery from faults. Third, the set of IEEE 1394 and 12 C buses is duplicated to further enhance system reliability. The X2000 design team has paid special attention to guarantee that all fault tolerance provisions will not cause the bus design to deviate from the commercial standard specifications. Otherwise, the economic attractiveness of using COTS will be diminished. The hardware and software design of the X2000 fault-tolerant bus are being implemented and flight hardware will be delivered to the ST4 and Europa Orbiter missions.

Chau, Savio N.↗
NASA NTRS2007

Method and systems for a radiation tolerant bus interface circuit

A bus management tool that allows communication to be maintained between a group of nodes operatively connected on two busses in the presence of radiation by transmitting periodically a first message from one to another of the nodes on one of the busses, determining whether the first message was received by the other of the nodes on the first bus, and when it is determined that the first message was not received by the other of the nodes, transmitting a recovery command to the other of the nodes on a second of the of busses. Methods, systems, and articles of manufacture consistent with the present invention also provide for a bus recovery tool on the other node that re-initializes a bus interface circuit operatively connecting the other node to the first bus in response to the recovery command.

Kinstler, Gary A.↗
NASA NTRS2006

Efficient and Robust Data Collection Using Compact Micro Hardware, Distributed Bus Architectures and Optimizing Software

Future In-Space propulsion systems for exploration programs will invariably require data collection from a large number of sensors. Consider the sensors needed for monitoring several vehicle systems states of health, including the collection of structural health data, over a large area. This would include the fuel tanks, habitat structure, and science containment of systems required for Lunar, Mars, or deep space exploration. Such a system would consist of several hundred or even thousands of sensors. Conventional avionics system design will require these sensors to be connected to a few Remote Health Units (RHU), which are connected to robust, micro flight computers through a serial bus. This results in a large mass of cabling and unacceptable weight. This paper first gives a survey of several techniques that may reduce the cabling mass for sensors. These techniques can be categorized into four classes: power line communication, serial sensor buses, compound serial buses, and wireless network. The power line communication approach uses the power line to carry both power and data, so that the conventional data lines can be eliminated. The serial sensor bus approach reduces most of the cabling by connecting all the sensors with a single (or redundant) serial bus. Many standard buses for industrial control and sensor buses can support several hundreds of nodes, however, have not been space qualified. Conventional avionics serial buses such as the Mil-Std-1553B bus and IEEE 1394a are space qualified but can support only a limited number of nodes. The third approach is to combine avionics buses to increase their addressability. The reliability, EMI/EMC, and flight qualification issues of wireless networks have to be addressed. Several wireless networks such as the IEEE 802.11 and Ultra Wide Band are surveyed in this paper. The placement of sensors can also affect cable mass. Excessive sensors increase the number of cables unnecessarily. Insufficient number of sensors may not provide adequate coverage of the system. This paper also discusses an optimal technique to place and validate sensors.

micro hardware↗