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At least 19 records

Design of low loss helix circuits for interference fitted and brazed circuits

The RF loss properties and thermal capability of brazed helix circuits and interference fitted circuits were evaluated. The objective was to produce design circuits with minimum RF loss and maximum heat transfer. These circuits were to be designed to operate at 10 kV and at 20 GHz using a gamma a approximately equal to 1.0. This represents a circuit diameter of only 0.75 millimeters. The fabrication of this size circuit and the 0.48 millimeter high support rods required considerable refinements in the assembly techniques and fixtures used on lower frequency circuits. The transition from the helices to the waveguide was designed and the circuits were matched from 20 to 40 GHz since the helix design is a broad band circuit and at a gamma a of 1.0 will operate over this band. The loss measurement was a transmission measurement and therefore had two such transitions. This resulting double-ended match required tuning elements to achieve the broad band match and external E-H tuners at each end to optimize the match for each frequency where the loss measurement was made. The test method used was a substitution method where the test fixture was replaced by a calibrated attenuator.

Jacquez, A.

Gate drive latching circuit for an auxiliary resonant commutation circuit

A gate drive latching circuit for an auxiliary resonant commutation circuit for a power switching inverter includes a current monitor circuit providing a current signal to a pair of analog comparators to implement latching of one of a pair of auxiliary switching devices which are used to provide commutation current for commutating switching inverters in the circuit. Each of the pair of comparators feeds a latching circuit which responds to an active one of the comparators for latching the associated gate drive circuit for one of the pair of auxiliary commutating switches. An initial firing signal is applied to each of the commutating switches to gate each into conduction and the resulting current is monitored to determine current direction and therefore the one of the switches which is carrying current. The comparator provides a latching signal to the one of the auxiliary power switches which is actually conducting current and latches that particular power switch into an on state for the duration of current through the device. The latching circuit is so designed that the only time one of the auxiliary switching devices can be latched on is during the duration of an initial firing command signal.

Delgado, Eladio Clemente

Statistical circuit design for yield improvement in CMOS circuits

This paper addresses the statistical design of CMOS integrated circuits for improved parametric yield. The work uses the Monte Carlo technique of circuit simulation to obtain an unbiased estimation of the yield. A simple graphical analysis tool, the yield factor histogram, is presented. The yield factor histograms are generated by a new computer program called SPICENTER. Using the yield factor histograms, the most sensitive circuit parameters are noted, and their nominal values are changed to improve the yield. Two basic CMOS example circuits, one analog and one digital, are chosen and their designs are 'centered' to illustrate the use of the yield factor histograms for statistical circuit design.

Kamath, H. J.

Method and Circuit for Injecting a Precise Amount of Charge onto a Circuit Node

A method and circuit for injecting charge into a circuit node, comprising (a) resetting a capacitor's voltage through a first transistor; (b) after the resetting, pre-charging the capacitor through the first transistor; and (c) after the pre-charging, further charging the capacitor through a second transistor, wherein the second transistor is connected between the capacitor and a circuit node, and the further charging draws charge through the second transistor from the circuit node, thereby injecting charge into the circuit node.

Hancock, Bruce R.

An Investigative Redesign of the ECG and EMG Signal Conditioning Circuits for Two-fault Tolerance and Circuit Improvement

An investigation was undertaken to make the elctrocardiography (ECG) and the electromyography (EMG) signal conditioning circuits two-fault tolerant and to update the circuitry. The present signal conditioning circuits provide at least one level of subject protection against electrical shock hazard but at a level of 100 micro-A (for voltages of up to 200 V). However, it is necessary to provide catastrophic fault tolerance protection for the astronauts and to provide protection at a current level of less that 100 micro-A. For this study, protection at the 10 micro-A level was sought. This is the generally accepted value below which no possibility of microshock exists. Only the possibility of macroshock exists in the case of the signal conditioners. However, this extra amount of protection is desirable. The initial part deals with current limiter circuits followed by an investigation into the signal conditioner specifications and circuit design.

Obrien, Edward M.

Fast-responding short circuit protection system with self-reset for use in circuit supplied by DC power

A short circuit protection system includes an inductor, a switch, a voltage sensing circuit, and a controller. The switch and inductor are electrically coupled to be in series with one another. A voltage sensing circuit is coupled across the switch and the inductor. A controller, coupled to the voltage sensing circuit and the switch, opens the switch when a voltage at the output terminal of the inductor transitions from above a threshold voltage to below the threshold voltage. The controller closes the switch when the voltage at the output terminal of the inductor transitions from below the threshold voltage to above the threshold voltage.

Burns, Bradley M.

Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

Source record

Circuit with a Switch for Charging a Battery in a Battery Capacitor Circuit

A circuit for charging a battery combined with a capacitor includes a power supply adapted to be connected to the capacitor, and the battery. The circuit includes an electronic switch connected to the power supply. The electronic switch is responsive to switch between a conducting state to allow current and a non-conducting state to prevent current flow. The circuit includes a control device connected to the switch and is operable to generate a control signal to continuously switch the electronic switch between the conducting and non-conducting states to charge the battery.

Stuart, Thomas A.

Circuit model for characterizing the nearly linear behavior of avalanche diodes in amplifier circuits

A nonlinear circuit model for avalanche diodes is proposed. The model was derived by assuming that the bias dependence of the elements in a known small-signal equivalent-circuit model for existing diodes arises in a manner consistent with the theory of an idealized Read-type device. The model contains a nonlinear R-L branch, a controlled source, and a linear depletion capacitance. The model is used in the nearly linear sense to predict intermodulation distortion and gain compression in avalanche diode amplifiers. Computed results for amplifiers with existing diodes are shown to be in good agreement with experiment.

Penfield, P., Jr.

Effect of dislocations on the open-circuit voltage, short-circuit current and efficiency of heteroepitaxial indium phosphide solar cells

Excellent radiation resistance of indium phosphide solar cells makes them a promising candidate for space power applications, but the present high cost of starting substrates may inhibit their large scale use. Thin film indium phosphide cells grown on Si or GaAs substrates have exhibited low efficiencies, because of the generation and propagation of large number of dislocations. Dislocation densities were calculated and its influence on the open circuit voltage, short circuit current, and efficiency of heteroepitaxial indium phosphide cells was studied using the PC-1D. Dislocations act as predominant recombination centers and are required to be controlled by proper transition layers and improved growth techniques. It is shown that heteroepitaxial grown cells could achieve efficiencies in excess of 18 percent AMO by controlling the number of dislocations. The effect of emitter thickness and surface recombination velocity on the cell performance parameters vs. dislocation density is also studied.

Jain, Raj K.

Selection of wires and circuit protective devices for STS Orbiter vehicle payload electrical circuits

Electrical designers of Orbiter payloads face the challenge of determining proper circuit protection/wire size parameters to satisfy Orbiter engineering and safety requirements. This document is the result of a program undertaken to review test data from all available aerospace sources and perform additional testing to eliminate extrapolation errors. The resulting compilation of data was used to develop guidelines for the selection of wire sizes and circuit protection ratings. The purpose is to provide guidance to the engineering to ensure a design which meets Orbiter standards and which should be applicable to any aerospace design.

Gaston, Darilyn M.

Fabric circuits and method of manufacturing fabric circuits

A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.

Chu, Andrew W.

Incorporating ADAPT-VQE with a Sparse Wavefunction Circuit Simulator to Find Compact Quantum Circuits for Chemical Applications

We implemented the ADAPT-VQE algorithm into our recent classical sparse wavefunction circuit simulator to demonstrate that classical resources can (1) efficiently find a physically motivated compact wavefunction ansatz for further refinement on near-term quantum hardware and (2) benchmark expected results of VQE-based algorithms once the quantum hardware is available to study large-scale applications. In particular, we study the role of the ADAPT-VQE operator pool, molecular basis set selection, and variations such as TETRIS-ADAPT-VQE on the performance of our classical circuit simulator. This work demonstrates the promise of using classical resources to generate highly accurate wavefunctions that can be prepared on quantum hardware to initiate other quantum algorithms such as phase estimation. Our approach harnesses the power of high-performance computing resources with the more limited available quantum computers to map a path toward quantum advantage for electronic structure calculations in chemistry and materials science.

Quantum Computing