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Results for “CIRCUIT RELIABILITY”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2026

Reliability Assessment of Solid-State Circuit Breakers (CRADA CRD-21-21469, Project 4 Final Report)

Growth in power requirements and the complexity of emerging distribution systems are creating the need for new solid-state products for many applications. The qualification requirements, testing standards and life-cycle management practices of solid-state devices used in protection applications is not established. The project will leverage newly developed accelerated testing capabilities design specifically for protection applications to generate large data sets that will enable advanced digital techniques for data analysis and embedded health monitoring.

14 SOLAR ENERGY↗
DOE OSTI2024

High energy density picoliter-scale zinc-air microbatteries for colloidal robotics

The recent interest in microscopic autonomous systems, including microrobots, colloidal state machines, and smart dust, has created a need for microscale energy storage and harvesting. However, macroscopic materials for energy storage have noted incompatibilities with microfabrication techniques, creating substantial challenges to realizing microscale energy systems. Here, we photolithographically patterned a microscale zinc/platinum/SU-8 system to generate the highest energy density microbattery at the picoliter (10 −12 liter) scale. The device scavenges ambient or solution-dissolved oxygen for a zinc oxidation reaction, achieving an energy density ranging from 760 to 1070 watt-hours per liter at scales below 100 micrometers lateral and 2 micrometers thickness in size. The parallel nature of photolithography processes allows 10,000 devices per wafer to be released into solution as colloids with energy stored on board. Within a volume of only 2 picoliters each, these primary microbatteries can deliver open circuit voltages of 1.05 ± 0.12 volts, with total energies ranging from 5.5 ± 0.3 to 7.7 ± 1.0 microjoules and a maximum power near 2.7 nanowatts. We demonstrated that such systems can reliably power a micrometer-sized memristor circuit, providing access to nonvolatile memory. We also cycled power to drive the reversible bending of microscale bimorph actuators at 0.05 hertz for mechanical functions of colloidal robots. Additional capabilities, such as powering two distinct nanosensor types and a clock circuit, were also demonstrated. The high energy density, low volume, and simple configuration promise the mass fabrication and adoption of such picoliter zinc-air batteries for micrometer-scale, colloidal robotics with autonomous functions.

Robotics↗
DOE OSTI2026

>24% screen printed Cu contacted n-TOPCon solar cells with successful implementation of LECO process

In this paper, we report the successful fabrication of >24.0 % efficiency n-TOPCon Si solar cells with screen-printed, fire-through Cu contact to n-TOPCon on the rear side and Ag contacted boron emitter on the front side by implementing optimized firing and LECO conditions. The highest efficiency (24.3%) Cu contacted n-TOPCon cell in this study showed excellent cell performance parameters with V oc >730 mV, J sc of 41.1 mA/cm 2 and FF of 80.8%, resulting in an absolute efficiency gap of 0.2% between Cu-contacted and fully Ag contacted n-TOPCon cells (24.5%). The mini-module fabricated with the Cu contacted n-TOPCon cell showed excellent reliability and durability of open-circuit voltage (V oc ), pseudo fill factor (pFF) and efficiency after prolonged damp-heat tests. Such high efficiency screen printed Cu contacted n-TOPCon cells provide unique opportunity to replace very expensive Ag contact on n-TOPCon with cheaper screen printable Cu metal pastes.

14 SOLAR ENERGY↗
DOE OSTI2026

Electrochemical Modeling of PID Leakage Current of PV Modules: Steady-State Current, Transient Current, and RC-Equivalent Circuit

Potential-induced degradation (PID) remains a significant reliability concern for photovoltaic (PV) modules, arising when a voltage difference between the module frame and the solar cells drives unintended leakage current through the glass-encapsulant stack. Although PID ultimately manifests as PID-s, PID-p, or PID-c, the underlying behavior of the leakage current-its magnitude and time dependence-requires clearer electrochemical interpretation. Traditional explanations attribute the initial transient current to bulk capacitive elements of the glass, encapsulant, and antireflection coatings, and the steady-state current according to their effective ohmic resistance. More recent studies, however, indicate that electrochemical charge-transfer processes at the encapsulant-metallization interface can play a dominant role in defining the leakage-current path. This paper develops a unified electrochemical framework for modeling PID leakage current. First, an RC-equivalent circuit is formulated by combining conventional RC elements with a Randles-type interface to capture transient leakage current through double-layer capacitance and faradaic processes at ionic-electronic boundaries. Second, the steady-state current-voltage behavior is explained using a linearized Butler-Volmer relationship, showing that the measured ohmic response corresponds to the low-overpotential limit of charge-transfer kinetics. Analytical results demonstrate that, for typical module materials-3.2-mm soda-lime glass and 0.45-mm encapsulant-the dominant modulators to PID leakage current are the glass surface resistance (under dry-surface conditions), the glass bulk capacitance, and the encapsulant resistance (under wet-surface conditions), with soda lime glass surface and EVA/POE encapsulant resistances primarily governing steady-state current. The proposed electrochemical model is validated against measured leakage-current data, showing good agreement in both the magnitude and the time-dependent evolution of PID leakage current.

14 SOLAR ENERGY↗
DOE OSTI2024

Fully Scalable Randomized Benchmarking Without Motion Reversal

We introduce , a protocol that streamlines traditional RB by using circuits consisting almost entirely of independent identically distributed (IID) layers of gates. BiRB reliably and efficiently extracts the average error rate of a Clifford gate set by sending tensor-product eigenstates of random Pauli operators through random circuits with IID layers. Unlike existing RB methods, BiRB does not use motion reversal circuits—i.e., circuits that implement the identity (or a Pauli) operator—which simplifies both the method and the theory proving its reliability. Furthermore, this simplicity enables scaling BiRB to many more qubits than the most widely used RB methods. Published by the American Physical Society 2024

Hines, Jordan (ORCID:0000000151267256)↗
DOE OSTI2024

Selective consolidation of learning and memory via recall-gated plasticity

In a variety of species and behavioral contexts, learning and memory formation recruits two neural systems, with initial plasticity in one system being consolidated into the other over time. Moreover, consolidation is known to be selective; that is, some experiences are more likely to be consolidated into long-term memory than others. Here, we propose and analyze a model that captures common computational principles underlying such phenomena. The key component of this model is a mechanism by which a long-term learning and memory system prioritizes the storage of synaptic changes that are consistent with prior updates to the short-term system. This mechanism, which we refer to as recall-gated consolidation, has the effect of shielding long-term memory from spurious synaptic changes, enabling it to focus on reliable signals in the environment. We describe neural circuit implementations of this model for different types of learning problems, including supervised learning, reinforcement learning, and autoassociative memory storage. These implementations involve synaptic plasticity rules modulated by factors such as prediction accuracy, decision confidence, or familiarity. We then develop an analytical theory of the learning and memory performance of the model, in comparison to alternatives relying only on synapse-local consolidation mechanisms. We find that recall-gated consolidation provides significant advantages, substantially amplifying the signal-to-noise ratio with which memories can be stored in noisy environments. We show that recall-gated consolidation gives rise to a number of phenomena that are present in behavioral learning paradigms, including spaced learning effects, task-dependent rates of consolidation, and differing neural representations in short- and long-term pathways.

59 BASIC BIOLOGICAL SCIENCES↗
DOE OSTI2024

Selective consolidation of learning and memory via recall-gated plasticity

In a variety of species and behavioral contexts, learning and memory formation recruits two neural systems, with initial plasticity in one system being consolidated into the other over time. Moreover, consolidation is known to be selective; that is, some experiences are more likely to be consolidated into long-term memory than others. Here, we propose and analyze a model that captures common computational principles underlying such phenomena. The key component of this model is a mechanism by which a long-term learning and memory system prioritizes the storage of synaptic changes that are consistent with prior updates to the short-term system. This mechanism, which we refer to as recall-gated consolidation, has the effect of shielding long-term memory from spurious synaptic changes, enabling it to focus on reliable signals in the environment. We describe neural circuit implementations of this model for different types of learning problems, including supervised learning, reinforcement learning, and autoassociative memory storage. These implementations involve synaptic plasticity rules modulated by factors such as prediction accuracy, decision confidence, or familiarity. We then develop an analytical theory of the learning and memory performance of the model, in comparison to alternatives relying only on synapse-local consolidation mechanisms. We find that recall-gated consolidation provides significant advantages, substantially amplifying the signal-to-noise ratio with which memories can be stored in noisy environments. We show that recall-gated consolidation gives rise to a number of phenomena that are present in behavioral learning paradigms, including spaced learning effects, task-dependent rates of consolidation, and differing neural representations in short- and long-term pathways.

Lindsey, Jack W. (ORCID:0000000309307327)↗
DOE OSTI2025

Predicting Trends in VOC Through Rapid, Multimodal Characterization of State-of-the-Art p-i-n Perovskite Devices

Perovskite photovoltaic technologies are approaching commercial deployment, yet single junction and tandem architectures both still have significant room to improve power conversion efficiency and stability. The ability to perform rapid screening of material quality after altering processing conditions is critical to accelerating the optimization and commercialization of perovskite-based technologies. Currently, researchers utilize a wide range of stand-alone metrology tools to isolate sources of power loss throughout a device stack, which can be slow and labor intensive. Here, we demonstrate the use of a multimodal metrology approach to rapidly determine the maximum achievable and predicted open circuit voltages of >100 perovskite devices during fabrication. Acquisition of these different data is facilitated by combining them into a single integrated measurement platform. We show that these data and automated analysis can be used to rapidly understand and ultimately predict quantitative trends in open circuit voltages of state-of-the-art device architectures. The data and automated analysis workflow presented provides a reliable approach to quickly identify absorber and charge transport layer combinations that can lead to improved open circuit voltages.

14 SOLAR ENERGY↗
DOE OSTI2024

Spectroscopic Measurements and Models of Energy Deposition in the Substrate of Quantum Circuits by Natural Ionizing Radiation

Naturally occurring background radiation is a potential source of correlated decoherence events in superconducting qubits that will challenge error-correction schemes. In order to characterize the radiation environment in an unshielded laboratory representative of superconducting qubits’ environments, we performed broadband, spectroscopic measurements of background radiation events inside a millikelvin refrigerator. The spectrometer was designed to mimic the size and composition of a quantum circuit. Specifically, we measured the background radiation spectra in silicon substrates of two thicknesses, 500 and 1500 µm, and one area, 25 mm 2 . The observed spectra span energies from a few kilo-electron-volts up to nearly 10 MeV, are nearly featureless, and decrease in intensity by a factor of 40 000 between 100 keV and 3 MeV for the 500-µm substrate. We integrate the spectra to obtain the average event rates and deposited power levels. These quantities correspond to a rate of 0.023 events per second and a power of 4.9 keV s -1 , when counting events that deposit at least 40 keV for the 500-µm-thick substrate. We find that the cryogenic measurements are in good agreement with predictions based on simple measurements of the terrestrial gamma-ray flux outside the refrigerator, published models of cosmic-ray fluxes, a crude model of the cryostat, and radiation-transport simulations. This model requires no free parameters to predict the background radiation spectra in the silicon substrates. The agreement between measurements and predictions demonstrates that the model we present can be used to assess the relative contributions of terrestrial and cosmic-ray sources to background radiation interactions in silicon substrates of varying thickness. These spectroscopic measurements are performed with a novel combination of superconducting microresonators located on micromachined silicon islands that define the interaction volume with background radiation. The resonators transduce deposited energy to a readily detectable electrical signal. Microresonator readout closely resembles dispersive superconducting qubit readout, so similar devices—with or without micromachined islands—are suitable for integration with superconducting quantum circuits as detectors for background radiation events. For our specific laboratory conditions, we find that gamma-ray emissions from radioisotopes are responsible for the majority of events that deposit E < 1 ⁢Me⁢V. We present results demonstrating that the background radiation spectrum contains relevant contributions from cosmic-ray particles other than muons, particularly a tail of multi-mega-electron-volt events due to protons and neutrons. These observations suggest several paths to reducing the impact of background radiation on quantum circuits, supported by an empirically validated model for generating reliable predictions of radiation interactions with silicon substrates.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Risk-controlled Expansion Planning with Distributed Resources (REPAIR) v1.0

The Risk-controlled Expansion Planning with Distributed Resources (REPAIR) is an innovative tool to support decisions around utility grid planning to prevent and mitigate the impact of outages caused by routine equipment failures (reliability) or by extreme events (resilience), such as storms, earthquakes or wildfires that long term interruption of service. REPAIR is a risk-based optimization and decision-making model allowing informed and transparent "cost vs risk" decisions regarding infrastructural planning of electric utilities. The model considers long-term resilience and reliability planning strategies that rely on traditional infrastructure upgrade (e.g. circuit hardening, reinforcement, new substations, etc.) or new investment alternatives, such as DERs.

Heleno, Miguel [Lawrence Berkeley National Laborat↗
DOE OSTI2026

Benchmarking quantum trial wavefunctions for phaseless auxiliary-field quantum Monte Carlo

The phaseless auxiliary-field quantum Monte Carlo (ph-AFQMC) method is a stochastic imaginary-time projection technique for computing ground-state properties of strongly correlated quantum systems, with accuracy that depends critically on the choice of trial wavefunction. Here, we investigate ph-AFQMC with trial states prepared using parameterized quantum circuits. In this work, we present a comprehensive benchmarking study of quantum trial wavefunctions spanning unitary coupled-cluster, Hamiltonian-informed, Jastrow-inspired, and adaptively constructed ansatze. The benchmarking evaluates accuracy, expressibility, and scalability of these ansatze within the QC-AFQMC framework. We test these ansatze on linear hydrogen chains under bond stretching and find that several ansatz families produce chemically accurate ph-AFQMC energies across the dissociation curve. We have performed simulations using the CUDA-Q quantum development platform on the GPU partition of the Perlmutter supercomputer. When comparing ansatze at similar numbers of variational parameters, we find that different ansatz families yield comparable ph-AFQMC results despite exhibiting substantially different variational energies, optimization costs, and circuit depths. Our results indicate that the variational energy of an ansatz is not always a reliable indicator of its quality for ph-AFQMC and reveal instances of over-parameterization. In the strongly correlated regime, trial wavefunctions obtained from adaptive ansatze, exemplified here by ADAPT-VQE with the UCCSD operator pool, can outperform their fixed-ansatz counterparts (UCCSD) in terms of projected energies while using substantially more compact circuits, providing a flexible route to optimize quantum resources within the ph-AFQMC framework.

Rofougaran, Rod [LBNL, Berkeley; Columbia U.; PNL,↗
DOE OSTI2024

Experimental Investigation of Steel-Borne Acoustic Pulses for Fault Pinpointing in Pipe-Type Cable Systems: A Scaled-Down Model Approach

Pipe-type cable systems, including high-pressure fluid-filled (HPFF) and high-pressure gas-filled cables, are widely used for underground high-voltage transmission. These systems consist of insulated conductor cables within steel pipes, filled with pressurized fluids or gases for insulation and cooling. Despite their reliability, faults can occur due to insulation degradation, thermal expansion, and environmental factors. As many circuits exceed their 40-year design life, efficient fault localization becomes crucial. Fault location involves prelocation and pinpointing. Therefore, a novel pinpointing approach for pipe-type cable systems is proposed, utilizing accelerometers mounted on a steel pipe to capture fault-induced acoustic signals and employing the time difference of arrival method to accurately pinpoint the location of the fault. The experimental investigations utilized a scaled-down HPFF pipe-type cable system setup, featuring a carbon steel pipe, high-frequency accelerometers, and both mechanical and capacitive discharge methods for generating acoustic pulses. The tests evaluated the propagation velocity, attenuation, and pinpointing accuracy with the pipe in various embedment conditions. The experimental results demonstrated accurate fault pinpointing in the centimeter range, even when the pipe was fully embedded, with the acoustic pulse velocities aligning closely with the theoretical values. These experimental investigation findings highlight the potential of this novel acoustic pinpointing technique to improve fault localization in underground systems, enhance grid reliability, and reduce outage duration. Further research is recommended to validate this approach in full-scale systems.

Moutassem, Zaki↗
DOE OSTI2025

Implementation of WBG devices in circuits - Electric Drive Technologies Project (Final Technical Report)

The objective of the project is to ensure that SiC devices are reliable and rugged as required in automotive applications for operational life of 300,000 hrs and create new device designs to address various weaknesses in currently available commercial devices. OSU has worked closely with SUNY Polytechnic. OSU has carried out the reliability and ruggedness evaluations of commercial devices as well as those fabricated by SUNY Polytechnic, discussed the results with SUNY Poly, and collaborated with the PI at SUNY Poly to improve the designs with respect to reliability/ruggedness. OSU work focused on reliability/ruggedness evaluation of SiC devices by individually testing them and then evaluate them in a 10 kW, 3 phase inverter system built with a specific purpose of stressing devices using realistic drive cycles such as a 10-minute hill climb. It should be noted that the primary purpose of the 10 kW inverter is to provide a platform for stressing the SiC devices under accelerated but realistic drive conditions.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2025

Optimizing Insulation Design for Transformers in Medium Voltage Power Conversion Systems

Medium-frequency transformers (MFTs) play a crucial role in medium-voltage (MV) solidstate transformer (SST) systems, particularly in extreme fast charging applications. Achieving partial discharge (PD)-free operation while maintaining high power density is a significant challenge due to the high electric field (E-field) stresses inherent in MV applications. This dissertation focuses on the insulation design and optimization of MFTs used in both the main power electronics circuits and auxiliary power supplies. The study begins with an overview of insulation testing methodologies, including high potential tests, basic insulation level tests, and PD tests, which are critical for evaluating MFT insulation reliability. Given the importance of PD-free operation for long-term reliability, particular emphasis is placed on understanding PD mechanisms, including void, corona, and surface discharge, and their mitigation strategies. A high voltage isolated auxiliary power supply is then introduced, utilizing a gapped transformer encapsulated in silicone gel. This design achieves PD-free insulation up to 18 kV RMS while maintaining low coupling capacitance to minimize common-mode current. The proposed solution ensures reliable operation in MV environments and offers a scalable approach for auxiliary power in cascaded SST architectures. To improve MFT insulation in main power conversion circuits, a novel structure is developed using polypropylene sheets and potting compounds to create a void-free air gap, effectively mitigating E-field intensity. A prototype transformer with this insulation structure is built and achieves PD-free operation up to 30 kV RMS. This design is experimentally validated in a resonant converter operating at 46 kW, demonstrating its feasibility for MV SST applications. Further optimization is implemented to enhance MFT performance for dual-active-bridge(DAB) converters by integrating a semiconductive shielding layer within the insulation structure. This shielding layer improves the magnetic coupling coefficient while effectively confining the E-field within high insulation materials, thereby reducing eddy current losses. The optimized MFT achieves PD-free operation at 12.6 kV RMS and is successfully tested in a DAB converter operating at 43 kW, which meets the insulation requirements for a 13.2 kV SST system. This dissertation advances MFT insulation design by introducing and experimentally validating novel approaches that improve high voltage insulation while optimizing magnetic coupling and manufacturability. The proposed insulation structures enable PD-free operation while minimizing insulation material usage and simplifying assembly, making them ideal for high power, high voltage applications.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗
DOE OSTI2026

Failure Mode and Effects Analysis (FMEA) for Photovoltaic Inverter

Photovoltaic (PV) inverters are critical yet vulnerable components in modern energy systems, often acting as reliability bottlenecks that increase the levelized cost of energy (LCOE). To address this, this paper presents a comprehensive Failure Mode and Effects Analysis (FMEA) tailored for PV inverters. Leveraging field data and literature, we identify failure-prone components, such as capacitors,, and relays, and prioritize their risks based on quantitative Risk Priority Numbers (RPNs). The analysis reveals that surge-induced MOV short circuits, capacitor degradation, and environmental cooling fan failures dominate the risk profile. These findings provide a targeted framework for reliability improvement, guiding future efforts in predictive diagnostics, design optimization, and accelerated life testing strategies.

14 SOLAR ENERGY↗
DOE OSTI2025

Evaluating pulse-shaping capabilities of next-generation pulsed power architectures

This project evaluated the pulse shaping capabilities of next-generation pulsed power (NGPP) architectures. NGPP architectures share several common attributes including multiple independent pulse-generation lines, a radial water-insulated impedance transformer, and a central vacuum insulated load region. A multi-module circuit model was developed, incorporating independent pulse-generation lines and a 2-D transmission line mesh of the radial impedance transformer to assess the effects of azimuthal asymmetry in pulse-shaped experiments. Circuit model simulations demonstrated that NGPP architectures are able to produce the the desired current pulse shapes for exemplar NGPP experiments. Additionally, the project explored automated methods for experiment design, including derivative -ree optimization and machine learning. Pulse-shaped experiments require designers to determine machine parameters that reliably produce the desired current pulse at the load, a process that typically relies on expert knowledge and iterative adjustments using the Z circuit model. Given the increased complexity of NGPP systems, this manual approach may be impractical. While the evaluated methods do not eliminate the need for manual iteration, they can reduce the time required for experiment design. Derivative-free optimization automates much of the trial-and-error process, providing a close starting point for manual adjustments or making small modifications to near-final designs. Meanwhile, deep neural network methods can generate a good qualitative match to the desired current pulse in under one second without requiring circuit model simulations.

42 ENGINEERING↗
DOE OSTI2024

SMART SiC Power ICs: Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (Final Technical Report)

This collaborative project was initiated with the goal of developing Scalable, Manufacturable, and Robust Technology for SiC Power Integrated Circuits (SMART SiC Power ICs). In pursuit of this objective, innovative designs and fabrication processes were implemented, enabling the development of large-scale (>1 cm²) SiC Complementary Metal-Oxide-Semiconductor (CMOS) integrated circuits and high-voltage (400–600 V) lateral power MOSFETs (HV-LDMOS) on 150 mm 4H-SiC substrates. The resulting SMART SiC Power ICs are tailored to support a wide range of applications requiring diverse voltage and power levels, including automotive systems, industrial equipment, electronic data processing, energy harvesting, and power conditioning. To achieve the proposed ‘SMART’ technology for SiC ICs, the team focused on 1) the Development of highly scalable CMOS (with high channel mobilities for n-type and p-type MOSFETs), LDMOS (~600V, 10A rated), and IC technologies, 2) Establishment of a manufacturable process baseline in a production-grade-, 150mm, SiC fabrication facility, and 3) Demonstration of SMART SiC ICs. The project initially comprised of fabricating 5 lots. In lot 1 monolithic integration using a single process was achieved. Here, we were able to successfully accomplish Integrated HV NMOSFET with LV CMOS on N-epi/N+ Substrate. The HV NMOS demonstrated a Breakdown Voltage (BV) more than 600V. Circuit demonstration of CMOS was also another achievement from this lot. In lot 2, priority was in place for isolation and integration. Here we addressed the isolation concerns and integrated the HV NMOS and LV CMOS using the N-epi/P-epi/N+ substrate. Similar to the lot 1, we were able to achieve a BV of 600 V for HV NMOS. Optimized gate oxide process with high channel mobilities, better gate oxide reliability, development of SPICE models, successful ohmic process development, novel wafer area saving design layouts, P+ isolation schemes with channeling implantations and high temperature operational circuits demonstrations are some of the key highlights from lot 1 and lot2. In lot 3, discrete device performances of HV NMOS with a BV ~700V and reliable LV CMOS performances were achieved. Also, novel architectural solutions were successfully implemented to suppress the electric field crowding at the gate oxide for reliable operations. In lot 4, half bridge power driver ICs with a conversion efficiency of (target 90% to 95%) in the 1-5MHz switching frequency range for output power between 25 W to 3 kW have been included in. However, due to the unfortunate events of sudden foundry shutdown (SiCamore Semi) the processing of lot 4 wafers came to a complete stop (January 2024). Arrangements have recently been made to shift the fabrication to another foundry, General Electric Aerospace. The fabrication process now on course (as of December 2024). Characterizations are delayed due to this unfortunate circumstance. The proposed trench architectural-based devices and ICs (lot 5) underwent modifications from the original project proposal. This change was necessitated by limitations in the availability of trench-based processes at commercial production-grade fabrication facilities in the US. Apart from above achievements, a Process Development Kit (PDK) was successfully developed for planar type SiC CMOS/LDMOS.

42 ENGINEERING↗
DOE OSTI2024

Power modeling of degraded PV systems: Case studies using a dynamically updated physical model (PV-Pro)

Power modeling, widely applied for health monitoring and power prediction, is crucial for the efficiency and reliability of Photovoltaic (PV) systems. The most common approach for power modeling uses a physical equivalent circuit model, with the core challenge being the estimation of model parameters. Traditional parameter estimation either relies on datasheet information, which does not reflect the system's current health status, especially for degraded PV systems, or requires additional I-V characterization, which is generally unavailable for large-scale PV systems. Thus, we build upon our previously developed tool, PV-Pro (originally proposed for degradation analysis), to enhance its application for power modeling of degraded PV systems. PV-Pro extracts model parameters from production data without requiring I-V characterization. This dynamic model, periodically updated, can closely capture the actual degradation status, enabling precise power modeling. PV-Pro is compared with popular power modeling techniques, including persistence, nominal physical, and various machine learning models. The results indicate that PV-Pro achieves outstanding power modeling performance, with an average nMAE of 1.4 % across four field-degraded PV systems, reducing error by 17.6 % compared to the best alternative technique. Furthermore, PV-Pro demonstrates robustness across different seasons and severities of degradation. The tool is available as a Python package at https://github.com/DuraMAT/pvpro.

14 SOLAR ENERGY↗