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At least 19 records

Colossal grain growth in Cd(Se,Te) thin films and their subsequent use in CdTe epitaxy by close-spaced sublimation

Many technologies deposit thin films on inexpensive substrates, resulting in small grains due to classic nucleation and grain growth theory. For example, state-of-the-art solar cells are made by depositing CdSeTe and CdTe layers on inexpensive glass coated with nanocrystalline transparent conducting oxides (TCOs), like SnO 2 . Characteristically, the grain size of these films is on the order of the film thickness, i.e. a few microns. CdTe small-grain films have poor electro-optical properties and require CdCl 2 passivation which fails to fully passivate grain boundaries, causes carrier compensation, and prevents implementing other II–VI alloys and materials to improve performance. Here, we present a method to increase grain size to 1 mm in CdSe x Te 1-x thin films deposited on glass/TCO substrates without CdCl 2 treatment. The colossal grain growth is driven by mechanisms distinct from classic nucleation, grain growth, and Ostwald ripening and only occurs at low selenium content (x ~ 0.1). We also demonstrate how these films can serve as templates for subsequent large-grain epitaxy of other compositions like CdTe, again without exposure to CdCl 2 . The results open new paths for thin film solar cell technology, and thin film devices in general.

36 MATERIALS SCIENCE↗

Electronic Structure and Epitaxy of CdTe Shells on InSb Nanowires

Abstract Indium antimonide (InSb) nanowires are used as building blocks for quantum devices because of their unique properties, that is, strong spin‐orbit interaction and large Landé g‐factor. Integrating InSb nanowires with other materials could potentially unfold novel devices with distinctive functionality. A prominent example is the combination of InSb nanowires with superconductors for the emerging topological particles research. Here, the combination of the II–VI cadmium telluride (CdTe) with the III–V InSb in the form of core–shell (InSb–CdTe) nanowires is investigated and potential applications based on the electronic structure of the InSb–CdTe interface and the epitaxy of CdTe on the InSb nanowires are explored. The electronic structure of the InSb–CdTe interface using density functional theory is determined and a type‐I band alignment is extracted with a small conduction band offset ( ⩽0.3 eV). These results indicate the potential application of these shells for surface passivation or as tunnel barriers in combination with superconductors. In terms of structural quality, it is demonstrated that the lattice‐matched CdTe can be grown epitaxially on the InSb nanowires without interfacial strain or defects. These shells do not introduce disorder to the InSb nanowires as indicated by the comparable field‐effect mobility measured for both uncapped and CdTe‐capped nanowires.

36 MATERIALS SCIENCE↗

Colossal Grains for a New Structural Paradigm in Thin-Film Photovoltaics

II-VI based thin-film photovoltaics (PV) have experienced substantial commercial success on a foundation of fast large-scale deposition and processing. This type of processing, regardless of material type, nearly always results in small grain (nm to several um diameters) polycrystalline material that, if not for effective grain boundary (GB) and defect passivation, would severely limit PV performance. In the case of CdTe based PV technology, the nearly ubiquitous CdCl2 treatment is used, in part, to passivate the polycrystalline p-type absorber even though Cl is known to (and used to) compensate p-type II-VI materials. Given that VOC is still the most limited performance metric and it can only be improved through higher p-type absorber concentrations, CdCl2 treatments may be holding the technology back. In this talk, we will discuss results related to a process by which small grain CdSeTe material is rapidly transformed into very large grain material (100-1000um diameters, Fig. 1a). This explosive recrystallization, which we have termed colossal grain growth (CGG), occurs by a Cl free process with thin films (<10um) deposited using the same fast deposition techniques the industry has relied on for more than a decade. Our modeling suggests that GB recombination becomes significantly less important at these grain sizes and thus may eliminate the need for a CdCl2 treatment. This result is complimented by previous results of epitaxial growth at high rates on single crystal seed layers. Thin CdSeTe CGG seed layers can be used for rapid epitaxy of CdTe to complete a standard device stack (Fig.1b). This is an optimistic view and the current limitations and challenges related to this process and these materials will also be discussed, including alloy and substrate roughness sensitivity, intragrain material quality, and complex defect chemistry. These challenges are not insignificant but overcoming them may enable a new structural paradigm for thin-film PV.

CdTe↗

Nm-scale electrical resistance imaging on CdTe by scanning spreading resistance microscopy

Local resistance imaging can provide information on nm-scale carrier distribution in semiconductor devices. Scanning spreading resistance microscopy (SSRM), an atomic force microscopy-based nm-scale resistance mapping technique, has been developed for carrier delineation in Si microdevices. We report on the development and validation of SSRM on CdTe materials, by testing on molecular beam epitaxy (MBE) grown CdTe films. The probe/CdTe contact resistance was suppressed sufficiently below sample's spreading resistance by pressing the probe into the sample with ∼mN contact force and applying a large sample/probe forward bias voltage (V s ), which was understood by analyzing current-voltage (I-V) involving a serially connected insulating top layer with underlying spreading resistance. The carrier concentration as deduced from the resistance measurement, using a single mobility value, is consistent with Hall measurement with a standard deviation of 14% based on a set of MBE films with carrier concentrations in the range of 10 15 –10 16 /cm 3 . The doping polarity was readily identified by flipping V s polarity, where the resistance with reverse V s is orders of magnitude larger than forward V s . While focusing on the SSRM technique validation, we also show an example on an As-doped Cd(Se,Te) polycrystalline thin film of a high-performance CdTe solar cell, which illustrates the local resistance nonuniformity with up to two orders of magnitude differences, indicating if local mobility is roughly constant, local carrier concentration can have significant nonuniformity.

14 SOLAR ENERGY↗

Development of High-Quality, Very Large-Grained Cd(Se,Te) Thin Films for CdTe Solar Modules (Final Technical Report)

TCF-21-25048 is a one-year project to quantify the potential attributes of recent NREL inventions where CdTe devices with grain sizes exceeding 100's of microns in lateral dimension can be fabricated using a novel seeded-epitaxial process. A CdSe0.1Te0.9 film is evaporated on commercially available transparent conducting oxide (TCO) where the latter surface roughness (Ra) has been reduced to < 1-nm. After NREL's colossal grain growth (CGG) process, the grain size of this "seed" layer is increased to 100-1000 um. CdTe is then deposited epitaxially resulting in a large-grain CdTe device structure without use of CdCl2. As of this report, we have: Demonstrated the feasibility of using Tec-15 substrates after surface roughness (Ra) reduction (nexTC); Developed reproducible CGG processes for this commercially available substrate; Developed a close-spaced sublimation (CSS) process for CdTe epitaxy using these substrates; Demonstrated that large-grain CdTe films have less sub-band (band tail) absorption than conventional, small-grain CdTe; Demonstrated that large-grain CdTe films (no CdCl2) have carrier lifetimes up to 1.5 ns; Demonstrated that carrier lifetimes in epi-CdTe films (no CdCl2) have comparable lifetimes when compared to the best pX-CdTe films (FSLR) treated with CdCl2; Started making large-grain CdTe devices using CGG templates and epitaxially deposited CdTe.

14 SOLAR ENERGY↗

Characterization of n-Type Iodine-Doped and Indium-Doped CdTe/Cd-Se-Te Thin Films Fabricated by Close-Spaced Sublimation Epitaxy

In this study, n-type CdTe thin films, specifically iodine-doped CdTe (CdTe:I), indium-doped CdTe (CdTe:In), and indium-doped Cd-Se-Te (CST:In), were synthesized using close-spaced sublimation epitaxy (CSSE). Characterization techniques secondary ion mass spectrometry (SIMS), electron backscatter diffraction (EBSD), Hall-effect measurements, and time-resolved photoluminescence (TRPL) were employed to analyze the chemical, structural, and electronic properties of these materials. The results indicated epitaxial single crystal CSSE films grew on the single crystal substrates, with carrier density ranging from 10^14 - 10^16 cm -3 , and after post-annealing, the minority-carrier lifetimes reach near the radiative limit. Additionally, a preliminary exploration of homojunction structures with an n- type (CdTe:In /CST:In /CdTe:I) /CdTe:P /Cu /Mo configuration was performed. The best device performance was achieved with CdTe:I including CdS aiding in band alignment, resulting in a power conversion efficiency (..eta..) of 2.61% with open circuit voltage (Voc) of 850 mV, fill factor (FF) of 47.8%, and short-circuit current (Jsc) of 6.44 mA/cm 2 . The observed low Jsc and efficiency may be attributed to a buried junction and a poor interface, due to dopant interdiffusion. Consequently, further investigations focusing on interface optimization, diffusion blocking, and reduced recombination through passivation, are crucial to enhancing the efficiency of CSSE CdTe homojunction devices in the future.

cadmium compounds↗

Epitaxial Dirac Semimetal Vertical Heterostructures for Advanced Device Architectures

Exploiting the extraordinary transport and optical properties of 3D topological semimetals for device applications requires epitaxial integration with semiconductors to carefully control carrier transport, yet no studies have established heteroepitaxy on top of any topological semimetals to date. Here, a novel approach toward fabricating heterostructures is demonstrated by epitaxially incorporating the Dirac semimetal Cd 3 As 2 between Zn x Cd 1-x Te and CdTe layers via molecular beam epitaxy on GaAs (001) substrates. The approach utilizes the higher energy (001) surface of Cd 3 As 2 to stabilize 2D epitaxy of zinc blende semiconductors. To demonstrate the impact heterostructure formation offers to device performance, an all-epitaxial, barrier-type vertical photodetector is fabricated that accesses a different carrier separation mechanism than previously reported non-epitaxial junctions and consequently exhibits significantly reduced dark currents. Finally, the results highlight the important role that epitaxial integration can play in accessing advanced architectures for topological semimetal-based devices.

36 MATERIALS SCIENCE↗

Evaluation of PbTe and SnTe as Ohmic Contact Layers in CdTe Solar Cell Devices

For solar cells based on CdTe, the choice of a suitable back contact material is limited by CdTe's deep work function. Here, we explored p-type PbTe and SnTe as ohmic contacts to CdTe. These contact layers were grown on single crystal CdTe substrates by molecular beam epitaxy, and the valence band offset between film and substrate was measured using X-ray photoemission spectroscopy. Polycrystalline device structures were also grown by sublimation to assess performance improvements. Doping was achieved in PbTe by thallium incorporation. Only the highest Tl doped PbTe resulted in a desirable band alignment with the CdTe, forming an electron reflector and no hole barrier. Time-resolved photoluminescence measurements also revealed significant photocarrier lifetime improvements for only the highest doped PbTe. Consequentially, devices incorporating the highest doped PbTe layers showed increased power conversion efficiency, primarily from increased fill factor. Doping of the PbTe was measured via Hall effect with variable magnetic field, which was required due to the formation of an n-type parasitic interface layer. To properly interpret the variable field Hall measurements, we derived an expression for the magnetic field-dependent conductivity tensor of an L-valley semiconductor.

anisotropic band valley↗

Scalable ultrafast epitaxy of large-grain and single-crystal II-VI semiconductors

A general problem for semiconductor applications is that very slow deposition on expensive single-crystal substrates yields high crystalline quality with excellent electro-optical properties, but at prohibitive costs and throughput for many applications. In contrast, rapid deposition on inexpensive substrates or nanocrystalline films yields low costs, but comparatively inferior crystallinity, carrier transport, and recombination. Here, we present methods to deposit single-crystal material at rates 2-3 orders of magnitude faster than state-of-the-art epitaxy with low-cost methods without compromising crystalline or electro-optical quality. For example, single-crystal CdTe and CdZnTe films that would take several days to grow by molecular-beam epitaxy are deposited in 8 minutes by close-spaced sublimation, yet retain the same crystalline quality measured by X-ray diffraction rocking curves. The fast deposition is coupled with effective n- and p-type in-situ doping by In, P, and As. The epitaxy can be extended to nanocrystalline substrates. For example, we recrystallize thin CdTe films on glass to deposit large grains with low defect density. The results provide new research paths for photovoltaics, detectors, infrared imaging, flexible electronics, and other applications.

14 SOLAR ENERGY↗

High dopant activation in arsenic doped single-crystal CdTe thin films: Insights from MBE growth and rapid thermal processing

Single-crystal model systems are valuable tools to investigate fundamental material properties. In this work, we use molecular beam epitaxy to deposit in situ arsenic (As) doped single-crystal CdTe films on large area Si substrates to better understand As doping for photovoltaic applications. We found that As incorporation is highly temperature dependent: a substrate temperature difference of 50 °C can lead to several orders of magnitude difference in As concentration. Cd overpressure during in situ doping may limit out-diffusion of As but decrease As incorporation, especially at lower growth temperatures. Carrier concentrations greater than 10 16 cm −3 can be achieved with or without Cd overpressure when annealed at temperatures above 500 °C. However, unlike the low (∼1% to 5%) dopant activation commonly observed in polycrystalline CdTe, our films achieve significantly higher activation ratios—exceeding 50%, and in some cases approaching 80%. These values are consistent with or exceed prior reports in single-crystal CdTe systems. In addition to as-deposited arsenic concentrations, we also consider arsenic distribution after different rapid thermal processing temperatures. We propose a detailed definition and description of how arsenic incorporation is considered and calculated. Due to carrier concentration saturation, As incorporation also needs to be controlled to average levels of 10 17 cm −3 to achieve high activation. These findings suggest that higher annealing temperature regimes may be beneficial to polycrystalline CdTe based PV devices.

36 MATERIALS SCIENCE↗

Arsenic activation and compensation in single crystal CdTe bilayers

In state-of-the art polycrystalline CdTe photovoltaics, group-V dopant activation is about 2%. Low activation can create electronic defects and lead to recombination and band tail losses. To develop methods to overcome this limitation, dopant activation was systematically investigated using molecular beam epitaxy (MBE) grown single crystal bilayers of As-doped CdTe on undoped CdTe. Results suggest multiple paths for improved As-activation in polycrystalline CdTe-based devices. It was found that the carrier concentration in this MBE material saturated at ∼3 × 1016 cm−3, with high levels (>50%) of As-activation possible. High activation could be achieved with a post-growth activation temperature of ∼450 °C, when the initial doping level was below the saturation level. However, at typical polycrystalline As incorporation levels (>5 × 1016 cm−3), the excess As is inactive or compensating, requiring elevated temperatures (500–600 °C) to achieve high activation. Oxygen in the annealing ambient was detrimental, while the effect of CdCl2 in the ambient is more case-dependent. A 575 °C activation anneal was combined with a 450 °C CdCl2 treatment to better understand the implications for polycrystalline CdTe. Interestingly, on highly doped samples, processes ending with a high temperature step displayed high activation, while those ending at 450 °C significantly reduced the carrier concentration (with or without CdCl2 in the ambient). Low activation can be restored with another high temperature anneal, allowing reproducible toggling between high and low activation based on the final temperature. Photoluminescence revealed the presence of donor–acceptor pairs in the low activation state that appear to be associated with a compensating defect.

14 SOLAR ENERGY↗

Magneto-transport study on Sn-rich Sn 1–x Ge x thin films enabled by CdTe buffer layer

α-Sn, generally known as gray tin, has attracted significant scientific interest due to its potential to host novel topological phases. Studying the transport properties of α-Sn thin films grown on the InSb substrate has been challenging, as the InSb substrate also significantly contributes to the transport properties. In this article, we report a novel approach to epitaxially grow α-Sn thin films on an InSb substrate with a resistive buffer layer of CdTe. Thin films of α–Sn 1–x Ge x (x = 0, 0.025) alloy of 15 nm thickness have been grown using molecular beam epitaxy. The high quality of the samples has been determined through high-resolution x-ray diffraction. The CdTe buffer layer has high resistance and acts as an insulating virtual substrate, which significantly suppresses contribution from InSb. Magnetotransport measurements show clear Shubnikov–de Hass oscillations in α–Sn 1–x Ge x (x = 0, 0.025) thin films. A change in oscillation frequency is observed upon alloying with Ge, implying a modification in the electronic structure and demonstrating the effectiveness of the CdTe buffer layer approach. Furthermore, this work provides a new approach that enables the electronic transport characterization of the α–Sn 1–x Ge x alloy system, which enables the study of the topological quantum states using electronic transport and their device applications.

36 MATERIALS SCIENCE↗

Imaging hole-density inhomogeneity in arsenic-doped CdTe thin films by scanning capacitance microscopy

We report nanometer-scale hole-density imaging in As-doped CdTe films by scanning capacitance microscopy (SCM). The hole-density profiling is validated by contrasting a CdTe cross-section sample made by molecular-beam epitaxy with systematically increased As doping in a staircase pattern over the range of 10 15 -10 18 /cm 3 within a single film. In polycrystalline films, the carrier distribution is significantly nonuniform, with inhomogeneity ranging from several hundred nm to several um and hole density varying by one order of magnitude (low 10^16 to low 10 17 /cm 3 ). This nonuniformity is distributed randomly, independent of the grain structure and grain boundaries (GBs). Kelvin probe force microscopy (KPFM) maps the surface potential and is correlated to cathodoluminescence (CL) and SCM by imaging over identical areas. Higher potential and lower CL intensity are found on GBs but not by SCM contrast; this indicates positive GB charging and recombination, but not GB-specific hole-density changes. The overall KPFM potential image is in rough agreement with the SCM carrier distribution and indicates band-edge potential fluctuations. Nonuniform carrier concentration, potential fluctuations, and defect recombination can all cause voltage and performance loss in As-doped CdTe solar technology.

14 SOLAR ENERGY↗

Developing CdTe homojunctions applying high throughput deposition

In this project, we attempted to make CdTe homojunctions using single crystal p-type doped substrates and closed-space sublimation epitaxy (CSSE) n-type doped films. The project included modeling which determined the ideal thickness for the n-type layer as being <200 nm. Boules of high concentration indium-doped CdTe and CdSe 0.4 Te 0.6 (CST) were grown using modified vertical Bridgman (MVB) methods. Similarly, iodine-doped CdTe crystals were grown for the first time. Washington State University (WSU) stock phosphorus-doped CdTe was used as the p-type substrate layer. The crystals were characterized by Hall effect and time-resolved photoluminescence (TRPL, for electrical properties), photoluminescence microscopy (for uniformity), X-ray diffraction (for crystal structure), and glow discharge mass spectrometry (GDMS, for dopant and impurity concentration). CdTe:I crystals were also characterized by visible and infrared transmission measurements, and various Cd or Te heat treatments were performed to assess changes in optical and electrical properties. The grown n-type materials – CdTe:In, CdSe0.4Te0.6:In, and CdTe:I – were provided to the National Renewable Energy Laboratory (NREL) for growth of CSSE thick films for characterization by two photon TRPL (for carrier lifetime), electron back-scatter diffraction (EBSD, to assess epitaxy), and Hall effect. Several measurements of secondary ion mass spectroscopy (SIMS) were performed. Nearly 100% of the indium from the crystal was incorporated into the measured thick films, while only ~2-22% of the iodine from the crystal was incorporated. The net result of the diffusion issue is that homojunction devices created using CSSE have a buried homojunction, as indicated by the near infrared peak in the external quantum efficiency (EQE). Various parameterization of front and back contacts suggested that the poor device performance was primarily a result of this buried junction and not due to other effects. There may also be an issue with the CSSE film lifetime in addition to the dopant profile.

14 SOLAR ENERGY↗

Nanometer-Scale Imaging of Inhomogeneous Active Charge Carriers in Arsenic-Doped CdTe Thin Films

We report nanometer-scale imaging of active carrier distribution of As-doped CdTe films by scanning capacitance microscopy (SCM). We developed SCM sample preparation for CdTe by ion-milling followed by thermal processing. The nanometer-resolution carrier delineation for CdTe was validated by imaging on a CdTe cross-section sample made by a molecular beam epitaxy layer stack with As-doping concentrations of 10^15 ~10^18 /cm 3 . We found that the carrier distribution in As-doped films was significantly nonuniform, with inhomogeneity ranging from sub-um to a few um and concentration variation of one order of magnitude (low 10^16 to low 10^17 /cm 3 ). This nonuniformity is distributed randomly, independent of grain structure and grain boundary (GB). We used Kelvin probe force microscopy (KPFM) and cathodoluminescence (CL) to further map the surface potential and radiative illumination on the same area as the SCM image. Higher potential and lower CL intensity were found on GBs but not on SCM contrast, illustrating positive GB charging and GB recombination but not GB-distinguished doping. The overall KPFM potential image is in rough agreement with the SCM carrier distribution, in terms of Fermi-level position relative to the bandgap edge - thus resulting in the band-edge potential fluctuation. Nonuniform carrier concentration, potential fluctuation, and defect recombination can all together cause the Voc deficit of the As-doped CdTe device.

14 SOLAR ENERGY↗

Epitaxial Integration of Dirac Semimetals with Si(001)

Topological semimetals contain novel combinations of properties that make them useful in a variety of applications, including optoelectronics, spintronics and low energy computing, and catalysis. Although they have been grown with high quality as bulk single crystals, incorporation with semiconductor substrates will ultimately be required to maximize their technological reach. Here, epitaxial growth of the Dirac semimetal Cd3As2 on Si(001) is demonstrated through two routes. First, Cd3As2(112) epilayers are grown on Si(001) via an intermediate CdTe(111) buffer layer. Second, Cd3As2(112) is grown directly on Si(001). This work sets the foundation for integration of novel semimetal materials with existing CMOS technology.

36 MATERIALS SCIENCE↗