Design and analysis of a rate augmented digital-to-analog converter
Rate augmented digital-to-analog converter for computed time-dependent data
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Rate augmented digital-to-analog converter for computed time-dependent data
System, consisting of sample and hold digital-to-analog converter, clock circuit, sample delay circuit, initial condition circuit and interpolator circuit, improves accuracy of reconstructed analog signal without increasing sample rates.
Those who design piloted aircraft simulations must contend with the finite size and speed of the available digital computer and the requirement for simulation reality. With a fixed computational plant, the more complex the model, the more computing cycle time is required. While increasing the cycle time may not degrade the fidelity of the simulated aircraft dynamics, the larger steps in the pilot cue feedback variables (such as the visual scene cues), may be disconcerting to the pilot. The first-order-hold interpolation (FOHI) digital-to-analog converter (DAC) is presented as a device which offers smooth output, regardless of cycle time. The Laplace transforms of these three conversion types are developed and their frequency response characteristics and output smoothness are compared. The FOHI DAC exhibits a pure one-cycle delay. Whenever the FOHI DAC input comes from a second-order (or higher) system, a simple computer software technique can be used to compensate for the DAC phase lag. When so compensated, the FOHI DAC has (1) an output signal that is very smooth, (2) a flat frequency response in frequency ranges of interest, and (3) no phase error. When the input comes from a first-order system, software compensation may cause the FOHI DAC to perform as an FOHE DAC, which, although its output is not as smooth as that of the FOHI DAC, has a smoother output than that of the ZOH DAC.
Circuit controls a voltage controlled oscillator from computer output binary data representing a rate at which the oscillator is to change. It operates with low level output devices such as integrated circuit registers and devices with somewhat variable output levels.
Analog-to-digital and digital-to-analog converters for digital control system simulation
The amount of quantization noise generated in a digital-to-analog converter is dependent on the number of bits or quantization levels used to digitize the analog signal in the analog-to-digital converter. The minimum number of quantization levels and the minimum sample rate were derived for a digital voice channel. A sample rate of 6000 samples per second and lowpass filters with a 3 db cutoff of 2400 Hz are required for 100 percent sentence intelligibility. Consonant sounds are the first speech components to be degraded by quantization noise. A compression amplifier can be used to increase the weighting of the consonant sound amplitudes in the analog-to-digital converter. An expansion network must be installed at the output of the digital-to-analog converter to restore the original weighting of the consonant sounds. This technique results in 100 percent sentence intelligibility for a sample rate of 5000 samples per second, eight quantization levels, and lowpass filters with a 3 db cutoff of 2000 Hz.
Zero- and third-order digital-to-analog conversion techniques are described, and the theoretical error performances are compared. The design equations and procedures for constructing a third-order digital-to-analog converter by using analog design elements are presented. Both a zero- and a third-order digital-to-analog converter were built, and the performances are compared with various signal inputs.
Hybrid servo-positioning system and experimental facility for computer controlled manipulator - digital-to-analog converter, RC active filter, and phase switching servoamplifier
Converter is used to energize group of proportional-counter event-detection tubes. Supply is programmed by using output signal of low voltage digital-to-analog converter. Programming voltage ranges from 1.53 to 2.91 V in 127 0.0108 mV steps, and it is used to control converter high voltage output which ranges from 700 to 1,335 V in like number of increments.
A dc analog input can be used to produce an integrator with high dynamic range or a position servo with inherent stability. This is done by a switching system using digital-to-analog converters and an electronic switch to obtain the desired outputs.
Curve generator capable of producing precisely repeatable curve for any single-valued function of voltage versus time uses digital approach, implemented by means of clocked feedback shift register, large scale integrated circuit diode matrix comprising about 12,000 diodes, counter, and digital-to-analog converter.
Handbook was published on study which describes relative merits of two general-purpose, steroscopic display systems. Both systems are adaptable to most small data processing facilities and, with minimal hardware development, greatly enhance user ability to interact with computer and to interpret data output. Section also describes digital-to-analog converters designed for use with system.
A computer-controlled data acquisition system has been developed for the 40x80-foot wind tunnel at Ames Research Center. The system, consisting of several small onboard units installed in the model and a data-managing, data-displaying ground station, is capable of sampling up to 256 channels of raw data at a total sample rate of 128,000 samples/sec. Complete signal conditioning is contained within the on-board units. The sampling sequence and channel gain selection is completely random and under total control of the ground station. Outputs include a bar-graph display, digital-to-analog converters, and digital interface to the tunnel's central computer, an SEL 840MP. The system can be run stand-alone or under the control of the SEL 840MP.
Voice (analog) signal is converted to its digital equivalent and stored in solid state memory. Upon command, memory becomes part of annunciator system which includes other digital logic, digital-to-analog converter, and audio amplifier.
Generator employs up/down counters, digital-to-analog converters, and integrator to determine frequency and time duration of output. Circuit can be used where varying signal must be controlled accurately over long period of time.
A three-level sampler is described that has its thresholds controlled automatically so as to track changes in the statistics of the random process being sampled. In particular, the mean value is removed and the ratio of the standard deviation of the random process to the threshold is maintained constant. The system is configured in such a manner that slow drifts in the level comparators and digital-to-analog converters are also removed. The ratio of the standard deviation to threshold level may be chosen within the constraints of the ratios of two integers N and M. These may be chosen to minimize the quantizing noise of the sampled process.
Design of printer system capable of 20,000 characters per second
DATA CORE, integrated launch area telemetry data system using high speed digital computers and analog or digital display