Industrial survey of electronic packaging
Electronic packaging, integrated circuits, circuit design, and microcircuit design - survey with bibliography
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Electronic packaging, integrated circuits, circuit design, and microcircuit design - survey with bibliography
New Millennium Deep Space 2 (DS2) is the second project of the New Millennium Program series being managed by the Jet Propulsion Laboratory (JPL). The project consists of a pair of probes that will be carried on the cruise ring of the Mars Polar Surveyor Lander.
The electronics system of the Telstar satellite is described from the point of view of philosophy of design and construction rather than that of circuit details. The reliability is emphasized, and steps taken to preserve the inherent reliability of the components are discussed. The physical construction of modules, subsystems, and finally the entire system is described, including the foam encapsulation and the eventual hermetic sealing of the canister.
Electronic packaging and interconnections are the elements that today limit the ultimate performance of advanced electronic systems. Materials in use today and those becoming available are critically examined to ascertain what actions are needed for U.S. industry to compete favorably in the world market for advanced electronics. Materials and processes are discussed in terms of the final properties achievable and systems design compatibility. Weak points in the domestic industrial capability, including technical, industrial philosophy, and political, are identified. Recommendations are presented for actions that could help U.S. industry regain its former leadership position in advanced semiconductor systems production.
Platform Electronics Package in Omega Navigational System and synchronous satellites use for global location and data collection system
A modular electronics packaging system includes multiple packaging slices that are mounted horizontally to a base structure. The slices interlock to provide added structural support. Each packaging slice includes a rigid and thermally conductive housing having four side walls that together form a cavity to house an electronic circuit. The chamber is enclosed on one end by an end wall, or web, that isolates the electronic circuit from a circuit in an adjacent packaging slice. The web also provides a thermal path between the electronic circuit and the base structure. Each slice also includes a mounting bracket that connects the packaging slice to the base structure. Four guide pins protrude from the slice into four corresponding receptacles in an adjacent slice. A locking element, such as a set screw, protrudes into each receptacle and interlocks with the corresponding guide pin. A conduit is formed in the slice to allow electrical connection to the electronic circuit.
The lifetime of a power electronics package is, to a large extent, determined by the reliability of its bonded interfaces under major loading conditions in an operational environment. Based on the application-level requirements of the package, bonded interface material is selected based on the results obtained from accelerated tests such as thermal cycling and power cycling. In addition to evaluating the reliability through accelerated tests, it is important to consider the impact of other component layers on the thermomechanical performance of the interface material, both from a material and geometric perspective. The co-efficient of thermal expansion (CTE) mismatch introduced by the use of different materials within a package and its structural design plays a critical role in determining the interface material reliability. In this paper, we present the results of a parametric modeling study of a power electronics package under thermal cycling in which the materials and geometric design of the different component layers were varied with respect to a baseline design to understand their impact on the reliability of the interface material. We chose the volume-averaged strain energy density per cycle computed at the corner region of the interface material as the metric for the reliability comparisons. Our results indicate that in addition to the CTE mismatch, the stiffness of individual component layers has a major impact on reliability. Among the different baseplates that we studied, aluminum silicon-carbide baseplates offered superior reliability over their copper and aluminum counterparts. We also found that the magnitude of the impact of stiffness variation—amongst the adjacent layers—on the reliability of the solder joint is dependent on the inherent CTE mismatch between the layers.
Heat sinks in electronic packaging can be flame sprayed with dielectric coatings of alumina or beryllia and finished off with an organic sealer to provide high heat and electrical resistivity.
The laser has proven its worth in numerous high reliability electronic packaging applications ranging from medical to missile electronics. In particular, the pulsed YAG laser is an extremely flexible and versatile too] capable of hermetically sealing microelectronics packages containing sensitive components without damaging them. This paper presents an overview of details that must be considered for successful use of laser welding when addressing electronic package sealing. These include; metallurgical considerations such as alloy and plating selection, weld joint configuration, design of optics, use of protective gases and control of thermal distortions. The primary limitations on use of laser welding electronic for packaging applications are economic ones. The laser itself is a relatively costly device when compared to competing welding equipment. Further, the cost of consumables and repairs can be significant. These facts have relegated laser welding to use only where it presents a distinct quality or reliability advantages over other techniques of electronic package sealing. Because of the unique noncontact and low heat inputs characteristics of laser welding, it is an ideal candidate for sealing electronic packages containing MEMS devices (microelectromechanical systems). This paper addresses how the unique advantages of the pulsed YAG laser can be used to simplify MEMS packaging and deliver a product of improved quality.
The NASA John H. Glenn Research Center is developing a Compact-PCI (CPCI) based electronics package for controlling space experiment hardware on the International Space Station. Goals of this effort include an easily modified, modular design that allows for changes in experiment requirements. Unique aspects of the experiment package include a flexible circuit used for internal interconnections and a separate enclosure (box in a box) for controlling 1 kW of power for experiment fuel heating requirements. This electronics package was developed as part of the FEANICS (Flow Enclosure Accommodating Novel Investigations in Combustion of Solids) mini-facility which is part of the Fluids and Combustion Facility s Combustion Integrated Rack (CIR). The CIR will be the platform for future microgravity combustion experiments and will reside on the Destiny Module of the International Space Station (ISS). The FEANICS mini-facility will be the primary means for conducting solid fuel combustion experiments in the CIR on ISS. The main focus of many of these solid combustion experiments will be to conduct applied scientific investigations in fire-safety to support NASA s future space missions. A description of the electronics package and the results of functional testing are the subjects of this report. The report concludes that the use of innovative packaging methods combined with readily available COTS hardware can provide a modular electronics package which is easily modified for changing experiment requirements.
Electronic packaging methods for surveyor spacecraft modules such as the television system, discussing foam sandwich chassis construction and the use of cordwood modules
Annotated bibliography of literature on electronic packaging for use in designing electronic equipment
The lifetime of a power electronics package is, to a large extent, determined by the reliability of its bonded interfaces under major loading conditions in an operational environment. Based on the application-level requirements of the package, bonded interface material is selected based on the results obtained from accelerated tests such as thermal cycling and power cycling. In addition to evaluating the reliability through accelerated tests, it is important to consider the impact of other component layers on the thermomechanical performance of the interface material, both from a material and geometric perspective. The co-efficient of thermal expansion (CTE) mismatch introduced by the use of different materials within a package and its structural design plays a critical role in determining the interface material reliability. In this paper, we present the results of a parametric modeling study of a power electronics package under thermal cycling in which the materials and geometric design of the different component layers were varied with respect to a baseline design to understand their impact on the reliability of the interface material. We chose the volume-averaged strain energy density per cycle computed at the corner region of the interface material as the metric for the reliability comparisons. Our results indicate that in addition to the CTE mismatch, the stiffness of individual component layers has a major impact on reliability. Among the different baseplates that we studied, aluminum silicon-carbide baseplates offered superior reliability over their copper and aluminum counterparts. We also found that the magnitude of the impact of stiffness variation—amongst the adjacent layers—on the reliability of the solder joint is dependent on the inherent CTE mismatch between the layers.
The intent of this presentation is to give a brief look into the future of electronic packaging for microspacecraft applications. Advancements in electronic packaging technology areas have developed to the point where a system engineer's visions, concepts, and requirements for a microspacecraft can now be a reality. These new developments are ideal candidates for microspacecraft applications. These technologies are capable of bringing about major changes in how we design future spacecraft while taking advantage of the benefits due to size, weight, power, performance, reliability , and cost. This presentation will also cover some advantages and limitations of surface mount technology (SMT), multichip modules (MCM), and wafer scale integration (WSI), and what is needed to implement these technologies into microspacecraft.
Electronic packaging and cabling activities performed in support of the Thermoelectric Outer Planets Spacecraft (TOPS) Advanced Systems Technology (AST) project are detailed. It describes new electronic compartment, electronic assembly, and module concepts, and a new high-density, planar interconnection technique called discrete multilayer (DML). Development and qualification of high density cabling techniques, using small gage wire and microminiature connectors, are also reported.
Packaging electronic circuitry inside ferrite pot cores
Thermal design of electronic packaging of Nimbus satellite control system
Thermal fatigue life testing of various electronic packaging technologies is being performed by the Reliability Technology Group at the Jet Propulsion Laboratory. These testing efforts are in progress to improve uderstanding of the reliability issues associated with low volume packaging technologies for space applications and to develop qualification and acceptance approaches for these technologies. The work described here outlines the electrical failure detection techniques used during testing by documenting the circuits and components used to make these measurements, the sensitivity of the measurements, and the applicability of each specific measurement.