Spectroscopy of proton-rich 79 Zr: Mirror energy differences in the highly-deformed fpg shell
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75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗
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1MV Febetron Pulse Generator Operator's Manual
The Febetron Pulse Generator (FPG) is an experimental assembly used to store electrical energy for a period of time and then release that energy over a short duration pulse to achieve high instantaneous power outputs. The FPG is an ideal device to be used for a variety high energy physics experiments. For mobility and ease of repeatable operation, the FPG is secured on a rolling test fixture and paired with a diagnostic and controls rack. The combination of the FPG, test fixture cart, SF6 gas cart, and controls rack is identified as the Pulse Generator Testing Assembly (PGTA). This document outlines all necessary information regarding the working principles, assembly/disassembly, maintenance, operation, uses, hazards, and experimental procedures of the 1 Mega Volt (MV) PGTA. This document, in addition to the manufacturer’s manuals, should be utilized as a reference whenever working with the PGTA and any of its components.
42 ENGINEERING↗
1MV Pulse Generator Experiment System [Slides]
The Febetron Pulse Generator (FPG) is an experimental assembly used to store electrical energy for a period of time and then release that energy over a short duration pulse to achieve high instantaneous power outputs. The FPG is an ideal device to be used for a variety high energy physics experiments: Flashover Insulator Breakdown Studies, UHV Electrical Breakdown Testing, Flash Radiography, and EMP Studies.
42 ENGINEERING↗
Generating clock signals for a cycle accurate, cycle reproducible FPGA based hardware accelerator
A method, system and computer program product are disclosed for generating clock signals for a cycle accurate FPGA based hardware accelerator used to simulate operations of a device-under-test (DUT). In one embodiment, the DUT includes multiple device clocks generating multiple device clock signals at multiple frequencies and at a defined frequency ratio; and the FPG hardware accelerator includes multiple accelerator clocks generating multiple accelerator clock signals to operate the FPGA hardware accelerator to simulate the operations of the DUT. In one embodiment, operations of the DUT are mapped to the FPGA hardware accelerator, and the accelerator clock signals are generated at multiple frequencies and at the defined frequency ratio of the frequencies of the multiple device clocks, to maintain cycle accuracy between the DUT and the FPGA hardware accelerator. In an embodiment, the FPGA hardware accelerator may be used to control the frequencies of the multiple device clocks.
Asaad, Sameh W.↗
Experimental Study on Flow Condensation of Low Global Warming Potential Refrigerants in a Micro-fin Aluminum Tube
This study investigates the dynamic shifts in refrigerant technologies driven by environmental regulations, particularly emphasizing low global warming potential (GWP). Moreover, there is a rising trend in the adoption of aluminum tubes with internal axial micro-fin structures in heat exchangers to reduce costs. The research focuses on the condensation process within an expanded axial micro-fin aluminum tube with a 5.96 mm fin-tip diameter. Various refrigerants are analyzed, including both single compounds (R-32, R-1234yf, R-1234ze(E)) and zeotropic mixtures (R-454B, R-454C, R-455A). Experimental procedures cover a range of condensation temperatures (35~45 °C), reduced pressures (0.21~0.55), and mass fluxes (150~350 kg/(m² s)), providing crucial data on heat transfer coefficients (HTC) and frictional pressure gradient (FPG). This data is particularly significant for high-glide refrigerants and is instrumental in the design of advanced air conditioning and refrigeration systems aimed at mitigating global warming.
Hu, Yifeng↗
Automatic Qubit Characterization and Gate Optimization with QubiC
As the size and complexity of a quantum computer increases, quantum bit (qubit) characterization and gate optimization become complex and time-consuming tasks. Current calibration techniques require complicated and verbose measurements to tune up qubits and gates, which cannot easily expand to the large-scale quantum systems. We develop a concise and automatic calibration protocol to characterize qubits and optimize gates using QubiC, which is an open source FPGA (field-programmable gate array) based control and measurement system for superconducting quantum information processors. We propose multi-dimensional loss-based optimization of single-qubit gates and full XY-plane measurement method for the two-qubit CNOT gate calibration. We demonstrate the QubiC automatic calibration protocols are capable of delivering high-fidelity gates on the state-of-the-art transmon-type processor operating at the Advanced Quantum Testbed at Lawrence Berkeley National Laboratory. Finally, the single-qubit and two-qubit Clifford gate infidelities measured by randomized benchmarking are of 4.9(1.1) × 10 -4 and 1.4(3) × 10 -2 , respectively.
97 MATHEMATICS AND COMPUTING↗