Unijunction frequency divider.
Frequency divider using unijunction transistors, each stage relaxation oscillator designed to reduce backward loading to minimum
UNIPOLAR TRANSISTOR↗
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Universal odd-modulus frequency divider
Simple circuit divides frequency by preselected odd number. Exclusive-OR gate, divide-by-N circuit, and flip-flop are only components. Input pulses must be symmetrical.
Engel, A.↗
A 100-kHz frequency divider, distribution amplifier
A frequency divider, distribution amplifier module having low phase noise and low phase drift with temperature and high isolation between outputs was developed for use in the hydrogen maser frequency standard, where it divides 1 MHz from the previous frequency divider down to 100 kHz and provides four transistor-transistor logic (TTL) outputs.
Lutes, G.↗
Wide band receiver system frequency divider
Wideband receiver system frequency divider
WIDEBAND COMMUNICATION↗
Use of a Frequency Divider to Evaluate an SOI NAND Gate Device, Type CHT-7400, for Wide Temperature Applications
Frequency dividers constitute essential elements in designing phase-locked loop circuits and microwave systems. In addition, they are used in providing required clocking signals to microprocessors and can be utilized as digital counters. In some applications, particularly space missions, electronics are often exposed to extreme temperature conditions. Therefore, it is required that circuits designed for such applications incorporate electronic parts and devices that can tolerate and operate efficiently in harsh temperature environments. While present electronic circuits employ COTS (commercial-off- the-shelf) parts that necessitate and are supported with some form of thermal control systems to maintain adequate temperature for proper operation, it is highly desirable and beneficial if the thermal conditioning elements are eliminated. Amongst these benefits are: simpler system design, reduced weight and size, improved reliability, simpler maintenance, and reduced cost. Devices based on silicon-on-insulator (SOI) technology, which utilizes the addition of an insulation layer in the device structure to reduce leakage currents and to minimize parasitic junctions, are well suited for high temperatures due to reduced internal heating as compared to the conventional silicon devices, and less power consumption. In addition, SOI electronic integrated circuits display good tolerance to radiation by virtue of introducing barriers or lengthening the path for penetrating particles and/or providing a region for trapping incident ionization. The benefits of these parts make them suitable for use in deep space and planetary exploration missions where extreme temperatures and radiation are encountered. Although designed for high temperatures, very little data exist on the operation of SOI devices and circuits at cryogenic temperatures. In this work, the performance of a divide-by-two frequency divider circuit built using COTS SOI logic gates was evaluated over a wide temperature range and thermal cycling to determine suitability for use in space exploration missions and terrestrial fields under extreme temperature conditions.
Patterson, Richard L.↗
Low phase noise digital frequency divider
A low phase noise frequency divider composed of a grating arrangement is disclosed. The grating arrangement supplies selected portions of an input reference signal to be divided to a tuned circuit without any phase noise due to the grating action. The arrangement which in one embodiment consists of an FET is connected to the tuned circuit input to short out the input except when the input reference signal amplitude crosses ground level in a positive direction and a gate enabling signal is present at the gate electrode of the FET. The gate enabling signal alone does not decouple the tuned circuit input from ground, therefore phase noise, due to the leading and trailing edges of each gate-enabling signal, is substantially eliminated.
Lutes, G. F., Jr.↗
Improved frequency divider employs transistor avalanche effect
New frequency divider circuit can be synchronized over a wider input control frequency range, has greater phase stability, and is less sensitive to temperature changes than conventional synchronized oscillators. The new circuit uses the avalanche breakdown mode of operation of transistors.
Johns, C. E.↗
Frequency divider is free of spurious outputs
Frequency divider provides sixteen output states free of spurious pulses from four input circuits. The input is binary coded, and a change of one in the input only changes the number of output states by one.
Mc Dermond, D.↗
Unijunction frequency divider is free of backward loading
Simple frequency divider composed of relaxation oscillators uses unijunction transistors to reduce backward loading to a minimum. This circuit design is applicable in timing devices and sync generators for television systems.
Fairbanks, A. F.↗
Evaluation of crystal oscillators and frequency dividers for high temperature operation
Active and passive components of crystal oscillators and frequency dividers were tested to determine their performance at temperatures from 300 C to 350 C. The properties of GaAs JFETs were determined and their performance compared with that of silicon devices. Techniques for constructing breadboard circuits were assessed for operation in this temperature range. A Pierce oscillator and a multivibrator (Colorado crystal) oscillator were constructed and tested. Device failures are discussed.
Source record↗
Cryogenic-Refined MOSFET Modeling for Oscillator, Frequency Divider, and Amplifier Designs Below 4 K
Capturing device characteristic changes at cryogenic temperatures is crucial for cryo-CMOS circuit designs. In this work, we present an isothermal cryogenic-refined modeling approach for CMOS transistors that is simple, low overhead, and easy to implement while offering the required accuracy for predicting circuit performance at the designated temperatures. Guided by die-level measurement data and circuit design principles, the model introduces corrections to only five critical parameters: threshold voltage, carrier mobility, elevated low-frequency flicker noise, dominant high-frequency shot noise, and subthreshold swing (SS). These refinements are implemented around the foundry-provided SPICE model, which is typically validated only down to about 200 K. With these adjustments, the proposed cryogenic-refined model achieves less than 5% error in both large-signal metrics (I–V characteristics) and small-signal parameters (e.g., transconductance) when compared with device measurements at deep-cryogenic temperatures. The methodology is validated in two advanced technologies: TSMC 40-nm CMOS and GlobalFoundries (GF) 45-nm RF-SOI. We further demonstrate its applicability in three representative RF circuits: a 30-GHz LC oscillator, a high-speed current-mode-logic (CML) frequency divider (FD), and a subthreshold Gb/s amplifier, all showing close agreement between simulated predictions and measurements performed at 4 and 2.5 K. Finally, we believe that the proposed approach is implementation-friendly and can significantly accelerate the development of cryo-CMOS integrated circuits.
circuit modeling↗
Low phase-noise digital frequency divider
Digitally generated countdown pulse at submultiple frequency is applied to one electrode of FET gate to establish threshold state; gate cannot function until desired portion of reference half-wave pulse which is to be passed appears on second electrode.
Lutes, G. F., Jr.↗
Design of Timer Circuit for Dynamic Data System
The Branch That I work in is in the Aero Electronic Test Branch, which is part of the Research and Testing Division. The Aero Electronic Test Branch deals with electronic control and instrumentation systems. This branch supports the research and test study of wind tunnels such as the l0x10,9x15, and 8x6. Wind tunnels are used in research to test certain parts of a jet, plane, shuttle or any other flying object in certain test conditions. My assignment is to design a programmable trigger circuit on a 19 standard rack mount that will allow the circuit to latch and hold for a predefined amount of time entered by the user when receiving a signal. It should then re-arm itself within 0.25 seconds after the time is finished. The time should be able to be seen on a display showing the time entered. The time range has to be from 0-600 seconds in 0.01 second increments (600.00). From the information given, counters will be needed to design and build this circuit. A counter, in it s simplest form, is a group of flip flops that can temporarily store bits of information put into the circuit. They can be constructed in many different ways, such as in 4 flip flops (4-bit counter) or 8 flip flops and even higher. Counters are usually cascaded with other counters to reach higher bits, such as 16 or 24 bit counters. The application in which I will use the counters will be to count down from any programmable number that I input either by a keyboard or a thumbwheel. Also, I will use counters that will be used specifically as a frequency divider to divide the pulses that enter the circuit through an input signal from a crystal clock. The pulses will need to be divided so that it will function as a 100Hz clock putting out 100 pulses per second. A switch will be used to load my inputs in and more than likely a button also so that I can stop and hold the count at any point of time. I will use 5 BCD up/down programmable counters, and a certain amount (depending on what kind of "divide by N" counter I use) of frequency dividing counters for the assignment. After the design is carefully made, a task order will be written and then given to the manufacturer to create a rack mount circuit board that will match my specifications given. The applications in which this design will be used for is in the use of the six-component balance signal conditioner for measurement and electronic system control. It can be used as a timer system for the balance signal conditioner in which it does numerous tests for the Wind tunnel research, in which a preset time can be set for how long it performs its tests. Specifically, my design should be applied to the balance signal conditioner used for the 8x6 wind tunnel research. Hopefully this design should aid in more efficient research for the 8x6 wind tunnel.
Young, Nathaniel, III↗
Apparatus and Method to Enable Precision and Fast Laser Frequency Tuning
An apparatus and method is provided to enable precision and fast laser frequency tuning. For instance, a fast tunable slave laser may be dynamically offset-locked to a reference laser line using an optical phase-locked loop. The slave laser is heterodyned against a reference laser line to generate a beatnote that is subsequently frequency divided. The phase difference between the divided beatnote and a reference signal may be detected to generate an error signal proportional to the phase difference. The error signal is converted into appropriate feedback signals to phase lock the divided beatnote to the reference signal. The slave laser frequency target may be rapidly changed based on a combination of a dynamically changing frequency of the reference signal, the frequency dividing factor, and an effective polarity of the error signal. Feed-forward signals may be generated to accelerate the slave laser frequency switching through laser tuning ports.
Chen, Jeffrey R.↗
A low-power battery ampere-hour meter
A digital device has been developed to meter the current drain of a battery in ampere hours. The device consists of a voltage controlled oscillator (VCO), a frequency divider, an accumulator, and a liquid crystal display. A voltage proportional to load current is converted into a clock signal whose pulse rate is scaled by the frequency divider to the desired engineering units. Final output pulses are counted and displayed. The use of MOSFET and CMOS integrated circuits allows continuous battery-powered operation over a 3-month time period to an accuracy of +/- 2 percent. The instrument will find application where accurate monitoring of battery charge/discharge status is required over long time intervals.
Tripp, John S.↗
Propagation of transverse waves in a radially expanding plasma
Investigation of the properties of low-frequency transverse waves in an expanding plasma. The wave vector, the background magnetic field, and the streaming velocity of the plasma are all assumed to lie along the radial direction. Expressions are presented for the radial dependence of the amplitude and phase of left and right circularly polarized waves, correct to first order in the wave frequency divided by the proton cyclotron frequency. Differences in the phase velocities of these two circular polarizations result in a Faraday rotation that can be substantial for typical interplanetary conditions near 1 AU. The implications of these results for a realistic solar wind model with the interplanetary magnetic field along the spiral direction are also considered.
Solodyna, C. V.↗
Error correction method and apparatus for electronic timepieces
A method and apparatus for correcting errors in an electronic digital timepiece that includes an oscillator which has a 2 in. frequency output, an n-stage frequency divider for reducing the oscillator output frequency to a time keeping frequency, and means for displaying the count of the time keeping frequency. In first and second embodiments of the invention the timepiece is synchronized with a time standard at the beginning of the period of time T. In the first embodiment of the invention the timepiece user observes E (the difference between the time standard and the timepiece time at the end of the period T) and then operates a switch to correct the time of the timepiece and to obtain a count for E. In the second embodiment of the invention, the user operates a switch at the beginning of T and at the end of T and a count for E is obtained electronically.
Davidson, J. R.↗