ProfileSR-GAN: A GAN Based Super-Resolution Method for Generating High-Resolution Load Profiles
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This Letter reports the performance of vertical GaN-on-GaN p–n diodes with etch-then-regrown p-GaN after exposure to a simulated Venus environment (460 °C, ∼94 bar, containing CO2/N2/SO2 etc., atmosphere) for over 10 days, and compared them to the performance of GaN p–n diodes without the etch-then-regrow process. After the above-mentioned Venus test, temperature-dependent I–V and microscopy investigation were conducted to study the robustness of etch-then-regrow p-GaN and vertical GaN p–n diodes under harsh environments and operation up to 500 °C. p-electrode degradation is found to be the main issue of the device's performance. This is the highest temperature at which such characterization has been conducted for vertical GaN p–n diodes, therefore establishing a critical reference for the development of p-GaN regrown and vertical GaN-based electronics for extreme environments.
Here, to mimic selective-area doping, p -GaN was regrown on an etched GaN surface on GaN substrates by metalorganic chemical vapor deposition. Vertical GaN-on-GaN p - n diodes were fabricated to investigate the effects of the etch-then-regrowth process on device performance. The crystal quality of the sample after each epitaxial step was characterized by X-ray diffraction, where the etch-then-regrowth process led to a very slight increase in edge dislocations. A regrowth interfacial layer was clearly shown by transmission electron microscopy. Strong electroluminescence was observed with three emission peaks at 2.2 eV, 2.8 eV and 3.0 eV, respectively. The forward current density increased slightly with the increasing temperature, while the reverse current density was almost temperature independent indicating tunneling as the reverse transport mechanism. This result is very similar to the reported Zener tunnel diode comprising a high doping profile at the junction interface. High levels of silicon and oxygen concentrations were observed at the regrowth interface with a distribution width of ~100 nm. This work provides valuable information of p -GaN regrowth and regrown GaN p - n diodes, which can serve as an important reference for developing selective doping for advanced GaN power electronics for high voltage and high power applications.
This paper reviews the near-equilibrium ammonothermal (NEAT) growth of bulk gallium nitride (GaN) crystals and reports the evaluation of 2″ GaN substrates and 100 mmbulk GaN crystal grown in our pilot production reactor. Recent progress in oxygen reduction enabled growing NEAT GaN substrates with lower residual oxygen, coloration, and optical absorption. The oxygen concentration was approximately 2 × 1018 cm−2, and the optical absorption coefficient was 1.3 cm−1 at 450 nm. Maps of full-width half maximum (FWHM) of X-ray diffraction rocking curveswere generated for grown crystals and finished wafers. The X-ray rocking curve maps confirmed high-quality and uniform microstructure across the entire surface of the bulk crystals and substrates. The average FWHM of the 50 best bulk crystals from the recent batch was 28 ± 4 arcsec for the 002 diffraction and 34 ± 5 arcsec for the 201 diffraction, with an average radius of curvature of 20 m. X-ray topography measured on both sides of the bulk crystals implied that the density of dislocations wasreduced by one order of magnitude during the NEAT growth. A typical NEAT GaN substrate shows dislocation density of about 2 × 105 cm−2.
We report nonpolar vertical GaN-on-GaN p–n diodes grown on m-plane free-standing substrates. Cathodoluminescence measurements showed that the nonpolar p-GaN had a high quality with very few deep-level states. The device exhibited good rectifying behaviors with a turn-on voltage of 4.0 V, on-resistance of 2.3 mΩ∙cm 2 , and high on/off ratio of 10 10 . The reverse current leakage was described by a trap-assisted space-charge- limited current conduction mechanism. The critical electrical field was calculated to be 2.0 MV/cm without field plates or edge termination. Finally, these results pave the way for development of novel nonpolar power electronics and polarization-engineering-related advanced power devices.
Fabricating a regrown GaN p-n junction includes depositing a n-GaN layer on a substrate including n + -GaN, etching a surface of the n-GaN layer to yield an etched surface, depositing a p-GaN layer on the etched surface, etching a portion of the n-GaN layer and a portion of the p-GaN layer to yield a mesa opposite the substrate, and passivating a portion of the p-GaN layer around an edge of the mesa. The regrown GaN p-n junction is defined at an interface between the n-GaN layer and the p-GaN layer. The regrown GaN p-n junction includes a substrate, a n-GaN layer on the substrate having an etched surface, a p-GaN layer on the etched surface, a mesa defined by an etched portion of the n-GaN layer and an etched portion of the p-GaN layer, and a passivated portion of the p-GaN layer around an edge of the mesa.
A major challenge in gallium nitride (GaN) vertical power devices and other large bandgap materials is the high defect density that compromises the performance, reliability, and yield. Defects are typically nucleated at the heterointerface where there are both lattice and thermal mismatches. In this paper, we report the selective area growth (SAG) of thick GaN on Si and on the newly available Qromis Substrate Technology™ (QST) substrates that lead to a significant reduction of the defect densities to a level that is nearly comparable to that on native substrates by defect annihilation. We performed a parametric study of the electrical properties of the SAG GaN layers by fabricating and characterizing Schottky barrier diodes for SAG GaN layer thicknesses of 5, 10, 15, and 20 μm for GaN-on-Si, GaN-on-QST, and GaN-on-GaN diodes. While thicker layers led to a significant reduction in defect densities and improvement in the diode forward current characteristics, the GaN-on-QST diodes exhibited nearly similar characteristics to the GaN-on-GaN diodes. Further improvement in the device structure and/or SAG growth for GaN-on-Si is needed to achieve a comparable performance as the defect densities in the GaN-on-Si are comparable to that of GaN-on-QST substrates.
The thermal conductivity (Λ) of wide-band-gap semiconductors GaN and SiC is critical for their application in power devices and optoelectronics. Here, we report time-domain thermoreflectance measurements of Λ in GaN, 71 GaN, and SiC between 150 and 850 K. The samples include bulk c- and m-plane wurtzite GaN grown by hydride vapor phase epitaxy (HVPE) and ammonothermal methods; homoepitaxial natural isotope abundant GaN and isotopically enriched 71 GaN layers with thickness of 6–12 μm grown on c-, m-, and a-plane GaN substrates grown by HVPE; and bulk crystals of 4H and 6H SiC. In low dislocation density (<10 7 cm –2 ) bulk and homoepitaxial GaN, Λ is insensitive to crystal orientation and doping concentration (for doping <10 19 cm –3 ); Λ ≈ 200 W m –1 K –1 at 300 K and ≈ 50 W m –1 K –1 at 850 K. In 71 GaN epilayers at 300 K, Λ is ≈15% higher than in GaN with natural isotope abundance. The measured temperature dependence of Λ in GaN is stronger than predicted by first-principles based solutions of the Boltzmann transport equation that include anharmonicity up to third order. This discrepancy between theory and experiment suggests possible significant contributions to the thermal resistivity from higher-order phonon scattering that involve interactions between more than three phonons. The measured Λ of 4H and 6H SiC is anisotropic, in good agreement with first-principles calculations, and larger than GaN by a factor of ≈1.5 in the temperature range 300 < T < 850K. Furthermore, this paper provides benchmark knowledge about the thermal conductivity in wide-band-gap semiconductors of GaN, 71 GaN, and SiC over a wide temperature range for their applications in power electronics and optoelectronics.
Fabricating a vertical-channel junction field-effect transistor includes forming an unintentionally doped GaN layer on a bulk GaN layer by metalorganic chemical vapor deposition, forming a Cr/SiO 2 hard mask on the unintentionally doped GaN layer, patterning a fin by electron beam lithography, defining the Cr and SiO 2 hard masks by reactive ion etching, improving a regrowth surface with inductively coupled plasma etching, removing hard mask residuals, regrowing a p-GaN layer, selectively etching the p-GaN layer, forming gate electrodes by electron beam evaporation, and forming source and drain electrodes by electron beam evaporation. The resulting vertical-channel junction field-effect transistor includes a doped GaN layer, an unintentionally doped GaN layer on the doped GaN layer, and a p-GaN regrowth layer on the unintentionally doped GaN layer. Portions of the p-GaN regrowth layer are separated by a vertical channel of the unintentionally doped GaN layer.
Unintentional impurity incorporation in GaN drift layers represents a challenging issue that can limit their potential performance in vertical power devices. In this paper, we focus on studying the origins of Fe impurity incorporation in metal-organic chemical vapor deposition (MOCVD) grown GaN materials. Acting as a compensator in n-type GaN drift layers, Fe impurities can reduce the electron mobility in GaN and limit the lowest controllable doping level. Two sources, the sample cleaning process and growth susceptor, were identified as the main mechanisms of Fe incorporation in the MOCVD GaN growth process. It was found that solvent cleaning of the wafer can introduce significant Fe contamination at the growth interface, which would slowly be incorporated into the GaN epilayer, thus causing background Fe impurity as high as 10 17 cm -3 level. Moreover, the Fe impurity in the coating material on the susceptor can introduce additional Fe impurity during the growth process. Our studies revealed that the Fe impurity level could be significantly suppressed by more than two orders when an alternative cleaning process was used and the susceptor surface was fully covered by substrates. Characterization of the Fe impurity concentrations was performed via secondary ion mass spectrometry. The trap level (E C - 0.57) eV from deep-level transient spectroscopy that had previously been attributed to Fe confirmed the carrier compensation effect from Fe. Room temperature Hall mobility as high as 1007 cm 2 /V s was achieved on the MOCVD grown low-Fe GaN. Results from this work will provide guidance for achieving high purity GaN toward high performance GaN vertical power devices.
This paper explores performance enhancement of the common ground dynamic dc‐link (CGDL) inverter for single phase photovoltaic (PV) applications by a combination of gallium nitride (GaN) devices, split phase topology, coupled inductors, and zero voltage transition (ZVT) scheme. The CGDL inverter has the inherent advantage of minimised dc‐link capacitance and negligible leakage current due to the common ground configuration, but its reported efficiency was usually lower because of the higher dc‐link voltage used for the reduction of decoupling capacitance to a great extent. To solve the efficiency problem, in this study, a soft switching circuit is proposed for the first stage, while a coupled inductor integrated magnetics is incorporated in the second stage to reduce inductor loss, volume, and cost. Both of these topological improvements combined with the use of GaN devices facilitate in achieving high efficiency without compromising converter power density. Extensive experimental results are provided from a GaN based 1 kVA hardware prototype to demonstrate the superior performance of the CGDL inverter attaining a peak efficiency of 98.7% and a California Energy Commission efficiency of 98.5% at 75/50 kHz switching frequency.
This paper presents a deep-learning framework, Multi-load Generative Adversarial Network (MultiLoad-GAN), for generating a group of synthetic load profiles (SLPs) simultaneously. The main contribution of MultiLoad-GAN is the capture of spatial-temporal correlations among a group of loads that are served by the same distribution transformer. This enables the generation of a large amount of correlated SLPs required for microgrid and distribution system studies. Here, the novelty and uniqueness of the MultiLoad-GAN framework are three-fold. First, to the best of our knowledge, this is the first method for generating a group of load profiles bearing realistic spatial- temporal correlations simultaneously. Second, two complementary realisticness metrics for evaluating generated load profiles are developed: computing statistics based on domain knowledge and comparing high-level features via a deep-learning classifier. Third, to tackle data scarcity, a novel iterative data augmentation mechanism is developed to generate training samples for enhancing the training of both the classifier and the MultiLoad-GAN model. Simulation results show that MultiLoad- GAN can generate more realistic load profiles than existing approaches, especially in group level characteristics. With little finetuning, MultiLoad-GAN can be readily extended to generate a group of load or PV profiles for a feeder or a service area.
GaN is an attractive material for high-power electronics due to its wide bandgap and large breakdown field. Verticalgeometry devices are of interest due to their high blocking voltage and small form factor. One challenge for realizing complex vertical devices is the regrowth of low-leakage-current p-n junctions within selectively defined regions of the wafer. Presently, regrown p-n junctions exhibit higher leakage current than continuously grown p-n junctions, possibly due to impurity incorporation at the regrowth interfaces, which consist of c-plane and non-basal planes. Here, we study the interfacial impurity incorporation induced by various growth interruptions and regrowth conditions on m-plane p-n junctions on free-standing GaN substrates. The following interruption types were investigated: (1) sample in the main MOCVD chamber for 10 min, (2) sample in the MOCVD load lock for 10 min, (3) sample outside the MOCVD for 10 min, and (4) sample outside the MOCVD for one week. Regrowth after the interruptions was performed on two different samples under n-GaN and p-GaN growth conditions, respectively. Secondary ion mass spectrometry (SIMS) analysis indicated interfacial silicon spikes with concentrations ranging from 5e16 cm -3 to 2e18 cm -3 for the n-GaN growth conditions and 2e16 cm -3 to 5e18 cm-3 for the p-GaN growth conditions. Oxygen spikes with concentrations ~1e17 cm -3 were observed at the regrowth interfaces. Carbon impurity levels did not spike at the regrowth interfaces under either set of growth conditions. We have correlated the effects of these interfacial impurities with the reverse leakage current and breakdown voltage of regrown m-plane p-n junctions.
Two different approaches to epitaxy of 4-μm-thick layers of polar GaN(0001) and semipolar GaN(10 1-bar 1) on a V-shaped nanostructured Si(100) substrate with nanometer-thick SiC and AlN buffer layers have been experimentally demonstrated. The GaN(0001) layers were synthesized by hydride vapor-phase epitaxy, and GaN(10 1-bar 1) layers, by metal-organic vapor-phase epitaxy, with the growth completed by hydride vapor-phase epitaxy. It was shown that layers of the polar GaN(0002) have a longitudinal elastic stress of –0.45 GPa and the minimum full width at half-maximum of the X-ray diffraction rocking curve ω{sub θ} ~ 45 arcmin, whereas for the semipolar GaN(10 1-bar 1), these values are –0.29 GPa and ω{sub θ} ~ 22 arcmin, respectively. A conclusion is drawn that the combined technology of semipolar gallium nitride on a silicon (100) substrate is promising.
GaN-based solar cells with InGaN multiple quantum wells (MQWs) are promising devices for application in space environment, concentrator solar systems, wireless power transmission and multi-junction solar cells. It is therefore important to understand their degradation kinetics when submitted to high-temperature and high-intensity stress. We submitted three samples of GaN-InGaN MQW solar cells with p-AlGaN electron-blocking-layer with different thickness of the p-GaN layer to constant power stress at 310 W/cm 2 , 175 °C for several hundred hours. The main degradation modes are a reduction of open-circuit voltage, short-circuit current, external quantum efficiency, power conversion efficiency and electroluminescence. In particular, we observed that a thinner p-GaN layer results in a stronger degradation observed on the cell operating parameters. The analysis of the dark I-V characteristics showed an increase in low-forward bias current and the analysis of electroluminescence showed a decrease in the electroluminescene emitted by the (forward biased) cell, as a consequence of stress. This work highlights that the cause of degradation is possibly related to a diffusion mechanism, which results in an increase of defect density in the active region. Finally, the impurities involved in the diffusion processes possibly originate from the p-side of the devices, therefore a thicker p-GaN layer reduces the amount of defects reaching the active region.
The development of gallium nitride (GaN) power devices requires a reliable selective-area doping process, which is difficult to achieve because of ongoing challenges associated with the required etch-then-regrow process. The presence of silicon (Si) impurities of unclear physical origin at the GaN regrowth interface has proven to be a major bottleneck. Furthermore, this paper investigates the origin of Si contamination at the epitaxial GaN-on-GaN interface and demonstrates an approach that markedly reduces its impact on device performance. An optimized dry-etching approach combined with UV-ozone and chemical etching is shown to greatly reduce the Si concentration levels at the regrowth interface, and a significant improvement in a reverse leakage current in vertical GaN-based p–n diodes is achieved.
Traditional mesa terminations require precise angle design to reduce the electric field at the edge and surface treatment to reduce etch damage. Otherwise, the device usually suffers a premature breakdown. This work proposes the use of easy-to-implement hydrogen plasma treatment to solve the premature breakdown caused by mesa and demonstrates the avalanche capability in GaN-on-GaN p-i-n diodes. The breakdown electric field when the avalanche occurred was ∼2.3 MV/cm at room temperature for a GaN drift layer with a doping concentration of ∼7 × 1015 cm−3, which is consistent with the theoretical value. The temperature coefficient of the avalanche breakdown voltage of the devices was 4.64–4.85 × 10−4 K−1. This work shows a simple and effective approach to achieve avalanche capability in vertical GaN power devices, which can serve as an important reference for the future development of efficient and robust GaN power electronics.
Devices based on gallium nitride (GaN) have great potential for high power switching applications due to the high breakdown field and high electron mobility. In this work, we present a vertical GaN-on-GaN PN power diode using high dielectric constant material, BaTiO3, for electrical field management and high breakdown voltages, in together with an optimized guard-ring and field plate design. Numerical simulation shows that with high-k dielectrics implemented, the peak electrical field at the PN interface is mitigated from 3.5 to 3.1 MV/cm under a reverse bias of −9.05 kV. The device design with BaTiO3 shows a breakdown voltage of 9.65 kV or about 600 V improvement. The fabricated diodes with a 57 μm thick drift layer demonstrate a breakdown voltage of 7.86 kV on a bulk GaN substrate. The device has an on-resistance of 2.8 mΩ cm2 and a Baliga figure of merit of 22 GW/cm2.