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At least 19 records

High-power test of a C-band linear accelerating structure with an RFSoC-based LLRF system

Normal conducting linear particle accelerators consist of multiple rf stations with accelerating structure cavities. Low-level rf (LLRF) systems are employed to set the phase and amplitude of the field in the accelerating structure and to compensate for the pulse-to-pulse fluctuation of the rf field in the accelerating structures with a feedback loop. The LLRF systems are typically implemented with analog rf mixers, heterodyne-based architectures, and discrete data converters. There are multiple rf signals from each of the rf stations, so the number of rf channels required increases rapidly with multiple rf stations. With a large number of rf channels, the footprint, component cost, and system complexity of the LLRF hardware will increase significantly. To meet the design goals of being compact and affordable for future accelerators, we have designed the next-generation LLRF (NG-LLRF) with a higher integration level based on RFSoC technology. The NG-LLRF system samples rf signals directly and performs rf mixing digitally. Further, the NG-LLRF has been characterized in loopback mode to evaluate the performance of the system and has also been tested with a standing-wave accelerating structure, a prototype for the Cool Copper Collider (C 3 ) with a peak rf power level up to 16.45 MW. The loopback test demonstrated amplitude fluctuation below 0.15% and phase fluctuation below 0.15°, which are considerably better than the requirements of C 3 . The rf signals from the different stages of the accelerating structure at different power levels are measured by the NG-LLRF, which will be critical references for the control algorithm designs. The NG-LLRF also offers flexibility in waveform modulation, so we have used rf pulses with various modulation schemes, which could be useful for controlling some of the rf stations in accelerators. In this paper, the high-power test results at different stages of the test setup will be summarized, analyzed, and discussed.

47 OTHER INSTRUMENTATION↗

First SELAP Algorithm Operational Experience of the New LLRF 3.0 RF Control System

The JLAB LLRF 3.0 system has been developed and is replacing the 30-year-old LLRF systems in the CEBAF accelerator. The LLRF system builds upon 25 years of design and operational RF control experience (digital and analog), and our recent collaboration in the design of the LCLSII LLRF system. The new system also incorporates a cavity control algorithm using a fully functional phase and amplitude locked Self Exciting Loop (SELAP). The first system (controlling 8 cavities) was installed and commissioned in August of 2021. Since then the new LLRF system has been operating with cavity gradients up to 20 MV/m, and electron beam currents up to 350 uA. This paper discusses the operational experience of the LLRF 3.0 SELAP algorithm along with other software and firmware tools like cavity and klystron characterization and quench detection.

Plawski, T. E.↗

LCLS-II Gun/Buncher LLRF System Design

For a free electron laser, the stability of injector is critical to the final electron beam parameters, e.g., beam energy, beam arrival time, and eventually it determines the photon quality. The LCLS-II project's injector contains a VHF copper cavity as the gun and a two-cell L-band copper cavity as its buncher. The cavity designs are inherited from the APEX design, but requires more field stability than demonstrated in APEX operation. The gun LLRF system design uses a connectorized RF front end and low noise digitizer, together with the same general purpose FPGA carrier board used in the LCLS-II SRF LLRF system. The buncher LLRF system directly adopts the SRF LLRF chassis design, but programs the controller to run the normal conducting cavities. In this paper, we describe the gun/buncher LLRF system design, including the hardware design, the firmware design and bench test.

43 PARTICLE ACCELERATORS↗

JLAB LLRF 3.0 Development and Tests

The Jefferson Lab LLRF 3.0 system is being developed to replace legacy LLRF systems in the CEBAF accelerator. The new design builds upon 25 years of design and operational RF control experience, and our recent collaboration in the design of the LCLSII LLRF system. The new cavity control algorithm is a fully functional phase and amplitude locked Self Exciting Loop (SEL). This paper discusses the progress of the LLRF 3.0 hardware design, FPGA firmware development, User Datagram Protocol (UDP) operation, and recent LLRF 3.0 system tests on the CEBAF Booster cryomodule in the Upgrade Injector Test Facility (UITF).

Plawski, T. E.↗

DIRECT RF SAMPLING BASED LLRF CONTROL SYSTEM FOR C-BAND LINEAR ACCELERATOR

Low Level RF (LLRF) control systems of linear accel- erators (LINACs) are typically implemented with hetero- dyne based architectures, which have complex analog RF mixers for up and down conversion. The Gen 3 Radio Fre- quency System-on-Chip (RFSoC) device from AMD Xilinx integrates data converters with maximum RF frequency of 6 GHz. This enables direct RF sampling of C-band LLRF signal typically operated at 5.712 GHz without any analogue mixers, which can significantly simplify the system architec- ture. The data converters sample RF signals in higher order Nyquist zones and then up or down convert digitally by the integrated data path in RFSoC. The closed-loop feedback control firmware implemented in FPGA integrated in RF- SoC can process the base-band signal from the ADC data path and calculate the updated phase and amplitude to be up- mixed by the DAC data path. We have developed a C-band LLRF control RFSoC platform with direct RF sampling, which targets Cool Copper Collider (𝐶3) and other C or S band LINAC research and development projects. In this paper, the architecture of the platform will be described. We have optimized the configuration of the data converter and characterized performance of them with RF pulses. The test results for some of the key performance parameters for the LLRF platform with our custom solid-state amplifier, such as phase and amplitude stability, will be discussed in this paper.

Liu, C↗

LLRF System for the Fermilab Muon g-2 and Mu2e Projects

The Mu2e experiment measures the conversion rate of muons into electrons and the Muon g-2 experiment measures the muon magnetic moment. Both experiments require 53 MHz batches of 8 GeV protons to be re-bunched into 150 ns, 2.5 MHz pulses for extraction to the g-2 target for Muon g-2 and to a delivery ring with a single RF cavity running at 2.36 MHz for Mu2e. The LLRF system for both experiments is implemented in a SOC FPGA board integrated into the existing 53 MHz LLRF system in a VXI crate. The tight timing requirements, the large frequency difference and the non-harmonic relationship between the two RF systems provide unique challenges to the LLRF system design to achieve the required phase alignment specifications for beam formation, transfers and beam extinction between pulses. The new LLRF system design for both projects is described and the results of the initial beam commissioning tests for the Muon g-2 experiment are presented.

43 PARTICLE ACCELERATORS↗

LLRF commissioning of the CEBAF C75 upgrades SAM 2024/25

An often-overlooked aspect of Low Level Radio Frequency (LLRF) design is commissioning of a new system. During Jlab’s Scheduled Accelerator Maintenance (SAM) in 2024, two C75 Cryomodule were installed in CEBAF with Jlab’s LLRF 3.0 system. Jlab’s team has invested effort in automating and standardizing their commissioning process. Several key components are klystron characterization, cavity characterization, and interlock verification. This poster will present the summary of LLRF preparation and commissioning efforts at Jlab.

Accelerator Physics↗

LLRF System for the Fermilab PIP-II Superconducting LINAC

PIP-II is an 800 MEV superconducting linac that is in the initial acceleration chain for the Fermilab accelerator complex. The RF system consists of a warm front-end with an ion source, RFQ and buncher cavities along with 25 superconducting cryo-modules comprised of five different acceleration \(\beta\). The LLRF system for the LINAC has to provide field and resonance control for a total of 125 RF cavities.The LLRF system design is in the final design review phase and will enter the production phase next year. The PIP-II project is an international collaboration with various partner labs contributing subsystems. The LLRF system design for the PIP-II Linac is presented and the specification requirements and system performance in various stages of testing are described in this paper.

43 PARTICLE ACCELERATORS↗

LLRF System Analysis for the Fermilab PIP-II Superconducting LINAC

PIP-II is a superconducting linac that is in the initial acceleration chain for the Fermilab accelerator complex. The RF system consists of a warm front-end with an RFQ and buncher cavities along with 25 superconducting cryo-modules comprised of cavities with five different acceleration \(β\). The LLRF system for the linac has to provide field and resonance control for a total of 125 RF cavities. Various components of the LLRF system have been tested with and without beam at the PIP-II test stands. The LLRF system design is derived from the LCLS-II project with its self-excited loop architecture used in the majority of the cryo-modules. The PIP-II beam loading at 2 mA is much higher than the LCLS-II linac. The control system architecture is analyzed and evaluated for the operational limits of feedback gains and their ability to meet the project regulation requirements for cavity field amplitude and phase regulation.

Varghese, P. [Fermilab] (ORCID:0009000925131983)↗

Testing the DAE LLRF system with a PIP-II SSR2 Cavity

The PIP-II linac is an international collaboration project with in kind contributions of key subsystems from multiple countries including India (DAE). In the research and development phase of the project, the LLRF and resonance control systems were jointly developed by BARC and Fermilab and were delivered to Fermilab for testing and validation. Initial testing of the LLRF system was carried out using Fermilabs analog cavity emulator. Following successful emulator testing, the LLRF system was deployed at STC on a PIP-II 325 MHz SSR2 cavity. The cavity was operated in both SEL and GDR modes at a gradient of 5 MV/m. The results of the testing are presented here.

Nasery, Radhika [Bhabha Atomic Res. Ctr.]↗

LLRF AMC Card Low Level Driver

This is a low level driver for the LLRF AMC cards. The driver is based on CPSW and implement low level routines to configure the different LLRF AMC cards: Gen1 UpConverter, Gen2 UpConverter, and DownConverter. The driver also implements health checks to verify that the different JESD links are locked and stable.

Vasquez, Jesus↗

Performance of the LLRF System for the Fermilab PIP-II Injector Test

PIP-II IT is a test facility for the PIP-II project where the injector, warm front-end, and the first two superconducting cryomodules are being tested. The 8-cavity half-wave-resonator (HWR) cryomodule operating at 162.5 MHz is followed by the 8-cavity single-spoke resonator(SSR1) cryomodule operating at 325 MHz. The LLRF systems for both cryomodules are based on a common SOC FPGA-based hardware platform. The resonance control systems for the two cryomodules are quite different, the first being a pneumatic system based on helium pressure and the latter a piezo/stepper motor type control. The data acquisition and control system can support both CW and Pulsed mode operations. Beam loading compensation is available which can be used for both manual/automatic control in the LLRF system. The user interfaces include EPICS, Labview, and ACNET. Testing of the RF system has progressed to the point of being ready for a 2 mA beam to be accelerated to 25 MeV. The design and performance of the field control and resonance control system operation with beam are presented in this paper.

43 PARTICLE ACCELERATORS↗

Lifetime extension of legacy CEBAF LLRF hardware

A significant portion of the Low-Level Radio Frequency (LLRF) hardware in Jefferson Lab’s CEBAF is from the original construction of the facility using 1980’s CAMAC technology. Of the fifty-three zones in CEBAF, thirty-six of them are legacy hardware. The age of the legacy system has led to difficulties in maintaining the hardware due to parts going obsolete without suitable drop in replacements. Continued operation of the legacy system is required as the installation of LLRF 3.0 systems is costly and cannot be completed in a short period of time with the available resources. The most pressing failure in the legacy system was a failing buffer card, which is responsible for communication between the EPICs network and individual RF control modules. A new buffer card was designed as a transparent, drop in, replacement so that upgrades are simply a matter of swapping the existing legacy hardware. This buffer card upgrades a single point failure component and promises to extend the operable lifetime of CEBAF’s legacy systems.

Accelerator Physics↗

Calibration and Measurement techniques in the LLRF systems of the Fermilab PIP-II Linac

he PIP-II Accelerator is an 800 MeV superconducting Linac in the injection chain of the Fermilab accelerator complex. The LLRF systems are a based on two different hardware platforms controlling a variety of cavity types and resonance control systems including temperature, pneumatic and piezzo tuners. The various calibrations required prior to beam operation include, signal power, gradient, amplifier characterization, cavity Q measurement and detune constants. Measurements such as piezzo capacitance, cavity piezo transfer function help in determining tuner health and in devising microphonics control strategies. These measurement and calibration methods of the PIP-II LLRF system are discussed here.

Varghese, P.↗

Timing and Synchronization in the LLRF systems of the Fermilab PIP-II Linac

The PIP-II Accelerator is an 800 MeV superconducting Linac in the injection chain of the Fermilab accelerator complex. The LLRF systems for the 125 cavities which include a few normal conducting cavities in the warm front-end section, use a variety of LLRF hardware components and sub-systems that are part of the timing and synchronization system. This includes a master oscillator and phase averaging reference line, a beam pattern generator to enable beam transfer between non-harmonic RF systems and beam loading compensation systems synchronized to a start of beam trigger. The timing signals are based on a 650 MHz clock with manchester encoded event information and data provided over optical fiber. The timing and synchronization systems and their performance parameters will be described here.

Varghese, Philip↗

Baseband Digital Network Analyzer Upgrade for LLRF Controllers

Digital Network Analyzers (DNA) have been implemented in many Low-Level Radio Frequency (LLRF) systems, notably NSLS-II and CERN, to help tune feedback loops. DNA characterizes feedback loops by measuring the frequency-dependent magnitude and phase transfer functions. It enables the measurement of open loop gains, gain/phase margins, and loop delays to help fine-tune feedback loops. An FPGA-based DNA has been developed and integrated into the current Relativistic Heavy Ion Collider (RHIC) LLRF infrastructure. Its performance has been tested with an implementation of one-turn delay feedback (OTFB) on the bench to maximize gain and stability. The DNA has been used to characterize a RHIC 28 MHz cavity in a RHIC Accelerator Physics Experiment (APEX) to test transient beam loading compensation strategies.

43 PARTICLE ACCELERATORS↗

RF Digitizer for EIC LLRF

With the shutdown of Relativisitc Heavy Ion Collider (RHIC) in FY26, the former RHIC facility will be upgraded to the new Electron-Ion Collider (EIC). An RF Digitizer for the EIC LLRF system has been developed and tested on a RHIC 197 MHz cavity in Q2 2026 for a baseline per formance. Firmware and software has been developed and validated during the 197 MHz cavity test. Preliminary data from the cavity test shows phase noise performance signifi cantly better than the RHIC LLRF system.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗

SRF Cavity Emulator for PIP-II LLRF Lab and Field Testing

There are many stages in the LLRF and RF system development process for any new accelerator that can take advantage of hardware emulation of the high-power RF system and RF cavities. LLRF development, bench testing, control system development and testing of installed systems must happen well before SRF cavities are available for test. The PIP-II Linac has three frequencies of SRF cavities, 162.5 MHz, 325 MHz and 650 MHz and a simple analog emulator design has been chosen that can meet the cavity bandwidth requirements, provide tuning errors to emulate Lorentz force detuning and microphonics for all cavity types. This emulator design utilizes a quartz crystal with a bandwidth of 65Hz at an IF of ~ 4 MHz, providing a Q of ~ 1.3 x 10^7 at 650MHz. This paper will discuss the design and test results of this emulator.

43 PARTICLE ACCELERATORS↗