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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

A Perspective on Quantum Computing Applications in Quantum Chemistry Using 25-100 Logical Qubits

The intersection of quantum computing and quantum chemistry represents a promising frontier for achieving quantum utility in domains of both scientific and societal relevance. Owing to the exponential growth of classical resource requirements for simulating quantum systems, quantum chemistry has long been recognized as a natural candidate for quantum computation. This perspective focuses on identifying scientifically meaningful use cases where early fault-tolerant quantum computers, which are considered to be equipped with approximately 25-100 logical qubits, could deliver tangible impact. While recent advances in classical computing have pushed the boundaries of tractable simulations to unprecedented scales, this logical-qubit regime represents the first window where quantum devices can pursue qualitatively distinct strategies, such as polynomial-scaling phase estimation, direct simulation of quantum dynamics, and active-space embedding, that remain challenging for classical solvers, such as multireference charge-transfer and conical-intersection states central to photochemistry and materials design. We highlight near-term opportunities in algorithm and software design, discuss representative chemical problems suited for quantum acceleration, and propose strategic roadmaps and collaborative pathways for advancing practical quantum utility in quantum chemistry.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗
DOE OSTI2025

Logical error rates for the surface code under a mixed coherent and stochastic circuit-level noise model inspired by trapped ions

With fault-tolerant quantum computing (FTQC) on the horizon, it is critical to understand sources of logical errors in plausible hardware implementations of quantum error-correcting codes. Detailed error modeling of computational instructions on particular FTQC architectures will enable the better prediction of error propagation in FT-encoded quantum circuits while revealing where greater attention is needed in hardware design. In this work, we consider logical error rates for the surface code implemented on a hypothetical grid-based trapped-ion quantum charge-coupled device architecture. Specifically, we construct logical channels for the idling surface code and examine its diamond error under a mixed coherent and stochastic circuit-level noise model inspired by trapped ions. We include the coherent dephasing noise that is known to accumulate during physical qubit idling and transport in these systems, determining idling and transport durations using the time-resolved output of an open-source trapped-ion surface code compiler. To estimate expectation values of logical Pauli observables following hardware circuits containing non-Clifford sources of noise, we utilize a Monte Carlo technique to sample from an underlying quasiprobability distribution of Clifford circuits that we independently simulate in a phase-sensitive fashion. We verify error suppression up to code distance 𝑑 = 11 at coherent dephasing rates near and below those of current-generation trapped-ion quantum computers and find that logical error rates align with those of analogous fully stochastic simulations in this regime. Exploring higher dephasing rates at 𝑑 = 3−5, we find evidence for growing coherent rotations about all three logical Pauli axes, increased diagonal logical error process matrix elements relative to those of stochastic simulations, and a reduced dephasing rate threshold. Overall, our work paves a way toward realistic hardware emulation of small fault-tolerant quantum processes, e.g., members of an FTQC instruction set.

Quantum benchmarking↗
DOE OSTI2025

Dynamical logical qubits in the Bacon-Shor code

The Bacon-Shor code is a quantum error correcting subsystem code composed of weight-2 check operators that admits a single logical qubit, and has distance 𝑑 on a 𝑑×𝑑 square lattice. We show that when viewed as a Floquet code, by choosing an appropriate measurement schedule of the check operators, it can additionally host several dynamical logical qubits. Specifically, we identify a period-4 measurement schedule of the check operators that preserves logical information between the instantaneous stabilizer groups. Such a schedule not only measures the usual stabilizers of the Bacon-Shor code, but also measures and promotes gauge operators of the parent subsystem code to additional temporary stabilizers that protect the dynamical logical qubits against errors. We show that the code distance of these Floquet-Bacon-Shor codes scales as Θ⁢(𝑑/√𝑘) on an 𝑛=𝑑×𝑑 lattice with 𝑘 dynamical logical qubits, along with the logical qubit of the parent subsystem code. Unlike the usual Bacon-Shor code, the Floquet-Bacon-Shor code family introduced here can therefore saturate the subsystem bound 𝑘⁢𝑑=𝑂⁡(𝑛). Moreover, several errors are shown to be self-corrected purely by the measurement schedule itself. This work provides insights into the design space for dynamical codes and expands the known approaches for constructing Floquet codes.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2024

StructuredFuzzer: Fuzzing Structured Text-Based Control Logic Applications

Rigorous testing methods are essential for ensuring the security and reliability of industrial controller software. Fuzzing, a technique that automatically discovers software bugs, has also proven effective in finding software vulnerabilities. Unsurprisingly, fuzzing has been applied to a wide range of platforms, including programmable logic controllers (PLCs). However, current approaches, such as coverage-guided evolutionary fuzzing implemented in the popular fuzzer American Fuzzy Lop Plus Plus (AFL++), are often inadequate for finding logical errors and bugs in PLC control logic applications. They primarily target generic programming languages like C/C++, Java, and Python, and do not consider the unique characteristics and behaviors of PLCs, which are often programmed using specialized programming languages like Structured Text (ST). Furthermore, these fuzzers are ill suited to deal with complex input structures encapsulated in ST, as they are not specifically designed to generate appropriate input sequences. This renders the application of traditional fuzzing techniques less efficient on these platforms. To address this issue, this paper presents a fuzzing framework designed explicitly for PLC software to discover logic bugs in applications written in ST specified by the IEC 61131-3 standard. The proposed framework incorporates a custom-tailored PLC runtime and a fuzzer designed for the purpose. We demonstrate its effectiveness by fuzzing a collection of ST programs that were crafted for evaluation purposes. We compare the performance against a popular fuzzer, namely, AFL++. The proposed fuzzing framework demonstrated its capabilities in our experiments, successfully detecting logic bugs in the tested PLC control logic applications written in ST. On average, it was at least 83 times faster than AFL++, and in certain cases, for example, it was more than 23,000 times faster.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

Cross-Cap Defects and Fault-Tolerant Logical Gates in the Surface Code and the Honeycomb Floquet Code

We consider the Z 2 toric code, surface code, and Floquet code defined on a nonorientable surface, which can be considered as families of codes extending Shor’s nine-qubit code. We investigate the fault-tolerant logical gates of the Z 2 toric code in this setup, which corresponds to e ↔ m exchanging symmetry of the underlying Z 2 gauge theory. We find that nonorientable geometry provides a new way for the emergent symmetry to act on the code space, and discover the new realization of the fault-tolerant Hadamard gate of the two-dimensional surface code with a single cross cap connecting the vertices nonlocally along a slit, dubbed a nonorientable surface code. This Hadamard gate can be realized by a constant-depth local unitary circuit modulo nonlocality caused by a cross cap. Via folding, the nonorientable surface code can be turned into a bilayer local quantum code, where the folded cross cap is equivalent to a bilayer twist terminated on a gapped boundary and the logical Hadamard only contains local gates with intralayer couplings when being away from the cross cap, as opposed to the interlayer couplings on each site needed in the case of the folded surface code. We further obtain the complete logical Clifford gate set for a stack of nonorientable surface codes and similarly for codes defined on Klein-bottle geometries. We then construct the honeycomb Floquet code in the presence of a single cross cap, and find that the period of the sequential Pauli measurements acts as a H Z logical gate on the single logical qubit, where the cross cap enriches the dynamics compared with the orientable case. We find that the dynamics of the honeycomb Floquet code is precisely described by a condensation operator of the Z 2 gauge theory, and illustrate the exotic dynamics of our code in terms of a condensation operator supported at a nonorientable surface. Published by the American Physical Society 2024

Physics↗
DOE OSTI2025

Fault-tolerant operation and materials science with neutral atom logical qubits

We report on the fault-tolerant operation of logical qubits on a neutral atom quantum computer, with logical performance surpassing physical performance for multiple circuits including Bell state preparation (12x error reduction), random circuits (15x), and a prototype Anderson Impurity Model ground state solver for materials science applications (up to 6x, non-fault-tolerantly). The logical qubits are implemented via the [[4, 2, 2]] code (C 4 ). Our work constitutes the first complete realization of the benchmarking protocol proposed by Gottesman 2016 demonstrating results consistent with fault tolerance. In light of recent advances on applying concatenated C 4 /C 6 detection codes to achieve error correction with high code rates and thresholds, our work can be regarded as a building block towards a practical scheme for fault tolerant quantum computation. Our demonstration of a materials science application with logical qubits particularly demonstrates the immediate value of these techniques on current experiments.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Efficient Simulation of Logical Magic State Preparation Protocols

Developing space- and time-efficient logical magic state preparation (MSP) protocols will likely be an essential step toward building a large-scale fault-tolerant quantum computer. Motivated by this need, we introduce a scalable method for simulating logical MSP protocols under the standard circuit-level noise model. When applied to protocols based on code-switching, magic state cultivation, and magic state distillation, our method yields a complexity polynomial in (i) the number of qubits and (ii) the nonstabilizerness, e.g., stabilizer rank or Pauli rank, of the target encoded magic state. The efficiency of our simulation method is rooted in a curious fact: every circuit-level Pauli error in these protocols propagates to a Clifford error at the end. This property is satisfied by a large family of protocols, including those that repeatedly measure a transversal Clifford that squares to a Pauli. We provide a proof-of-principle numerical simulation that prepares a magic state using such logical Clifford measurements. Our work enables practical simulation of logical MSP protocols without resorting to approximations or resource-intensive state-vector simulations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗
DOE OSTI2025

Single-Cell Universal Logic-in-Memory Using 2T-nC FeRAM: An Area and Energy-Efficient Approach for Bulk Bitwise Computation

This work presents a novel approach to configure 2T-nC ferroelectric RAM (FeRAM) for performing single cell logic-in-memory operations, highlighting its advantages in energy-efficient computation over conventional DRAM-based approaches. Unlike conventional 1T-1C dynamic RAM (DRAM), which incurs refresh overhead, 2T-nC FeRAM offers a promising alternative as a non-volatile memory solution with low energy consumption. Our key findings include the potential of quasi-nondestructive readout (QNRO) sensing in 2T-nC FeRAM for logic-in-memory (LiM) applications, demonstrating its inherent capability to perform inverting logic without requiring external modifications, a feature absent in traditional 1T-1C DRAM. We successfully implement the MINORITY function within a single cell of 2T-nC FeRAM, enabling universal NAND and NOR logic, validated through SPICE simulations and experimental data. Additionally, the research investigates the feasibility of 3D integration with 2T-nC FeRAM, showing substantial improvements in storage and computational density, facilitating bulk-bitwise computation. Our evaluation of eight real-world, data-intensive applications reveals that 2T-nC FeRAM achieves 2× higher performance and 2.5× lower energy consumption compared to DRAM. Furthermore, the thermal stability of stacked 2T-nC FeRAM is validated, confirming its reliable operation when integrated on a compute die. These findings emphasize the advantages of 2T-nC FeRAM for LiM, offering superior performance and energy efficiency over conventional DRAM.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Geometric Structure and Transversal Logic of Quantum Reed–Muller Codes

Designing efficient and noise-tolerant quantum computation protocols generally begins with an understanding of quantum error-correcting codes and their native logical operations. The simplest class of native operations are transversal gates, which are naturally fault-tolerant. Here, in this paper, we aim to characterize the transversal gates of quantum Reed–Muller (RM) codes by exploiting the well-studied properties of their classical counterparts. We start our work by establishing a new geometric characterization of quantum RM codes via the Boolean hypercube and its associated subcube complex. More specifically, a set of stabilizer generators for a quantum RM code can be described via transversal X and Z operators acting on subcubes of particular dimensions. This characterization leads us to define subcube operators composed of single-qubit π/2 k Z -rotations that act on subcubes of given dimensions. We first characterize the action of subcube operators on the code space: depending on the dimension of the subcube, these operators either (1) act as a logical identity on the code space, (2) implement non-trivial logic, or (3) rotate a state away from the code space. Second, and more remarkably, we uncover that the logic implemented by these operators corresponds to circuits of multi-controlled-Z gates that have an explicit and simple combinatorial description. Overall, this suite of results yields a comprehensive understanding of a class of natural transversal operators for quantum RM codes.

Reed–Muller (RM) codes↗
DOE OSTI2025

Automated Programmable Logic Controller Memory Forensics Using RGB Image Analysis and Deep Learning

The introduction of Industry 4.0 and Internet-based technologies has enhanced industrial control system operations but have inadvertently increased their vulnerabilities to cyber attacks. When an industrial control system is compromised, security analysts need to identify the root cause quickly to start the recovery process and develop mitigation strategies. Memory forensics is critical in the incident analysis process to ascertain what occurred. Approaches for analyzing the persistent memory in industrial control devices are limited and almost nonexistent for volatile memory. This chapter proposes an automated methodology for programmable logic controller memory dump analysis using computer vision and deep learning techniques. The methodology converts the sequences of bytes in a programmable logic controller memory dump to red-green-blue pixels and employs a deep learning model that learns the underlying patterns and features of pre-labeled forensic artifacts in images and segments them into distinct regions. The trained model is employed to automatically segment new memory images and identify forensic artifacts. Evaluation of the methodology on a Schneider Electric Modicon M221 programmable logic controller under code injection and code modification attacks demonstrates its ability to detect attack artifacts in memory dumps.

Asmar Awad, Rima [ORNL] (ORCID:0000000233407742)↗
DOE OSTI2025

UltraLiM: In-Memory Boolean Logic Architecture Using UltraRAM

Conventional computing architectures encounter ‘von Neumann’ and ‘memory wall’ bottlenecks which arise due to the back-and-forth data movement between the physically separate memory and processing units and the speed mismatch between them, respectively. These bottlenecks hurt both energy efficiency and the throughput of computing systems. To address these challenges, in-memory computing architectures have emerged as a promising alternative. They reduce the need for frequent data movement by executing different computing tasks inside the memory system. Here, we present UltraLiM, a logic-in-memory architecture using the UltraRAM-based memory system. UltraRAM holds the promise of developing a ‘universal memory’, overcoming the limitations of charge-based memories thanks to their non-volatile behavior with lower operating voltage. This work presents an in-memory computing architecture that integrates an UltraRAM-based memory array with a custom-designed peripheral circuitry. With this architecture, we can perform various in-memory Boolean logic operations (such as NOT, NAND, NOR, and XOR) in a single cycle. Leveraging the separate read-write paths in the UltraRAM-based memory array, we optimize read operations without encountering design conflicts. This optimization enhances the sense margin, enabling the use of simpler peripheral circuitry for in-memory logic operations.

Alam, Shamiul [University of Tennessee, Knoxville ↗
DOE OSTI2025

Enhancing EV Motor Design Through Knowledge-Based AI and Hierarchical Fuzzy Logic Model

This work presents a novel approach to optimizing electric vehicle motor design through the integration of Knowledge-Based Artificial Intelligence (KB-AI) and Hierarchical Fuzzy Logic. Traditional motor design processes are time-intensive, relying heavily on iterative simulations and domain-specific expertise. These processes are further complicated by the nonlinear relationships between key design parameters. The proposed framework addresses these challenges by systematically encoding expert knowledge from scientific literature into a fuzzy logic system, allowing for the efficient handling of complex design variables. The hierarchical fuzzy logic model reduces computational complexity by decomposing the nonlinear relationships into manageable rule sets while maintaining design accuracy. The proposed methodology was applied to the design of a 100 kW motor, yielding optimal values for key parameters. This resulted in a compact motor design with a volume of 2.2 liters, showcasing the framework’s ability to deliver high-performance, application-specific motor configurations.

Kumar, Praveen [ORNL] (ORCID:0000000291877857)↗
DOE OSTI2025

Rapid Inference of Logic Gate Neural Networks for Anomaly Detection in High Energy Physics

The increasing data rates and complexity of detectors at the Large Hadron Collider (LHC) necessitate fast and efficient machine learning models, particularly for rapid selection of what data to store, known as triggering. Building on recent work in differentiable logic gates, we present a public implementation of a Convolutional Differentiable Logic Gate Neural Network (CLGN). We apply this to detecting anomalies at the Level-1 Trigger at CMS using public data from the CICADA project. We demonstrate that the CLGN achieves physics performance on par with or superior to conventional quantized neural networks. We also synthesize an LGN for a Field-Programmable Gate Array (FPGA) and show highly promising FPGA characteristics, notably zero Digital Signal Processor (DSP) resource usage. This work highlights the potential of logic gate networks for high-speed, on-detector inference in High Energy Physics and beyond.

FOS: Physical sciences↗
DOE OSTI2024

Fail-Safe Logic Design Strategies Within Modern FPGA Architectures

Fail-safe computing refers to computing systems that revert to a non-operational safe state when a fault occurs. In this paper, we investigate a circuit level technique as mitigation for single event upsets (SEUs) and fault injection attacks on field programmable gate arrays (FPGAs), and analyze the effectiveness of the technique as a fail-safe monitor for an encryption algorithm. The propagation of fault effects through FPGA primitives including lookup tables (LUTs) and programmable interconnect points (PIPs) is assessed within an FPGA architecture created using an open source tool, and validated using fault injection experiments on an FPGA. The analysis reveals additional vulnerabilities exist within reconfigurable architectures over those in equivalent fail-safe application specific integrated circuit (ASIC), thus requiring a more elaborate network of redundant circuits and checking logic. The configuration memory bits (CMBs), which configure routing and designate logic functions within the LUTs of the FPGA, add complexity to fail-safe design strategies by introducing additional fault conditions and fault propagation paths. A resource-efficient fail-safe circuit design technique called DEsign for Fail-safe in reCONfigurable systems (DEFCON) is proposed. The benefits and limitations associated with DEFCON are described in the context of fault injection experiments carried out as simulations and in FPGA hardware.

Bhakta, Priya A. [Univ. of New Mexico, Albuquerque↗
DOE OSTI2024

Applications of Fuzzy Logic for Tritium Sensing Technology

Fuzzy Logic is a mathematical method that can represent human-like decisions by analyzing vagueness. The project is a practical approach for evaluating sensors using a fuzzy group best-worst method. Results What is the best sensor? The fuzzy logic methods give an answer to that through a selection system. The relationship between the inputs and the outputs gives consumers an understanding of how the best sensor was found through a scoring of each quality/criteria and their corresponding sub-criteria through expert opinion.

Holman, Allyson↗
DOE OSTI2024

Applications of fuzzy logic and best-worst method for tritium sensor selection

Accurate assessment of tritium as a fuel source is critical in fusion reactions, necessitating effective sensor evaluation methods. This study investigates a multi-criteria decision-making framework for selecting tritium sensors, integrating fuzzy logic to enhance decision quality. Initial attempts at applying fuzzy logic were found to be too elementary and failed to capture the complexity of multi-criteria selection; this prompted a refined approach that incorporated expert insights and advanced ranking techniques for sensor evaluation. The research used a two-stage methodology. In the first stage, important criteria and sub-criteria for sensor performance were identified and defined. These criteria were then weighted and scored using a fuzzy best-worst method, drawing upon expert opinions to ensure relevance and validity. The second stage involved interpreting information about varying sensors to rank them based on their overall criteria scores, encouraging the selection of the most suitable options. The result of the study is a proposed method for effective sensor selection in fusion reactors, which in turn will significantly improve the reliability of tritium monitoring in fusion applications.

11 NUCLEAR FUEL CYCLE AND FUEL MATERIALS↗