MicroTCA at FNAL
This presentation provides an overview of the ongoing MicroTCA-related work at Fermilab.
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This presentation provides an overview of the ongoing MicroTCA-related work at Fermilab.
An overview of MicroTCA development at Fermilab for the PIP-2 project.
Modernizing the Fermilab accelerator control system is essential to future operations of the laboratory's accelerator complex. The existing control system has evolved over four decades and uses hardware that is no longer available.The Accelerator Controls Operations Research Network (ACORN) Project will modernize the control system and replace end-of-life power supplies to enable future accelerator complex operations with megawatt particle beams. The ACORN project is planning to replace Fermilab s obsolete CAMAC crate-and-card controls hardware with modern MicroTCA hardware. There are over 2,000 CAMAC cards and over 250 CAMAC crates serving various functions in Fermilab s control system. We will review the existing CAMAC hardware and provide updates on the status of the ACORN project, which includes the conceptual design of the MicroTCA replacement hardware and software tools for supporting the installation of hundreds of MicroTCA crates.
Modernizing the Fermilab accelerator control system is essential to future operations of the laboratory's accelerator complex. The existing control system has evolved over four decades and uses hardware that is no longer available. The Accelerator Controls Operations Research Network (ACORN) Project will modernize the control system and replace end-of-life power supplies to enable future accelerator complex operations with megawatt particle beams. The ACORN project is planning to replace Fermilab’s obsolete CAMAC crate-and-card controls hardware with modern MicroTCA hardware. There are over 2,000 CAMAC cards and over 250 CAMAC crates serving various functions in Fermilab’s control system. We will present an overview of the existing CAMAC hardware and the proposed MicroTCA replacement plan.
Current efforts are being conducted at Fermi National Laboratory to study potential violations in accepted theory that would otherwise suggest a restructuring of our fundamental understanding of the universe. Mu2e is one of these frontier projects that studies charged lepton flavor violation (CLFV) which if observed, would suggest physics beyond the Standard Model. Therefore, this note encompasses several projects that contribute to the fruition of Mu2e investigations. Due to the broad range of disciplinary inconsistencies that each project requires, all the work is being presented as a means of justifying contribution to Mu2e. The projects are comprised of a G4Beamline simulation analyzing 8GeV proton beam interaction with a titanium window of Recycler ring extinction rates using three Cherenkov radiation-based detectors and supplemental work for the implementation of a micro–Telecommunications Computing Architecture (MicroTCA) crate to establish a peak finding algorithm to ensure that the out-of-time beam is less than 10^-10 fractional level along with inefficiency analysis on scintillation counters for the Cosmic-Ray Veto (CRV) analysis. Preliminary results have been achieved for extinction rate simulation by achieving coincidence rates for 2/3-fold and 3/3-fold on the detectors in the order of 10^-9 and 10^-10, respectively. Only preliminary results of a triangular counter and four rectangular di-counters for the CRV have been realized but other non-experimental contributions were made to the development of the MicroTCA crate.
As a part of the Proton Improvement Plan – II (PIP-II) at Fermilab, instrumentation systems are being modernized to take advantage of the higher speeds and ease of use offered by standardized embedded systems like MicroTCA. A rear-transition module (RTM) is being designed to interface with said embedded systems. In each of the four identical channels on the RTM, the differential signal from an alternating-current current transformer (ACCT) transimpedance amplifier will again be amplified by a differential operation-amplifier, then filtered by a low-pass topology. The conditioned signal is then digitized at a maximum of 10MS/s by an analog to digital converter (ADC) integrated circuit. After digitization, the ADC passes the data to an off the shelf AdvancedMC (AMC) Xilinx FPGA module using low voltage differential signals. This paper will describe the simulation of analog circuitry for signal conditioning, simulation of digital signal integrity based on physical design as well as verification of design characteristics critical to signal integrity. This work aims to create a methodology that can be applied to future RTMs requiring application of high-speed digital design principles.
Redis isn’t a database — it’s our protocol. Fermilab’s RedisAdapter provides a high-performance, control-system-agnostic bridge between digitized beam data and downstream consumers such as ACNET and EPICS. It forms the foundation of three new software components deployed across MicroTCA-based digitizers: GMMDM, a runtime for memory-mapped data movement from Zynq-based platforms; GRAFE, a front end for Redis-to-ACNET presentation; and GREFE, an EPICS IOC front end. Together, these tools enable modular, standardized instrumentation pipelines. Precision timing is handled via White Rabbit PPS distribution, allowing nanosecond-scale synchronization across crates. This architecture, originally prototyped in Booster BPM systems, is now deployed on modern hardware and designed to meet the performance, modularity, and scalability requirements of the PIP-II era.
As a part of the Proton Improvement Plan II (PIP-II) at Fermilab, instrumentation systems are being modernized to take advantage of the higher speeds and ease of use offered by standardized embedded systems like MicroTCA. A rear-transition module (RTM) is being designed to interface with said embedded systems. In each of the four identical channels on the RTM, the differential signal from an alternating-current current transformer (ACCT) transimpedance amplifier will again be amplified by a differential operation-amplifier, then filtered by a low-pass topology. The conditioned signal is then digitized at a maximum of 10MS/s by an analog to digital converter (ADC) integrated circuit. After digitization, the ADC passes the data to an off the shelf AdvancedMC (AMC) Xilinx FPGA module using low voltage differential signals. This paper will describe the simulation of analog circuitry for signal conditioning, simulation of digital signal integrity based on physical design as well as verification of design characteristics critical to signal integrity. This work aims to create a methodology that can be applied to future RTMs requiring application of high-speed digital design principles.
Fermilab's PIP-II upgrade requires new rack-mounted power supplies for Beam Loss Monitor (BLM) ionization tubes compatible with the microTCA 4.1 standard, supporting high-side current measurement for short circuit detection, voltage sense telemetry, and low-side current measurement for beam loss readout. This work presents the design and preliminary schematic of such a supply. A resistive current sensing approach was chosen over inductive, optical, and Hall-effect alternatives for its independence from cable length and component availability. A 500 mΩ inline shunt steps the 2 kV common mode voltage down to roughly 70 V, producing a ~27 μV pulse during a short, which is amplified 500x, compared against a 14-bit DAC threshold, and latched to drive a fault line. Voltage sense steps the 2 kV output down at a 1V/1000V ratio, buffers it with a low bias current amplifier, and digitizes it via a 24-bit ADC over SPI. Onboard power is regulated from 12 V down to isolated 5 V and 3.3 V rails, with capacitive isolation on FPGA communication lines. Lumped parameter models were developed for the ionization tube (0.327 nF, 20 to 200 GΩ dynamic resistance) and the RG-58 coaxial cable to support the design. Component selection is complete and a preliminary schematic has been drawn in Altium Designer, forming the foundation for future prototyping and validation.
The Fermilab Accelerator Division, Instrumentation Department is adopting an open-source framework to replace our embedded VME-based data acquisition systems. Utilizing an iterative methodology, we first moved to embedded Linux, removing the need for VxWorks. Next, we adopted Ethernet on each data acquisition module eliminating the need for the VME backplane in addition to communicating with a rack mount server. Development of DDCP (Distributed Data Communications Protocol), allowed for an abstraction between the firmware and software layers. Each data acquisition module was adapted to read out using 1 GbE and aggregated at a switch which up linked to a 10 GbE network. Current development includes scaling the system to aggregate more modules, to increase bandwidth to support multiple systems and to adopt MicroTCA as a crate technology. The architecture was utilized on various beamlines around the Fermilab complex including PIP2IT, FAST/IOTA and the Muon Delivery Ring. In summary, we were able to develop a data acquisition framework which incrementally replaces VxWorks & VME hardware as well as increases our total bandwidth to 10 Gbit/s using off the shelf Ethernet technology.
Current efforts are being conducted at Fermi National Laboratory to study potential violations in accepted theory that would otherwise suggest a restructuring of our fundamental understanding of the universe. Mu2e is one of these frontier projects that studies Charged Lepton Flavor Violation (CLFV) which if observed, would suggest physics beyond the Standard Model. Therefore, this note encompasses several projects that contribute to the fruition of Mu2e investigations. Due to the broad range of disciplinary inconsistencies that each project requires, all the work is being presented as a means of justifying contribution to Mu2e. The projects are comprised of a simulation exploring the extinction level of proton pulses after Recycler ring re-bunching by using G4beamline to simulate an 8GeV proton beam interaction with a titanium target, three Cherenkov radiation-based detectors and 2/3-fold and 3/3-fold coincidence rate analysis. Additionally, supplemental work for the implementation of a Micro Telecommunications Computing Architecture (TCA) crate to establish a peak finding algorithm to ensure that the out-of-time beam is less than 10$^{−10}$ fractional level along with single-layer inefficiency analysis on scintillation counters for the Cosmic-Ray Veto (CRV) analysis to ensure the overall inefficiency is 10$^{−4}$. Preliminary results have been achieved for the G4beamline simulation 2/3-fold and 3/3-fold coincidences which are in the order of 10$^{−9}$ and 10$^{−10}$, respectively. Only preliminary results of a triangular counter and four rectangular di-counters for the CRV have been realized. The microTCA crate development is still ongoing.
An electro-optic detector is one of the diagnostic setups used in particle accelerators. It employs an electro-optic crystal to encode the longitudinal beam charge profile in the spectrum of a light pulse. The charge distribution is then reconstructed using data captured by a fast spectrometer. The measurement repetition rate should match or exceed the machine bunching frequency, which is often in the range of several MHz. A high-speed optical line detector (HOLD) is a linear camera designed for easy integration with scientific experiments. The use of modern FPGA circuits helps in the efficient collection and processing of data. The solution is based on Xilinx 7-Series FPGA circuits and implements a custom latency-optimized architecture utilizing the AXI4 family of interfaces. HOLD is one of the fastest line cameras in the world. Thanks to its hardware architecture and a powerful KALYPSO sensor from KIT, it outperforms the fastest comparable commercial devices.