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Eddy Correlation Flux Measurement System (ECOR) with SmartFlux microprocessor: 10 Hz wind data from sonic anemometers
Previously, we reported two-phase capillary-based cooling using narrow (200 to 1000 ..mu..m) heater bridge copper inverse opal (CIO) wicks with heat flux level of 1400 Wcm -2 and superheat ~ 10 degrees C. Here, we demonstrate the area scaling of the proposed technology to a large-area micro-cooler for high-heat-flux cooling of microprocessors and power electronics. We developed a hybrid single/two-phase micro-cooler that relies on capillary-wicking in a 25-..mu..m-thick CIO with an open silicon microchannel 3D-manifold for liquid delivery and vapor extraction, achieving a high heat flux ~ 400 Wcm -2 over a heated area of 10 x 10 mm 2 . For a range of inlet water flowrates from 5 to 60 g(min) -1 , we achieved total thermal resistances and vapor qualities of 0.68 cm 2 degrees CW -1 to 0.2 cm 2 degrees CW -1 and 0.55 to 0.12, respectively. The flowrates are 10x smaller than those of conventional single- or two-phase microchannel cooling technology. The corresponding two-phase thermal resistances ranges from 0.05 to 0.02 cm 2 degrees CW -1 with temperature superheat of 8 to 6 degrees C, respectively. While the overall performance of the large-area (10 x 10 mm 2 ) capillary-based micro-cooler degraded compared to the previous demonstration of the technology for a heated area of 5 x 5 mm 2 , however, preliminary CFD modeling indicates that an improved manifold design will be able to achieve comparable performance.
Reliability, selectivity, and sensitivity are the fundamental attributes of any protection system, acting as the main drivers in the selection of schemes, and equipment. In high-voltage systems, microprocessor-based relays represent the industry’s preferred solution, providing engineers with a vast array of benefits. However, they remain vulnerable to cybersecurity events that may compromise their functionality. To help mitigate against potential cybersecurity risks, this paper presents a fault-tolerant, Byzantine Resilient (BR) architecture that significantly increases the cybersecurity attributes of a protection system while minimizing the amount of performance impacts and integration overheads introduced. The solution relies on an array of independent relays that utilize robust consensus methods (based on Spire [1], [2]) to ensure correct system behavior is achieved even when a relay has been compromised. Furthermore, the solution has been complemented with a custom-built Situational Awareness engine that can be used to detect and identify potential threats. The implemented solution has been developed in consultation with three hardware vendors and has been tested to comply with the performance requirements of a 345kV differential protection scheme (87T). The results indicate that the proposed architecture is a comprehensive solution that: supports the strict correctness and performance requirements of the bulk power grid while providing a cost-effective alternative that offers a seamless, long-term solution.
This paper presents the development of the Inverter Based Resource Monitor (IBRM), an innovative behind-the-meter synchronized measurement unit (SMU) tailored for integration with inverter-based resources (IBRs). The IBRM distinguishes itself as a highly accurate and cost-effective SMU, offering facile deployment and connectivity to IBRs. It is equipped to conduct real-time voltage and current waveform analyses, serving as a phasor measurement unit (PMU) with exceptionally rapid synchrophasor transmission capabilities. The device incorporates a cutting-edge dual-core architecture designed to minimize sampling delays inherent to its microprocessor, thereby enhancing the precision of synchronized waveform measurements. Moreover, the IBRM is adept at recording high-fidelity waveform data, capturing nuances such as waveform distortions, high-order harmonics, and wide-band oscillations prevalent in power grids with substantial IBR presence. A prototype of the IBRM has been constructed and subjected to rigorous testing to assess its functional capabilities and measurement precision, utilizing both idealized signal generators and a real-world off-grid inverter setup as benchmarks.
Previously, two-phase capillary-based cooling from narrow (200-1,000 micrometer) heater-bridge copper inverse opal (CIO) wicks with heat flux levels exceeding 1,400 watts per square cm with a low superheat of approximately 10 degrees C was demonstrated. Here, we demonstrate the area scaling of the proposed technology to large-area micro-cooler for the high-heat-flux cooling of microprocessors and power electronics. We developed a hybrid single/two-phase micro-cooler that relies on capillary wicking in 25-micrometer-thick CIOs with an open channel silicon 3D-manifold for liquid delivery and vapor extraction, to achieve a high heat flux of approximately 400 watts per square cm over a heated area of 1 square cm. For the range of inlet water (21 degrees C water temperature) flowrates from 5 to 60 mL per min, we achieved total thermal resistances and vapor qualities of 0.68-0.2 square cm Kelvin per watt and 0.55-0.12, respectively. The high heat flux levels are achieved with flowrates that are 10 times smaller than conventional single- or two-phase microchannel cooling technology. The corresponding two-phase thermal resistances are in the range of 0.05 to 0.02 square cm Kelvin per watt with temperature superheat of 8 to 6 degrees C. While the overall performance of the large-area (10 by 10 square millimeter) capillary-based micro-cooler degraded compared to previous demonstration of the technology for a heated area of 5 by 5 square millimeter, preliminary computational fluid dynamics (CFD) modeling indicates that an improved manifold design will be able to achieve comparable performance.
Slides providing an overview of microelectronics cybersecurity and research concepts at INL.