Search NASA⌕ Search

SEARCH · Search NASA

Results for “Microprocessors”

Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.

11 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2024

An Engineered Minimal-Set Stimulus for Periodic Information Leakage Fault Detection on a RISC-V Microprocessor

Recent evaluations of counter-based periodic testing strategies for fault detection in Microprocessor (μP) have shown that only a small set of counters is needed to provide complete coverage of severe faults. Severe faults are defined as faults that leak sensitive information, e.g., an encryption key on the output of a serial port. Alternatively, fault detection can be accomplished by executing instructions that periodically test the control and functional units of the μP. In this paper, we propose a fault detection method that utilizes an ’engineered’ executable program combined with a small set of strategically placed counters in pursuit of a hardware Periodic Built-In-Self-Test (PBIST). We analyze two distinct methods for generating such a binary; the first uses an Automatic Test Generation Pattern (ATPG)-based methodology, and the second uses a process whereby existing counter-based node-monitoring infrastructure is utilized. We show that complete fault coverage of all leakage faults is possible using relatively small binaries with low latency to fault detection and by utilizing only a few strategically placed counters in the μP.

42 ENGINEERING↗
DOE OSTI2024

Development of a Hybrid Single/Two-Phase Capillary-Based Micro-Cooler using Copper Inverse Opals Wick with Silicon 3D Manifold for High-Heat-Flux Cooling Application

Previously, we reported two-phase capillary-based cooling using narrow (200 to 1000 ..mu..m) heater bridge copper inverse opal (CIO) wicks with heat flux level of 1400 Wcm -2 and superheat ~ 10 degrees C. Here, we demonstrate the area scaling of the proposed technology to a large-area micro-cooler for high-heat-flux cooling of microprocessors and power electronics. We developed a hybrid single/two-phase micro-cooler that relies on capillary-wicking in a 25-..mu..m-thick CIO with an open silicon microchannel 3D-manifold for liquid delivery and vapor extraction, achieving a high heat flux ~ 400 Wcm -2 over a heated area of 10 x 10 mm 2 . For a range of inlet water flowrates from 5 to 60 g(min) -1 , we achieved total thermal resistances and vapor qualities of 0.68 cm 2 degrees CW -1 to 0.2 cm 2 degrees CW -1 and 0.55 to 0.12, respectively. The flowrates are 10x smaller than those of conventional single- or two-phase microchannel cooling technology. The corresponding two-phase thermal resistances ranges from 0.05 to 0.02 cm 2 degrees CW -1 with temperature superheat of 8 to 6 degrees C, respectively. While the overall performance of the large-area (10 x 10 mm 2 ) capillary-based micro-cooler degraded compared to the previous demonstration of the technology for a heated area of 5 x 5 mm 2 , however, preliminary CFD modeling indicates that an improved manifold design will be able to achieve comparable performance.

capillary flow↗
DOE OSTI2024

ByzSec — A Multi-layered Byzantine Resilient Architecture for Bulk Power System Protective Relays

Reliability, selectivity, and sensitivity are the fundamental attributes of any protection system, acting as the main drivers in the selection of schemes, and equipment. In high-voltage systems, microprocessor-based relays represent the industry’s preferred solution, providing engineers with a vast array of benefits. However, they remain vulnerable to cybersecurity events that may compromise their functionality. To help mitigate against potential cybersecurity risks, this paper presents a fault-tolerant, Byzantine Resilient (BR) architecture that significantly increases the cybersecurity attributes of a protection system while minimizing the amount of performance impacts and integration overheads introduced. The solution relies on an array of independent relays that utilize robust consensus methods (based on Spire [1], [2]) to ensure correct system behavior is achieved even when a relay has been compromised. Furthermore, the solution has been complemented with a custom-built Situational Awareness engine that can be used to detect and identify potential threats. The implemented solution has been developed in consultation with three hardware vendors and has been tested to comply with the performance requirements of a 345kV differential protection scheme (87T). The results indicate that the proposed architecture is a comprehensive solution that: supports the strict correctness and performance requirements of the bulk power grid while providing a cost-effective alternative that offers a seamless, long-term solution.

byzantine security, Fault Tolerant Application Sof↗
DOE OSTI2026

Development and Evaluation of a Cost-Effective Behind-the-Meter Synchronized Measurement Unit for Enhanced Grid Integration

This paper presents the development of the Inverter Based Resource Monitor (IBRM), an innovative behind-the-meter synchronized measurement unit (SMU) tailored for integration with inverter-based resources (IBRs). The IBRM distinguishes itself as a highly accurate and cost-effective SMU, offering facile deployment and connectivity to IBRs. It is equipped to conduct real-time voltage and current waveform analyses, serving as a phasor measurement unit (PMU) with exceptionally rapid synchrophasor transmission capabilities. The device incorporates a cutting-edge dual-core architecture designed to minimize sampling delays inherent to its microprocessor, thereby enhancing the precision of synchronized waveform measurements. Moreover, the IBRM is adept at recording high-fidelity waveform data, capturing nuances such as waveform distortions, high-order harmonics, and wide-band oscillations prevalent in power grids with substantial IBR presence. A prototype of the IBRM has been constructed and subjected to rigorous testing to assess its functional capabilities and measurement precision, utilizing both idealized signal generators and a real-world off-grid inverter setup as benchmarks.

Wu, Ori [ORNL] (ORCID:0000000326723410)↗
DOE OSTI2024

Extreme Efficiency 240 Vac to Load Data Center Power Delivery Topologies and Control

The research explored innovative new circuit topologies and power converter architectures for data center power delivery, from the 240 V ac voltage at the input of a server rack, down to the less than 1 V dc power supply of the latest microprocessors. The research pursued three parallel tracks to increase the power conversion efficiency and to reduce the overall size of the servers: 1) An innovative new ac-dc power converter topology which enables improved efficiency through use of a novel direct step-down topology, well suited for the popular 48V dc power distribution. 2) A new series-stacked power delivery approach for servers comprising a large number of similar loads, such as hard drives in storage servers. The approach greatly reduces the power conversion losses, and achieves efficiency well over 99%. 3) A new family of hybrid switched-capacitor power converters that enable improved efficiency and reduced size through the use of dense ceramic capacitors and new circuit topologies that leverage GaN and low-voltage Si transistor technology. Together, the accomplished research achieved the goal of reducing the power conversion losses in datacenters, thereby reducing greenhouse gas emissions, operating costs, and overall electricity consumption.

24 POWER TRANSMISSION AND DISTRIBUTION↗
DOE OSTI2023

CRITICAL FUNCTION ASSURANCE: Understanding Critical Function and Critical Function Delivery is Foundational for Meaningful ICS Security Improvement and Policy Efforts

Modern life is enabled by a complex and interdependent web of critical functions, including energy, communications, transportation, food, and water. Automation has significantly reduced or replaced human interactions in the delivery of these functions, resulting in a web of goods and services that are made available 24/7 only through unique and intentional deployments of microprocessors, software, and firmware technologies. The prospect of cyber-enabled sabotage of these processes disrupts traditional risk determination models. Critical Function Assurance (CFA) is a foundational approach to identifying, prioritizing, and mitigating the risk that is inherent in the delivery of critical functions that depend on digital technology. It provides rapid focus to what matters most and illuminates elements and areas of risk that otherwise are often overlooked. This focus enables effective application of available security resources and optimizes security strategy and policy efforts. This paper introduces CFA to decision makers and risk executives (including CEOs, COOs, CFOs, and CISOs) whose organizations support and deliver the critical functions that underpin national defense, societal health and safety, and a vibrant economy.

29 ENERGY PLANNING, POLICY, AND ECONOMY↗
DOE OSTI2024

Development of a Hybrid Single/Two-Phase Capillary-Based Micro-Cooler Using Copper Inverse Opals Wick with Silicon 3D Manifold for High-Heat-Flux Cooling Application: Preprint

Previously, two-phase capillary-based cooling from narrow (200-1,000 micrometer) heater-bridge copper inverse opal (CIO) wicks with heat flux levels exceeding 1,400 watts per square cm with a low superheat of approximately 10 degrees C was demonstrated. Here, we demonstrate the area scaling of the proposed technology to large-area micro-cooler for the high-heat-flux cooling of microprocessors and power electronics. We developed a hybrid single/two-phase micro-cooler that relies on capillary wicking in 25-micrometer-thick CIOs with an open channel silicon 3D-manifold for liquid delivery and vapor extraction, to achieve a high heat flux of approximately 400 watts per square cm over a heated area of 1 square cm. For the range of inlet water (21 degrees C water temperature) flowrates from 5 to 60 mL per min, we achieved total thermal resistances and vapor qualities of 0.68-0.2 square cm Kelvin per watt and 0.55-0.12, respectively. The high heat flux levels are achieved with flowrates that are 10 times smaller than conventional single- or two-phase microchannel cooling technology. The corresponding two-phase thermal resistances are in the range of 0.05 to 0.02 square cm Kelvin per watt with temperature superheat of 8 to 6 degrees C. While the overall performance of the large-area (10 by 10 square millimeter) capillary-based micro-cooler degraded compared to previous demonstration of the technology for a heated area of 5 by 5 square millimeter, preliminary computational fluid dynamics (CFD) modeling indicates that an improved manifold design will be able to achieve comparable performance.

capillary flow↗
DOE OSTI2024

Field Programmable Gate Array Data Capture for Control Systems

Some Industrial Control Systems (ICS) networks are based on protocols such as Serial and Industrial Ethernet. These protocols currently have no existing cybersecurity monitoring tools, leaving a large gap in the cyber defense of critical infrastructure. In order to analyze such ICS traffic, it is first necessary to implement methods of capturing the ICS data. Whereas traditional methods of analyzing data would use microprocessors, the nature of high-speed analog data can be difficult to implement on such a versatile processor, as they are rather inefficient for doing a single task. Whereas Field Programmable Gate Arrays (FPGAs) provide an adequate tool in analyzing high speed data, as despite the lack of program versatility, Programmable Logic can implement a solution with minimal clock cycles, allowing time for each new packet of data to be captured before a new data sample is taken.

42 ENGINEERING↗
DOE OSTI2023

Novel Module Architecture for Lower CapEx and Improved Recyclability for c-Si PV Modules

Photovoltaic (PV) energy production is currently increasing at a rate at which recycling is becoming necessary. A novel module architecture has been demonstrated that has potential for high value recycling for c-Si PV. This architecture eliminates the vacuum lamination process and cross-linked en capsulants. Functioning prototypes of c-Si have been fabricated for stress testing in collaboration with NREL. These modules are being tested against traditionally manufactured modules. Based on preliminary results, this module architecture is a potentially viable solution for improving the manufacturing cost and recyclability of PV modules while retaining module performance.

computer architecture↗