Modular computer research
Onboard modular computer research in strapdown guidance technology for computational ability and long term reliability of unmanned missions
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Onboard modular computer research in strapdown guidance technology for computational ability and long term reliability of unmanned missions
Modular computer design for long term missions, discussing reliability estimation
Threshold logic implementation for LSI design of modular computer system
NASA modular aerospace computer for attitude control high speed computation, describing implementation with LSI functional characters
The functional requirements for the design of an interpretive simulator for the space ultrareliable modular computer (SUMC) are presented. A review of applicable existing computer simulations is included along with constraints on the SUMC simulator functional design. Input requirements, output requirements, and language requirements for the simulator are discussed in terms of a SUMC configuration which may vary according to the application.
The highly transportable programming system designed and implemented to support the development of software for the Space Ultrareliable Modular Computer (SUMC) is described. The SUMC system support software consists of program modules called processors. The initial set of processors consists of the supervisor, the general purpose assembler for SUMC instruction and microcode input, linkage editors, an instruction level simulator, a microcode grid print processor, and user oriented utility programs. A FORTRAN 4 compiler is undergoing development. The design facilitates the addition of new processors with a minimum effort and provides the user quasi host independence on the ground based operational software development computer. Additional capability is provided to accommodate variations in the SUMC architecture without consequent major modifications in the initial processors.
The design principles, description, functional operation, and recommended expansion and enhancements are presented for the Space Ultrareliable Modular Computer interpretive simulator. Included as appendices are the user's manual, program module descriptions, target instruction descriptions, simulator source program listing, and a sample program printout. In discussing the design and operation of the simulator, the key problems involving host computer independence and target computer architectural scope are brought into focus.
Global supply chains for critical minerals and materials are complex, evolving networks of countries, products, production stages, and trade relationships. Existing analytical approaches are limited by fragmented data and static network representations that do not capture the dynamic production dependencies linking raw materials, intermediate products, and final goods across multiple countries. Trade and production statistics provide only a partial view of domestic production, inventories, and material flows, making it difficult to identify indirect sourcing pathways, hidden dependencies, and embedded foreign exposures. This paper introduces the Supply Chain Exposure Network Tracking and Risk Assessment (SENTRA) framework, a modular graph-based computational framework for constructing, analyzing, and forecasting dynamic supply chain networks. As the first paper in a three-part methodological series, it establishes the computational foundation of SENTRA by constructing a temporal attributed multi-relational graph whose nodes represent product–country pairs and whose edges encode observed trade and within-country value-chain relationships. Statistical estimation and constrained optimization recover latent production, final demand, and product input dependency coefficients while enforcing economic accounting constraints. Graph-derived exposure measures quantify direct, transshipment, value-chain, and multi-hop supply chain dependencies independently of the forecasting model. A temporal graph forecasting architecture based on a relational graph neural network then forecasts the evolution of the graph under mass-balance constraints with distribution-free conformal uncertainty quantification. Validation on the global aluminum supply chain shows that the learned graph representations recover economically meaningful supply chain structure, accurately forecast out-of-sample trade relationships, and produce well-calibrated prediction intervals. Subsequent papers apply this computational foundation to exposure assessment, disruption analysis, and scenario-based policy analysis, and extend the framework to multimaterial supply chain modeling and decision support.
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Simulator has been constructed as set of quasi-independent modules, regulated by one control module. All machine-dependent functions have been resolved such that simulation package is as machine independent as possible.
The design features of the SUMC-2B computer, also called the IBM-HTC are described. It is general purpose digital computer implemented with flexible hardware elements and microprograming to enable low cost customizing to a wide range of applications. It executes the S/360 standard instruction set to maintain problem state compability. Memory technology, extended instruction sets, and I/O channel variations are among the available options.
The core electronics subsystems on unmanned spacecraft, which have been sent over the last 20 years to investigate the moon, Mars, Venus, and Mercury, have progressed through an evolution from simple fixed controllers and analog computers in the 1960's to general-purpose digital computers in current designs. This evolution is now moving in the direction of distributed computer networks. Current Voyager spacecraft already use three on-board computers. One is used to store commands and provide overall spacecraft management. Another is used for instrument control and telemetry collection, and the third computer is used for attitude control and scientific instrument pointing. An examination of the control logic in the instruments shows that, for many, it is cost-effective to replace the sequencing logic with a microcomputer. The Unified Data System architecture considered consists of a set of standard microcomputers connected by several redundant buses. A typical self-checking computer module will contain 23 RAMs, two microprocessors, one memory interface, three bus interfaces, and one core building block.
Unique modular computer features compactness, low power, mass storage of data, multiprocessing, and choice of various input/output modes. Master processor communicates with user via usual keyboard and video display terminal. Coordinates operations of as many as 24 slave processors, each dedicated to different experiment. Each slave circuit card includes slave microprocessor and assortment of input/output circuits for communication with external equipment, with master processor, and with other slave processors. Adaptable to industrial process control with selectable degrees of automatic control, automatic and/or manual monitoring, and manual intervention.
Modular design techniques improve methods of error detection, diagnosis, and recovery. Theoretical computer (MARCS (Modular Architecture for Reliable Computer Systems)) study deals with postulated and modeled technology indigenous to 1975-1980. Study developments are discussed.
The design is reported of an advanced modular computer system designated the Automatically Reconfigurable Modular Multiprocessor System, which anticipates requirements for higher computing capacity and reliability for future spaceborne computers. Subjects discussed include: an overview of the architecture, mission analysis, synchronous and nonsynchronous scheduling control, reliability, and data transmission.
The modular missile borne computer's architecture with emphasis on how that architecture evolved is discussed. A careful analysis is given of both the physical constraints and the processing requirements.
Design and development efforts for a spaceborne modular computer system are reported. An initial baseline description is followed by an interface design that includes definition of the overall system response to all classes of failure. Final versions for the register level designs for all module types were completed. Packaging, support and control executive software, including memory utilization estimates and design verification plan, were formalized to insure a soundly integrated design of the digital computer system.
Automatically-Reconfigurable Modular Multiprocessor System (ARMMS) provides redundant processing with dynamic mode switching in real time. Design will provide higher computer capability than that presently available for same amount of hardware and will furnish modular system which is responsive to diverse problems effectively.