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Tunnel junction-enabled monolithically integrated GaN micro-light emitting transistor
GaN/InGaN microLEDs are a very promising technology for next-generation displays. Switching control transistors and their integration are key components in achieving high-performance, efficient displays. Monolithic integration of microLEDs with GaN switching devices provides an opportunity to control microLED output power with capacitive (voltage)-controlled rather than current-controlled schemes. This approach can greatly reduce system complexity for the driver circuit arrays while maintaining device opto-electronic performance. In this work, we demonstrate a 3-terminal GaN micro-light emitting transistor that combines a GaN/InGaN blue tunneling-based microLED with a GaN n-channel FET. Further, the integrated device exhibits excellent gate control, drain current control, and optical emission control. This work provides a promising pathway for future monolithic integration of GaN FETs with microLED to enable fast switching, high-efficiency microLED display and communication systems.
Monolithically-integrated AC switch having JBSFETs therein with commonly-connected drain and cathode electrodes
A monolithically-integrated AC switch includes a semiconductor substrate having first and second insulated-gate field effect transistors therein, which contain first and second spaced-apart and independently-controllable source terminals extending adjacent a first surface of the semiconductor substrate, yet share a common drain electrode extending adjacent a second surface of the semiconductor substrate. According to some of these embodiments of the invention, the first and second insulated-gate field effect transistors include respective first and second independently-controllable gate electrodes, which extend adjacent the first surface. The first and second insulated-gate field effect transistors may be configured as first and second vertical power MOSFETs, respectively. The semiconductor substrate may also include at least one edge termination region therein, which extends between the first and second vertical power MOSFETs.
HydroGEN Seedling: Monolithically Integrated Thin Film/Silicon Tandem Photoelectrodes for High-Efficiency and Stable Photoelectrochemical Water Splitting
In this project, we propose to develop monolithically integrated Si-based tandem photoelectrodes to achieve both high solar-to-hydrogen (STH) efficiency (>15%) and long-term stability (>1,000 hours) in spontaneous water splitting systems. The proposed tandem devices consist of a Ta 3 N 5 , BCTSSe, or In 0.5 Ga 0.5 N top junction, which has a bandgap of ~1.7-2.0 eV and can split the solar spectrum with the Si bottom junction. Ta 3 N 5 , BCTSSe, and InGaN will be grown/deposited on a low-resistivity nanowire tunnel junction on Si substrates using atomic layer deposition (ALD), sputtering, and molecular beam epitaxy (MBE), respectively. Both n and p-type Si solar wafers will be utilized, which can serve as the photoanode or photocathode, respectively. We will use N-rich GaN ultrathin passivation layers to protect photoelectrodes from corrosion and oxidation.
Semi-monolithic Integration of All-Chalcopyrite Multijunction Solar Conversion Devices via Thin-Film Bonding and Exfoliation
Here we report on a semi-monolithic integration method to circumvent processing incompatibility between materials of dissimilar classes and combine them into multijunction devices for photovoltaic and photoelectrochemical applications. Proof-of-concept all-chalcopyrite tandems were obtained by consecutive transfer of fully integrated unpatterned 1.85 eV CuGa 3 Se 5 and 1.13 eV CuInGaSe 2 PV stacks from their Mo/soda lime glass substrates onto a new single host substrate. This transfer approach consists of two key steps: (1) bonding of the solar stack (face down) onto a handle (e.g., SnO 2 :F, FTO) using a transparent conductive composite and (2) delamination of the solar stack at the chalcopyrite/Mo interface by employing a wedge-based exfoliation technique. Upon transfer onto FTO, a CuGa 3 Se 5 champion device demonstrated near-coincident photocurrent density-voltage characteristic with a baseline measurement. Then, the exfoliated CuGa 3 Se 5 single-junction stack transferred onto FTO served as the new host onto which a second fully processed CuInGaSe 2 stack was bonded (face down) onto and liberated from its Mo/SLG substrate, leading to a complete transfer of both sub-cells onto one FTO substrate. A champion semi-monolithic tandem device exhibited a power conversion efficiency of 5.04% with an open-circuit voltage, a short-circuit current density, and a fill factor of 1.24 V, 7.19 mA/cm 2 , and 56.7%, respectively. This first-time demonstration of a fully operational semi-monolithic device provides a new avenue to combine thermally, mechanically, and/or chemically incompatible thin-film material classes into tandem photovoltaic and photoelectrochemical devices while maintaining state-of-the-art sub-cell processing.
Monolithic Integration of Lateral HV Power MOSFET with LV CMOS for SiC Power IC Technology
This paper reports the design and process flow for monolithic integration of lateral high voltage (HV) power MOSFET with low voltage (LV) CMOS circuits for SiC Power IC technology. The reported devices and circuits are fabricated on a N-/N+ 4H-SiC substrate at 150mm, production grade- Analog Devices Inc. (ADI) Hillview fabrication facility located in San Jose. Here, the static performance characteristics of HV NMOS and LV CMOS are reported. For future high temperature applications, the static performances are fully characterized and are reported up to 200oC. Finally, to validate the fabricated CMOS, a 5-stage ring oscillator is also demonstrated.
Monolithically Integrated $\varepsilon$-Ge/In x Ga 1-x As Quantum Well Laser Design: Experimental and Theoretical Investigation
Here, we have analyzed the electrical and optical phenomenon occurring in a $\varepsilon$-Ge/In x Ga 1-x -Ge/In x Ga 1-x As quantum well (QW) laser through self-consistent physical solvers calibrated using in-house experimental results. A separate confinement heterostructure QW design is proposed to enable lasing from tensile strained germanium ($\varepsilon$-Ge/In x Ga 1-x -Ge) in the range of 1.55 um to 4 um wavelengths as a function of QW thickness and indium (In) composition. Different recombination mechanisms were analyzed as a function of tensile strain in $\varepsilon$-Ge/In x Ga 1-x -Ge QW. Minority carrier lifetime and band alignment are key attributes of a QW laser, which were measured using microwave photoconductive decay and x-ray photoelectron spectroscopy (as a function of In composition), respectively. The transition point of Ge to a direct bandgap material is re-affirmed to be at $\varepsilon$-Ge/In x Ga 1-x = 1.6% (In ~24%) and the transition from type I to type II for $\varepsilon$-Ge/In x Ga 1-x -Ge/In x Ga 1-x As QW is found to be at In ~55%. Also, the transition to a TM mode dominant laser is identified at In ~15%. Using a tunable waveguide design to optimize confinement as a function of In composition, strain, wavelength, QW thickness, refractive index, and geometry, the $\varepsilon$-Ge/In x Ga 1-x -Ge QW laser design provided a net material gain of ~2000 cm -1 and a threshold current density of ~5 kA/cm 2 , which is an improvement over existing Ge based lasers. In conclusion, the impact of In composition and QW thickness on the band structure, polarized gain spectra, and various lasing metrics were analyzed to show $\varepsilon$-Ge/In x Ga 1-x -Ge/InGaAs QW lasers as promising for integrated photonics.
PV Inverter Systems Enabled by Monolithically Integrated SiC based Four Quadrant Power Switch (4-QPS) [BiDFET]
The purpose of this project was to develop a new breed of Power Conversion Systems (PCS) for PV integration that is enabled by the newly developed 4-Quadrant Single Die SiC Power Semiconductor Switches (4-QPS) or also referred to as “Bidirectional FET (BIDFET)”. This work includes semiconductor die development, advanced packaging, converter design, development, and testing of 4-QPS enabled hardware prototypes at 1 kW (for single phase residential application) and 10 kW (for three phase commercial application). The BiDirectional Field-Effect Transistor (BiDFET) can enable circuit topologies requiring four-quadrant switches, that were earlier designed using discrete combinations of MOSFETs, IGBTs, GaN HEMTs, and PiN diodes. The monolithic nature of the BiDFET allows lower device count, smaller switch volume, lower inductance, and simpler packaging, and hence more reliable and commercially viable implementation in power electronics converters. The matrix converter topologies, now feasible using BiDFETs, can eliminate the bulky and unreliable dc link capacitors or inductors required for conventional voltage-source or current-source converters in ac–ac and ac–dc applications. The 1.2 kV BiDFET has the potential to disrupt all the applications utilizing 1.2 kV switches, including electric vehicle (EV) drivetrain, bidirectional EV chargers, industrial motor drives, solid-state transformers, datacenter power supplies, elevator drives, dc microgrids, energy storage grid integration, solid-state breakers, etc.
High spatial resolution direct conversion amorphous selenium X-ray detectors with monolithically integrated CMOS readout
Recent progress in the field of micron-scale spatial resolution direct conversion X-ray detectors for high-energy synchrotron light sources serve applications ranging from nondestructive and noninvasive microscopy techniques which provide insight into the structure and morphology of crystals, to medical diagnostic measurement devices. Amorphous selenium ( a -Se) as a wide-bandgap thermally evaporated photoconductor exhibits ultra-low thermal generation rates for dark carriers and has been extensively used in X-ray medical imaging. Being an amorphous material, it can further be deposited over large areas at room temperatures and at substantially lower costs as compared to crystalline semiconductors. Here, to address the demands for a high-energy and high spatial resolution X-ray detector for synchrotron light source applications, we have thermally evaporated a -Se on a Mixed-Mode Pixel Array Detector (MM-PAD) Application Specific Integrated Circuit (ASIC). The ASIC format consists of 128 × 128 square pixels each 150 μm on a side. A 200 μm a -Se layer was directly deposited on the ASIC followed by a metal top electrode. The completed detector assembly was tested with 45 kV Ag and 23 kV Cu X-ray tube sources. The detector fabrication, performances, Modulation Transfer Function (MTF) measurements, and simulations are reported.
Monolithically Integrated GaN Nanoscale Air Channel Field Emission Diode and Transistor.
Abstract not provided.
Quantum cascade laser with monolithically integrated passive waveguide
A photonic integrated circuit device includes a passive waveguide section formed over a substrate, a quantum cascade laser (QCL) gain section formed over the substrate and adjacent to the passive waveguide section, and a taper section disposed between and in contact with each of the passive waveguide section and the QCL gain section. In some embodiments, the passive waveguide section includes a passive waveguide core layer disposed between a first cladding layer and a second cladding layer. In some examples, the QCL gain section includes a QCL active region disposed between a first confinement layer and a second confinement layer, where the QCL active region has a lower index of refraction than each of the first and second confinement layers. In some embodiments, the taper section is configured to optically couple the QCL gain section to the passive waveguide section.
Monolithic integrated quantum dot photonic integrated circuits
A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
Monolithic integrated quantum dot photonic integrated circuits
A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.
Monolithic integration of optical waveguides with metal routing layers
A photonic integrated circuit and a method for its manufacture are provided. In an embodiment, an intermetal dielectric layer, for example, a silicon oxide layer, is contiguous between an upper metal layer and a lower metal layer on a substrate. One or more waveguides having top and bottom faces are formed in respective waveguide layers within the intermetal dielectric layer between the upper and lower metal layers. There is a distance of at least 600 nm from the upper metal layer to the top face of the uppermost of the several waveguides. There is a distance of at least 600 nm from the lower metal layer to the bottom face of the lowermost of the several waveguides. The waveguides are formed of silicon nitride for longer wavelengths and alumina for shorter wavelengths. These dimensions and materials are favorable for CMOS processing, among other things.
Towards Monolithic Integration of AlN Transducers on AlN Substrates with High Electron Mobility Transistors
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Device response principles and the impact on energy resolution of epitaxial quantum dot scintillators with monolithic photodetector integration
Abstract Epitaxial quantum dot (QD) scintillator crystals with picosecond-scale timing and high light yield have been created for medical imaging, high energy physics and national security applications. Monolithic photodetector (PD) integration enables the sensing of photons generated within the waveguiding crystal and allows a wide range of scintillator-photodetector coupling geometries. Until recently, these doubly novel devices have suffered from complex, high variance responses to monoenergetic sources which significantly reduces their precision and accuracy. The principles governing the overall device response have now been discerned and embodied by an expression derived within a geometrical optics framework which considers optical properties, surface roughness and photodetector coupling geometry. Response variation due to these factors was sufficiently reduced to obtain material-related energy resolution values of 2.4% with alpha particles. These findings place energy resolution alongside luminescence timescale, photon yield, and radiation hardness as outstanding properties of these engineered materials.
High‐Performance Zinc Tin Oxide TFTs with Active Layers Deposited by Atomic Layer Deposition
Abstract New deposition techniques for amorphous oxide semiconductors compatible with silicon back end of line manufacturing are needed for 3D monolithic integration of thin‐film electronics. Here, three atomic layer deposition (ALD) processes are compared for the fabrication of amorphous zinc tin oxide (ZTO) channels in bottom‐gate, top‐contact n‐channel transistors. As‐deposited ZTO films, made by ALD at 150–200 °C, exhibit semiconducting, enhancement‐mode behavior with electron mobility as high as 13 cm 2 V −1 s −1 , due to a low density of oxygen‐related defects. ZTO deposited at 200 °C using a hybrid thermal‐plasma ALD process with an optimal tin composition of 21%, post‐annealed at 400 °C, shows excellent performance with a record high mobility of 22.1 cm 2 V –1 s –1 and a subthreshold slope of 0.29 V dec –1 . Increasing the deposition temperature and performing post‐deposition anneals at 300–500 °C lead to an increased density of the X‐ray amorphous ZTO film, improving its electrical properties. By optimizing the ZTO active layer thickness and using a high‐ k gate insulator (ALD Al 2 O 3 ), the transistor switching voltage is lowered, enabling electrical compatibility with silicon integrated circuits. This work opens the possibility of monolithic integration of ALD ZTO‐based thin‐film electronics with silicon integrated circuits or onto large‐area flexible substrates.